1 /* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/delay.h> 25 #include <linux/gpio/consumer.h> 26 #include <linux/iopoll.h> 27 #include <linux/module.h> 28 #include <linux/of_platform.h> 29 #include <linux/platform_device.h> 30 #include <linux/pm_runtime.h> 31 #include <linux/regulator/consumer.h> 32 33 #include <video/display_timing.h> 34 #include <video/of_display_timing.h> 35 #include <video/videomode.h> 36 37 #include <drm/drm_crtc.h> 38 #include <drm/drm_device.h> 39 #include <drm/drm_dp_aux_bus.h> 40 #include <drm/drm_dp_helper.h> 41 #include <drm/drm_panel.h> 42 43 /** 44 * struct panel_delay - Describes delays for a simple panel. 45 */ 46 struct panel_delay { 47 /** 48 * @hpd_reliable: Time for HPD to be reliable 49 * 50 * The time (in milliseconds) that it takes after powering the panel 51 * before the HPD signal is reliable. Ideally this is 0 but some panels, 52 * board designs, or bad pulldown configs can cause a glitch here. 53 * 54 * NOTE: on some old panel data this number appers to be much too big. 55 * Presumably some old panels simply didn't have HPD hooked up and put 56 * the hpd_absent here because this field predates the 57 * hpd_absent. While that works, it's non-ideal. 58 */ 59 unsigned int hpd_reliable; 60 61 /** 62 * @hpd_absent: Time to wait if HPD isn't hooked up. 63 * 64 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 65 * 66 * This is T3-max on eDP timing diagrams or the delay from power on 67 * until HPD is guaranteed to be asserted. 68 */ 69 unsigned int hpd_absent; 70 71 /** 72 * @prepare_to_enable: Time between prepare and enable. 73 * 74 * The minimum time, in milliseconds, that needs to have passed 75 * between when prepare finished and enable may begin. If at 76 * enable time less time has passed since prepare finished, 77 * the driver waits for the remaining time. 78 * 79 * If a fixed enable delay is also specified, we'll start 80 * counting before delaying for the fixed delay. 81 * 82 * If a fixed prepare delay is also specified, we won't start 83 * counting until after the fixed delay. We can't overlap this 84 * fixed delay with the min time because the fixed delay 85 * doesn't happen at the end of the function if a HPD GPIO was 86 * specified. 87 * 88 * In other words: 89 * prepare() 90 * ... 91 * // do fixed prepare delay 92 * // wait for HPD GPIO if applicable 93 * // start counting for prepare_to_enable 94 * 95 * enable() 96 * // do fixed enable delay 97 * // enforce prepare_to_enable min time 98 * 99 * This is not specified in a standard way on eDP timing diagrams. 100 * It is effectively the time from HPD going high till you can 101 * turn on the backlight. 102 */ 103 unsigned int prepare_to_enable; 104 105 /** 106 * @enable: Time for the panel to display a valid frame. 107 * 108 * The time (in milliseconds) that it takes for the panel to 109 * display the first valid frame after starting to receive 110 * video data. 111 * 112 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 113 * the delay after link training finishes until we can turn the 114 * backlight on and see valid data. 115 */ 116 unsigned int enable; 117 118 /** 119 * @disable: Time for the panel to turn the display off. 120 * 121 * The time (in milliseconds) that it takes for the panel to 122 * turn the display off (no content is visible). 123 * 124 * This is T9-min (delay from backlight off to end of valid video 125 * data) on eDP timing diagrams. It is not common to set. 126 */ 127 unsigned int disable; 128 129 /** 130 * @unprepare: Time to power down completely. 131 * 132 * The time (in milliseconds) that it takes for the panel 133 * to power itself down completely. 134 * 135 * This time is used to prevent a future "prepare" from 136 * starting until at least this many milliseconds has passed. 137 * If at prepare time less time has passed since unprepare 138 * finished, the driver waits for the remaining time. 139 * 140 * This is T12-min on eDP timing diagrams. 141 */ 142 unsigned int unprepare; 143 }; 144 145 /** 146 * struct panel_desc - Describes a simple panel. 147 */ 148 struct panel_desc { 149 /** 150 * @modes: Pointer to array of fixed modes appropriate for this panel. 151 * 152 * If only one mode then this can just be the address of the mode. 153 * NOTE: cannot be used with "timings" and also if this is specified 154 * then you cannot override the mode in the device tree. 155 */ 156 const struct drm_display_mode *modes; 157 158 /** @num_modes: Number of elements in modes array. */ 159 unsigned int num_modes; 160 161 /** 162 * @timings: Pointer to array of display timings 163 * 164 * NOTE: cannot be used with "modes" and also these will be used to 165 * validate a device tree override if one is present. 166 */ 167 const struct display_timing *timings; 168 169 /** @num_timings: Number of elements in timings array. */ 170 unsigned int num_timings; 171 172 /** @bpc: Bits per color. */ 173 unsigned int bpc; 174 175 /** @size: Structure containing the physical size of this panel. */ 176 struct { 177 /** 178 * @size.width: Width (in mm) of the active display area. 179 */ 180 unsigned int width; 181 182 /** 183 * @size.height: Height (in mm) of the active display area. 184 */ 185 unsigned int height; 186 } size; 187 188 /** @delay: Structure containing various delay values for this panel. */ 189 struct panel_delay delay; 190 }; 191 192 /** 193 * struct edp_panel_entry - Maps panel ID to delay / panel name. 194 */ 195 struct edp_panel_entry { 196 /** @panel_id: 32-bit ID for panel, encoded with drm_edid_encode_panel_id(). */ 197 u32 panel_id; 198 199 /** @delay: The power sequencing delays needed for this panel. */ 200 const struct panel_delay *delay; 201 202 /** @name: Name of this panel (for printing to logs). */ 203 const char *name; 204 }; 205 206 struct panel_edp { 207 struct drm_panel base; 208 bool enabled; 209 bool no_hpd; 210 211 bool prepared; 212 213 ktime_t prepared_time; 214 ktime_t unprepared_time; 215 216 const struct panel_desc *desc; 217 218 struct regulator *supply; 219 struct i2c_adapter *ddc; 220 struct drm_dp_aux *aux; 221 222 struct gpio_desc *enable_gpio; 223 struct gpio_desc *hpd_gpio; 224 225 struct edid *edid; 226 227 struct drm_display_mode override_mode; 228 229 enum drm_panel_orientation orientation; 230 }; 231 232 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 233 { 234 return container_of(panel, struct panel_edp, base); 235 } 236 237 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 238 struct drm_connector *connector) 239 { 240 struct drm_display_mode *mode; 241 unsigned int i, num = 0; 242 243 for (i = 0; i < panel->desc->num_timings; i++) { 244 const struct display_timing *dt = &panel->desc->timings[i]; 245 struct videomode vm; 246 247 videomode_from_timing(dt, &vm); 248 mode = drm_mode_create(connector->dev); 249 if (!mode) { 250 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 251 dt->hactive.typ, dt->vactive.typ); 252 continue; 253 } 254 255 drm_display_mode_from_videomode(&vm, mode); 256 257 mode->type |= DRM_MODE_TYPE_DRIVER; 258 259 if (panel->desc->num_timings == 1) 260 mode->type |= DRM_MODE_TYPE_PREFERRED; 261 262 drm_mode_probed_add(connector, mode); 263 num++; 264 } 265 266 return num; 267 } 268 269 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 270 struct drm_connector *connector) 271 { 272 struct drm_display_mode *mode; 273 unsigned int i, num = 0; 274 275 for (i = 0; i < panel->desc->num_modes; i++) { 276 const struct drm_display_mode *m = &panel->desc->modes[i]; 277 278 mode = drm_mode_duplicate(connector->dev, m); 279 if (!mode) { 280 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 281 m->hdisplay, m->vdisplay, 282 drm_mode_vrefresh(m)); 283 continue; 284 } 285 286 mode->type |= DRM_MODE_TYPE_DRIVER; 287 288 if (panel->desc->num_modes == 1) 289 mode->type |= DRM_MODE_TYPE_PREFERRED; 290 291 drm_mode_set_name(mode); 292 293 drm_mode_probed_add(connector, mode); 294 num++; 295 } 296 297 return num; 298 } 299 300 static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 301 struct drm_connector *connector) 302 { 303 struct drm_display_mode *mode; 304 bool has_override = panel->override_mode.type; 305 unsigned int num = 0; 306 307 if (!panel->desc) 308 return 0; 309 310 if (has_override) { 311 mode = drm_mode_duplicate(connector->dev, 312 &panel->override_mode); 313 if (mode) { 314 drm_mode_probed_add(connector, mode); 315 num = 1; 316 } else { 317 dev_err(panel->base.dev, "failed to add override mode\n"); 318 } 319 } 320 321 /* Only add timings if override was not there or failed to validate */ 322 if (num == 0 && panel->desc->num_timings) 323 num = panel_edp_get_timings_modes(panel, connector); 324 325 /* 326 * Only add fixed modes if timings/override added no mode. 327 * 328 * We should only ever have either the display timings specified 329 * or a fixed mode. Anything else is rather bogus. 330 */ 331 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 332 if (num == 0) 333 num = panel_edp_get_display_modes(panel, connector); 334 335 connector->display_info.bpc = panel->desc->bpc; 336 connector->display_info.width_mm = panel->desc->size.width; 337 connector->display_info.height_mm = panel->desc->size.height; 338 339 return num; 340 } 341 342 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 343 { 344 ktime_t now_ktime, min_ktime; 345 346 if (!min_ms) 347 return; 348 349 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 350 now_ktime = ktime_get(); 351 352 if (ktime_before(now_ktime, min_ktime)) 353 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 354 } 355 356 static int panel_edp_disable(struct drm_panel *panel) 357 { 358 struct panel_edp *p = to_panel_edp(panel); 359 360 if (!p->enabled) 361 return 0; 362 363 if (p->desc->delay.disable) 364 msleep(p->desc->delay.disable); 365 366 p->enabled = false; 367 368 return 0; 369 } 370 371 static int panel_edp_suspend(struct device *dev) 372 { 373 struct panel_edp *p = dev_get_drvdata(dev); 374 375 gpiod_set_value_cansleep(p->enable_gpio, 0); 376 regulator_disable(p->supply); 377 p->unprepared_time = ktime_get(); 378 379 return 0; 380 } 381 382 static int panel_edp_unprepare(struct drm_panel *panel) 383 { 384 struct panel_edp *p = to_panel_edp(panel); 385 int ret; 386 387 /* Unpreparing when already unprepared is a no-op */ 388 if (!p->prepared) 389 return 0; 390 391 pm_runtime_mark_last_busy(panel->dev); 392 ret = pm_runtime_put_autosuspend(panel->dev); 393 if (ret < 0) 394 return ret; 395 p->prepared = false; 396 397 return 0; 398 } 399 400 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 401 { 402 int err; 403 404 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 405 if (IS_ERR(p->hpd_gpio)) { 406 err = PTR_ERR(p->hpd_gpio); 407 408 if (err != -EPROBE_DEFER) 409 dev_err(dev, "failed to get 'hpd' GPIO: %d\n", err); 410 411 return err; 412 } 413 414 return 0; 415 } 416 417 static int panel_edp_prepare_once(struct panel_edp *p) 418 { 419 struct device *dev = p->base.dev; 420 unsigned int delay; 421 int err; 422 int hpd_asserted; 423 unsigned long hpd_wait_us; 424 425 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 426 427 err = regulator_enable(p->supply); 428 if (err < 0) { 429 dev_err(dev, "failed to enable supply: %d\n", err); 430 return err; 431 } 432 433 gpiod_set_value_cansleep(p->enable_gpio, 1); 434 435 delay = p->desc->delay.hpd_reliable; 436 if (p->no_hpd) 437 delay = max(delay, p->desc->delay.hpd_absent); 438 if (delay) 439 msleep(delay); 440 441 if (p->hpd_gpio) { 442 if (p->desc->delay.hpd_absent) 443 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 444 else 445 hpd_wait_us = 2000000; 446 447 err = readx_poll_timeout(gpiod_get_value_cansleep, p->hpd_gpio, 448 hpd_asserted, hpd_asserted, 449 1000, hpd_wait_us); 450 if (hpd_asserted < 0) 451 err = hpd_asserted; 452 453 if (err) { 454 if (err != -ETIMEDOUT) 455 dev_err(dev, 456 "error waiting for hpd GPIO: %d\n", err); 457 goto error; 458 } 459 } 460 461 p->prepared_time = ktime_get(); 462 463 return 0; 464 465 error: 466 gpiod_set_value_cansleep(p->enable_gpio, 0); 467 regulator_disable(p->supply); 468 p->unprepared_time = ktime_get(); 469 470 return err; 471 } 472 473 /* 474 * Some panels simply don't always come up and need to be power cycled to 475 * work properly. We'll allow for a handful of retries. 476 */ 477 #define MAX_PANEL_PREPARE_TRIES 5 478 479 static int panel_edp_resume(struct device *dev) 480 { 481 struct panel_edp *p = dev_get_drvdata(dev); 482 int ret; 483 int try; 484 485 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 486 ret = panel_edp_prepare_once(p); 487 if (ret != -ETIMEDOUT) 488 break; 489 } 490 491 if (ret == -ETIMEDOUT) 492 dev_err(dev, "Prepare timeout after %d tries\n", try); 493 else if (try) 494 dev_warn(dev, "Prepare needed %d retries\n", try); 495 496 return ret; 497 } 498 499 static int panel_edp_prepare(struct drm_panel *panel) 500 { 501 struct panel_edp *p = to_panel_edp(panel); 502 int ret; 503 504 /* Preparing when already prepared is a no-op */ 505 if (p->prepared) 506 return 0; 507 508 ret = pm_runtime_get_sync(panel->dev); 509 if (ret < 0) { 510 pm_runtime_put_autosuspend(panel->dev); 511 return ret; 512 } 513 514 p->prepared = true; 515 516 return 0; 517 } 518 519 static int panel_edp_enable(struct drm_panel *panel) 520 { 521 struct panel_edp *p = to_panel_edp(panel); 522 unsigned int delay; 523 524 if (p->enabled) 525 return 0; 526 527 delay = p->desc->delay.enable; 528 529 /* 530 * If there is a "prepare_to_enable" delay then that's supposed to be 531 * the delay from HPD going high until we can turn the backlight on. 532 * However, we can only count this if HPD is handled by the panel 533 * driver, not if it goes to a dedicated pin on the controller. 534 * If we aren't handling the HPD pin ourselves then the best we 535 * can do is assume that HPD went high immediately before we were 536 * called (and link training took zero time). 537 * 538 * NOTE: if we ever end up in this "if" statement then we're 539 * guaranteed that the panel_edp_wait() call below will do no delay. 540 * It already handles that case, though, so we don't need any special 541 * code for it. 542 */ 543 if (p->desc->delay.prepare_to_enable && !p->hpd_gpio && !p->no_hpd) 544 delay = max(delay, p->desc->delay.prepare_to_enable); 545 546 if (delay) 547 msleep(delay); 548 549 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 550 551 p->enabled = true; 552 553 return 0; 554 } 555 556 static int panel_edp_get_modes(struct drm_panel *panel, 557 struct drm_connector *connector) 558 { 559 struct panel_edp *p = to_panel_edp(panel); 560 int num = 0; 561 562 /* probe EDID if a DDC bus is available */ 563 if (p->ddc) { 564 pm_runtime_get_sync(panel->dev); 565 566 if (!p->edid) 567 p->edid = drm_get_edid(connector, p->ddc); 568 569 if (p->edid) 570 num += drm_add_edid_modes(connector, p->edid); 571 572 pm_runtime_mark_last_busy(panel->dev); 573 pm_runtime_put_autosuspend(panel->dev); 574 } 575 576 /* 577 * Add hard-coded panel modes. Don't call this if there are no timings 578 * and no modes (the generic edp-panel case) because it will clobber 579 * the display_info that was already set by drm_add_edid_modes(). 580 */ 581 if (p->desc->num_timings || p->desc->num_modes) 582 num += panel_edp_get_non_edid_modes(p, connector); 583 else if (!num) 584 dev_warn(p->base.dev, "No display modes\n"); 585 586 /* set up connector's "panel orientation" property */ 587 drm_connector_set_panel_orientation(connector, p->orientation); 588 589 return num; 590 } 591 592 static int panel_edp_get_timings(struct drm_panel *panel, 593 unsigned int num_timings, 594 struct display_timing *timings) 595 { 596 struct panel_edp *p = to_panel_edp(panel); 597 unsigned int i; 598 599 if (p->desc->num_timings < num_timings) 600 num_timings = p->desc->num_timings; 601 602 if (timings) 603 for (i = 0; i < num_timings; i++) 604 timings[i] = p->desc->timings[i]; 605 606 return p->desc->num_timings; 607 } 608 609 static const struct drm_panel_funcs panel_edp_funcs = { 610 .disable = panel_edp_disable, 611 .unprepare = panel_edp_unprepare, 612 .prepare = panel_edp_prepare, 613 .enable = panel_edp_enable, 614 .get_modes = panel_edp_get_modes, 615 .get_timings = panel_edp_get_timings, 616 }; 617 618 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 619 (to_check->field.typ >= bounds->field.min && \ 620 to_check->field.typ <= bounds->field.max) 621 static void panel_edp_parse_panel_timing_node(struct device *dev, 622 struct panel_edp *panel, 623 const struct display_timing *ot) 624 { 625 const struct panel_desc *desc = panel->desc; 626 struct videomode vm; 627 unsigned int i; 628 629 if (WARN_ON(desc->num_modes)) { 630 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 631 return; 632 } 633 if (WARN_ON(!desc->num_timings)) { 634 dev_err(dev, "Reject override mode: no timings specified\n"); 635 return; 636 } 637 638 for (i = 0; i < panel->desc->num_timings; i++) { 639 const struct display_timing *dt = &panel->desc->timings[i]; 640 641 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 642 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 643 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 644 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 645 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 646 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 647 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 648 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 649 continue; 650 651 if (ot->flags != dt->flags) 652 continue; 653 654 videomode_from_timing(ot, &vm); 655 drm_display_mode_from_videomode(&vm, &panel->override_mode); 656 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 657 DRM_MODE_TYPE_PREFERRED; 658 break; 659 } 660 661 if (WARN_ON(!panel->override_mode.type)) 662 dev_err(dev, "Reject override mode: No display_timing found\n"); 663 } 664 665 static const struct edp_panel_entry *find_edp_panel(u32 panel_id); 666 667 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 668 { 669 const struct edp_panel_entry *edp_panel; 670 struct panel_desc *desc; 671 u32 panel_id; 672 char vend[4]; 673 u16 product_id; 674 u32 reliable_ms = 0; 675 u32 absent_ms = 0; 676 int ret; 677 678 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 679 if (!desc) 680 return -ENOMEM; 681 panel->desc = desc; 682 683 /* 684 * Read the dts properties for the initial probe. These are used by 685 * the runtime resume code which will get called by the 686 * pm_runtime_get_sync() call below. 687 */ 688 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 689 desc->delay.hpd_reliable = reliable_ms; 690 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 691 desc->delay.hpd_reliable = absent_ms; 692 693 /* Power the panel on so we can read the EDID */ 694 ret = pm_runtime_get_sync(dev); 695 if (ret < 0) { 696 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret); 697 goto exit; 698 } 699 700 panel_id = drm_edid_get_panel_id(panel->ddc); 701 if (!panel_id) { 702 dev_err(dev, "Couldn't identify panel via EDID\n"); 703 ret = -EIO; 704 goto exit; 705 } 706 drm_edid_decode_panel_id(panel_id, vend, &product_id); 707 708 edp_panel = find_edp_panel(panel_id); 709 710 /* 711 * We're using non-optimized timings and want it really obvious that 712 * someone needs to add an entry to the table, so we'll do a WARN_ON 713 * splat. 714 */ 715 if (WARN_ON(!edp_panel)) { 716 dev_warn(dev, 717 "Unknown panel %s %#06x, using conservative timings\n", 718 vend, product_id); 719 720 /* 721 * It's highly likely that the panel will work if we use very 722 * conservative timings, so let's do that. We already know that 723 * the HPD-related delays must have worked since we got this 724 * far, so we really just need the "unprepare" / "enable" 725 * delays. We don't need "prepare_to_enable" since that 726 * overlaps the "enable" delay anyway. 727 * 728 * Nearly all panels have a "unprepare" delay of 500 ms though 729 * there are a few with 1000. Let's stick 2000 in just to be 730 * super conservative. 731 * 732 * An "enable" delay of 80 ms seems the most common, but we'll 733 * throw in 200 ms to be safe. 734 */ 735 desc->delay.unprepare = 2000; 736 desc->delay.enable = 200; 737 } else { 738 dev_info(dev, "Detected %s %s (%#06x)\n", 739 vend, edp_panel->name, product_id); 740 741 /* Update the delay; everything else comes from EDID */ 742 desc->delay = *edp_panel->delay; 743 } 744 745 ret = 0; 746 exit: 747 pm_runtime_mark_last_busy(dev); 748 pm_runtime_put_autosuspend(dev); 749 750 return ret; 751 } 752 753 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 754 struct drm_dp_aux *aux) 755 { 756 struct panel_edp *panel; 757 struct display_timing dt; 758 struct device_node *ddc; 759 int err; 760 761 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL); 762 if (!panel) 763 return -ENOMEM; 764 765 panel->enabled = false; 766 panel->prepared_time = 0; 767 panel->desc = desc; 768 panel->aux = aux; 769 770 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 771 if (!panel->no_hpd) { 772 err = panel_edp_get_hpd_gpio(dev, panel); 773 if (err) 774 return err; 775 } 776 777 panel->supply = devm_regulator_get(dev, "power"); 778 if (IS_ERR(panel->supply)) 779 return PTR_ERR(panel->supply); 780 781 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 782 GPIOD_OUT_LOW); 783 if (IS_ERR(panel->enable_gpio)) { 784 err = PTR_ERR(panel->enable_gpio); 785 if (err != -EPROBE_DEFER) 786 dev_err(dev, "failed to request GPIO: %d\n", err); 787 return err; 788 } 789 790 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation); 791 if (err) { 792 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 793 return err; 794 } 795 796 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 797 if (ddc) { 798 panel->ddc = of_find_i2c_adapter_by_node(ddc); 799 of_node_put(ddc); 800 801 if (!panel->ddc) 802 return -EPROBE_DEFER; 803 } else if (aux) { 804 panel->ddc = &aux->ddc; 805 } 806 807 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 808 panel_edp_parse_panel_timing_node(dev, panel, &dt); 809 810 dev_set_drvdata(dev, panel); 811 812 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 813 814 err = drm_panel_of_backlight(&panel->base); 815 if (err) 816 goto err_finished_ddc_init; 817 818 /* 819 * We use runtime PM for prepare / unprepare since those power the panel 820 * on and off and those can be very slow operations. This is important 821 * to optimize powering the panel on briefly to read the EDID before 822 * fully enabling the panel. 823 */ 824 pm_runtime_enable(dev); 825 pm_runtime_set_autosuspend_delay(dev, 1000); 826 pm_runtime_use_autosuspend(dev); 827 828 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 829 err = generic_edp_panel_probe(dev, panel); 830 if (err) { 831 dev_err_probe(dev, err, 832 "Couldn't detect panel nor find a fallback\n"); 833 goto err_finished_pm_runtime; 834 } 835 /* generic_edp_panel_probe() replaces desc in the panel */ 836 desc = panel->desc; 837 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 838 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 839 } 840 841 if (!panel->base.backlight && panel->aux) { 842 pm_runtime_get_sync(dev); 843 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 844 pm_runtime_mark_last_busy(dev); 845 pm_runtime_put_autosuspend(dev); 846 if (err) 847 goto err_finished_pm_runtime; 848 } 849 850 drm_panel_add(&panel->base); 851 852 return 0; 853 854 err_finished_pm_runtime: 855 pm_runtime_dont_use_autosuspend(dev); 856 pm_runtime_disable(dev); 857 err_finished_ddc_init: 858 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 859 put_device(&panel->ddc->dev); 860 861 return err; 862 } 863 864 static int panel_edp_remove(struct device *dev) 865 { 866 struct panel_edp *panel = dev_get_drvdata(dev); 867 868 drm_panel_remove(&panel->base); 869 drm_panel_disable(&panel->base); 870 drm_panel_unprepare(&panel->base); 871 872 pm_runtime_dont_use_autosuspend(dev); 873 pm_runtime_disable(dev); 874 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 875 put_device(&panel->ddc->dev); 876 877 kfree(panel->edid); 878 panel->edid = NULL; 879 880 return 0; 881 } 882 883 static void panel_edp_shutdown(struct device *dev) 884 { 885 struct panel_edp *panel = dev_get_drvdata(dev); 886 887 drm_panel_disable(&panel->base); 888 drm_panel_unprepare(&panel->base); 889 } 890 891 static const struct display_timing auo_b101ean01_timing = { 892 .pixelclock = { 65300000, 72500000, 75000000 }, 893 .hactive = { 1280, 1280, 1280 }, 894 .hfront_porch = { 18, 119, 119 }, 895 .hback_porch = { 21, 21, 21 }, 896 .hsync_len = { 32, 32, 32 }, 897 .vactive = { 800, 800, 800 }, 898 .vfront_porch = { 4, 4, 4 }, 899 .vback_porch = { 8, 8, 8 }, 900 .vsync_len = { 18, 20, 20 }, 901 }; 902 903 static const struct panel_desc auo_b101ean01 = { 904 .timings = &auo_b101ean01_timing, 905 .num_timings = 1, 906 .bpc = 6, 907 .size = { 908 .width = 217, 909 .height = 136, 910 }, 911 }; 912 913 static const struct drm_display_mode auo_b116xak01_mode = { 914 .clock = 69300, 915 .hdisplay = 1366, 916 .hsync_start = 1366 + 48, 917 .hsync_end = 1366 + 48 + 32, 918 .htotal = 1366 + 48 + 32 + 10, 919 .vdisplay = 768, 920 .vsync_start = 768 + 4, 921 .vsync_end = 768 + 4 + 6, 922 .vtotal = 768 + 4 + 6 + 15, 923 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 924 }; 925 926 static const struct panel_desc auo_b116xak01 = { 927 .modes = &auo_b116xak01_mode, 928 .num_modes = 1, 929 .bpc = 6, 930 .size = { 931 .width = 256, 932 .height = 144, 933 }, 934 .delay = { 935 .hpd_absent = 200, 936 }, 937 }; 938 939 static const struct drm_display_mode auo_b116xw03_mode = { 940 .clock = 70589, 941 .hdisplay = 1366, 942 .hsync_start = 1366 + 40, 943 .hsync_end = 1366 + 40 + 40, 944 .htotal = 1366 + 40 + 40 + 32, 945 .vdisplay = 768, 946 .vsync_start = 768 + 10, 947 .vsync_end = 768 + 10 + 12, 948 .vtotal = 768 + 10 + 12 + 6, 949 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 950 }; 951 952 static const struct panel_desc auo_b116xw03 = { 953 .modes = &auo_b116xw03_mode, 954 .num_modes = 1, 955 .bpc = 6, 956 .size = { 957 .width = 256, 958 .height = 144, 959 }, 960 .delay = { 961 .enable = 400, 962 }, 963 }; 964 965 static const struct drm_display_mode auo_b133han05_mode = { 966 .clock = 142600, 967 .hdisplay = 1920, 968 .hsync_start = 1920 + 58, 969 .hsync_end = 1920 + 58 + 42, 970 .htotal = 1920 + 58 + 42 + 60, 971 .vdisplay = 1080, 972 .vsync_start = 1080 + 3, 973 .vsync_end = 1080 + 3 + 5, 974 .vtotal = 1080 + 3 + 5 + 54, 975 }; 976 977 static const struct panel_desc auo_b133han05 = { 978 .modes = &auo_b133han05_mode, 979 .num_modes = 1, 980 .bpc = 8, 981 .size = { 982 .width = 293, 983 .height = 165, 984 }, 985 .delay = { 986 .hpd_reliable = 100, 987 .enable = 20, 988 .unprepare = 50, 989 }, 990 }; 991 992 static const struct drm_display_mode auo_b133htn01_mode = { 993 .clock = 150660, 994 .hdisplay = 1920, 995 .hsync_start = 1920 + 172, 996 .hsync_end = 1920 + 172 + 80, 997 .htotal = 1920 + 172 + 80 + 60, 998 .vdisplay = 1080, 999 .vsync_start = 1080 + 25, 1000 .vsync_end = 1080 + 25 + 10, 1001 .vtotal = 1080 + 25 + 10 + 10, 1002 }; 1003 1004 static const struct panel_desc auo_b133htn01 = { 1005 .modes = &auo_b133htn01_mode, 1006 .num_modes = 1, 1007 .bpc = 6, 1008 .size = { 1009 .width = 293, 1010 .height = 165, 1011 }, 1012 .delay = { 1013 .hpd_reliable = 105, 1014 .enable = 20, 1015 .unprepare = 50, 1016 }, 1017 }; 1018 1019 static const struct drm_display_mode auo_b133xtn01_mode = { 1020 .clock = 69500, 1021 .hdisplay = 1366, 1022 .hsync_start = 1366 + 48, 1023 .hsync_end = 1366 + 48 + 32, 1024 .htotal = 1366 + 48 + 32 + 20, 1025 .vdisplay = 768, 1026 .vsync_start = 768 + 3, 1027 .vsync_end = 768 + 3 + 6, 1028 .vtotal = 768 + 3 + 6 + 13, 1029 }; 1030 1031 static const struct panel_desc auo_b133xtn01 = { 1032 .modes = &auo_b133xtn01_mode, 1033 .num_modes = 1, 1034 .bpc = 6, 1035 .size = { 1036 .width = 293, 1037 .height = 165, 1038 }, 1039 }; 1040 1041 static const struct drm_display_mode auo_b140han06_mode = { 1042 .clock = 141000, 1043 .hdisplay = 1920, 1044 .hsync_start = 1920 + 16, 1045 .hsync_end = 1920 + 16 + 16, 1046 .htotal = 1920 + 16 + 16 + 152, 1047 .vdisplay = 1080, 1048 .vsync_start = 1080 + 3, 1049 .vsync_end = 1080 + 3 + 14, 1050 .vtotal = 1080 + 3 + 14 + 19, 1051 }; 1052 1053 static const struct panel_desc auo_b140han06 = { 1054 .modes = &auo_b140han06_mode, 1055 .num_modes = 1, 1056 .bpc = 8, 1057 .size = { 1058 .width = 309, 1059 .height = 174, 1060 }, 1061 .delay = { 1062 .hpd_reliable = 100, 1063 .enable = 20, 1064 .unprepare = 50, 1065 }, 1066 }; 1067 1068 static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1069 { 1070 .clock = 71900, 1071 .hdisplay = 1280, 1072 .hsync_start = 1280 + 48, 1073 .hsync_end = 1280 + 48 + 32, 1074 .htotal = 1280 + 48 + 32 + 80, 1075 .vdisplay = 800, 1076 .vsync_start = 800 + 3, 1077 .vsync_end = 800 + 3 + 5, 1078 .vtotal = 800 + 3 + 5 + 24, 1079 }, 1080 { 1081 .clock = 57500, 1082 .hdisplay = 1280, 1083 .hsync_start = 1280 + 48, 1084 .hsync_end = 1280 + 48 + 32, 1085 .htotal = 1280 + 48 + 32 + 80, 1086 .vdisplay = 800, 1087 .vsync_start = 800 + 3, 1088 .vsync_end = 800 + 3 + 5, 1089 .vtotal = 800 + 3 + 5 + 24, 1090 }, 1091 }; 1092 1093 static const struct panel_desc boe_nv101wxmn51 = { 1094 .modes = boe_nv101wxmn51_modes, 1095 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1096 .bpc = 8, 1097 .size = { 1098 .width = 217, 1099 .height = 136, 1100 }, 1101 .delay = { 1102 /* TODO: should be hpd-absent and no-hpd should be set? */ 1103 .hpd_reliable = 210, 1104 .enable = 50, 1105 .unprepare = 160, 1106 }, 1107 }; 1108 1109 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1110 { 1111 .clock = 207800, 1112 .hdisplay = 2160, 1113 .hsync_start = 2160 + 48, 1114 .hsync_end = 2160 + 48 + 32, 1115 .htotal = 2160 + 48 + 32 + 100, 1116 .vdisplay = 1440, 1117 .vsync_start = 1440 + 3, 1118 .vsync_end = 1440 + 3 + 6, 1119 .vtotal = 1440 + 3 + 6 + 31, 1120 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1121 }, 1122 { 1123 .clock = 138500, 1124 .hdisplay = 2160, 1125 .hsync_start = 2160 + 48, 1126 .hsync_end = 2160 + 48 + 32, 1127 .htotal = 2160 + 48 + 32 + 100, 1128 .vdisplay = 1440, 1129 .vsync_start = 1440 + 3, 1130 .vsync_end = 1440 + 3 + 6, 1131 .vtotal = 1440 + 3 + 6 + 31, 1132 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1133 }, 1134 }; 1135 1136 static const struct panel_desc boe_nv110wtm_n61 = { 1137 .modes = boe_nv110wtm_n61_modes, 1138 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1139 .bpc = 8, 1140 .size = { 1141 .width = 233, 1142 .height = 155, 1143 }, 1144 .delay = { 1145 .hpd_absent = 200, 1146 .prepare_to_enable = 80, 1147 .enable = 50, 1148 .unprepare = 500, 1149 }, 1150 }; 1151 1152 /* Also used for boe_nv133fhm_n62 */ 1153 static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1154 .clock = 147840, 1155 .hdisplay = 1920, 1156 .hsync_start = 1920 + 48, 1157 .hsync_end = 1920 + 48 + 32, 1158 .htotal = 1920 + 48 + 32 + 200, 1159 .vdisplay = 1080, 1160 .vsync_start = 1080 + 3, 1161 .vsync_end = 1080 + 3 + 6, 1162 .vtotal = 1080 + 3 + 6 + 31, 1163 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1164 }; 1165 1166 /* Also used for boe_nv133fhm_n62 */ 1167 static const struct panel_desc boe_nv133fhm_n61 = { 1168 .modes = &boe_nv133fhm_n61_modes, 1169 .num_modes = 1, 1170 .bpc = 6, 1171 .size = { 1172 .width = 294, 1173 .height = 165, 1174 }, 1175 .delay = { 1176 /* 1177 * When power is first given to the panel there's a short 1178 * spike on the HPD line. It was explained that this spike 1179 * was until the TCON data download was complete. On 1180 * one system this was measured at 8 ms. We'll put 15 ms 1181 * in the prepare delay just to be safe. That means: 1182 * - If HPD isn't hooked up you still have 200 ms delay. 1183 * - If HPD is hooked up we won't try to look at it for the 1184 * first 15 ms. 1185 */ 1186 .hpd_reliable = 15, 1187 .hpd_absent = 200, 1188 1189 .unprepare = 500, 1190 }, 1191 }; 1192 1193 static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1194 { 1195 .clock = 148500, 1196 .hdisplay = 1920, 1197 .hsync_start = 1920 + 48, 1198 .hsync_end = 1920 + 48 + 32, 1199 .htotal = 2200, 1200 .vdisplay = 1080, 1201 .vsync_start = 1080 + 3, 1202 .vsync_end = 1080 + 3 + 5, 1203 .vtotal = 1125, 1204 }, 1205 }; 1206 1207 static const struct panel_desc boe_nv140fhmn49 = { 1208 .modes = boe_nv140fhmn49_modes, 1209 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1210 .bpc = 6, 1211 .size = { 1212 .width = 309, 1213 .height = 174, 1214 }, 1215 .delay = { 1216 /* TODO: should be hpd-absent and no-hpd should be set? */ 1217 .hpd_reliable = 210, 1218 .enable = 50, 1219 .unprepare = 160, 1220 }, 1221 }; 1222 1223 static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1224 .clock = 76420, 1225 .hdisplay = 1366, 1226 .hsync_start = 1366 + 136, 1227 .hsync_end = 1366 + 136 + 30, 1228 .htotal = 1366 + 136 + 30 + 60, 1229 .vdisplay = 768, 1230 .vsync_start = 768 + 8, 1231 .vsync_end = 768 + 8 + 12, 1232 .vtotal = 768 + 8 + 12 + 12, 1233 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1234 }; 1235 1236 static const struct panel_desc innolux_n116bca_ea1 = { 1237 .modes = &innolux_n116bca_ea1_mode, 1238 .num_modes = 1, 1239 .bpc = 6, 1240 .size = { 1241 .width = 256, 1242 .height = 144, 1243 }, 1244 .delay = { 1245 .hpd_absent = 200, 1246 .prepare_to_enable = 80, 1247 .unprepare = 500, 1248 }, 1249 }; 1250 1251 /* 1252 * Datasheet specifies that at 60 Hz refresh rate: 1253 * - total horizontal time: { 1506, 1592, 1716 } 1254 * - total vertical time: { 788, 800, 868 } 1255 * 1256 * ...but doesn't go into exactly how that should be split into a front 1257 * porch, back porch, or sync length. For now we'll leave a single setting 1258 * here which allows a bit of tweaking of the pixel clock at the expense of 1259 * refresh rate. 1260 */ 1261 static const struct display_timing innolux_n116bge_timing = { 1262 .pixelclock = { 72600000, 76420000, 80240000 }, 1263 .hactive = { 1366, 1366, 1366 }, 1264 .hfront_porch = { 136, 136, 136 }, 1265 .hback_porch = { 60, 60, 60 }, 1266 .hsync_len = { 30, 30, 30 }, 1267 .vactive = { 768, 768, 768 }, 1268 .vfront_porch = { 8, 8, 8 }, 1269 .vback_porch = { 12, 12, 12 }, 1270 .vsync_len = { 12, 12, 12 }, 1271 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1272 }; 1273 1274 static const struct panel_desc innolux_n116bge = { 1275 .timings = &innolux_n116bge_timing, 1276 .num_timings = 1, 1277 .bpc = 6, 1278 .size = { 1279 .width = 256, 1280 .height = 144, 1281 }, 1282 }; 1283 1284 static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1285 .clock = 162000, 1286 .hdisplay = 1920, 1287 .hsync_start = 1920 + 40, 1288 .hsync_end = 1920 + 40 + 40, 1289 .htotal = 1920 + 40 + 40 + 80, 1290 .vdisplay = 1080, 1291 .vsync_start = 1080 + 4, 1292 .vsync_end = 1080 + 4 + 4, 1293 .vtotal = 1080 + 4 + 4 + 24, 1294 }; 1295 1296 static const struct panel_desc innolux_n125hce_gn1 = { 1297 .modes = &innolux_n125hce_gn1_mode, 1298 .num_modes = 1, 1299 .bpc = 8, 1300 .size = { 1301 .width = 276, 1302 .height = 155, 1303 }, 1304 }; 1305 1306 static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1307 .clock = 206016, 1308 .hdisplay = 2160, 1309 .hsync_start = 2160 + 48, 1310 .hsync_end = 2160 + 48 + 32, 1311 .htotal = 2160 + 48 + 32 + 80, 1312 .vdisplay = 1440, 1313 .vsync_start = 1440 + 3, 1314 .vsync_end = 1440 + 3 + 10, 1315 .vtotal = 1440 + 3 + 10 + 27, 1316 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1317 }; 1318 1319 static const struct panel_desc innolux_p120zdg_bf1 = { 1320 .modes = &innolux_p120zdg_bf1_mode, 1321 .num_modes = 1, 1322 .bpc = 8, 1323 .size = { 1324 .width = 254, 1325 .height = 169, 1326 }, 1327 .delay = { 1328 .hpd_absent = 200, 1329 .unprepare = 500, 1330 }, 1331 }; 1332 1333 static const struct drm_display_mode ivo_m133nwf4_r0_mode = { 1334 .clock = 138778, 1335 .hdisplay = 1920, 1336 .hsync_start = 1920 + 24, 1337 .hsync_end = 1920 + 24 + 48, 1338 .htotal = 1920 + 24 + 48 + 88, 1339 .vdisplay = 1080, 1340 .vsync_start = 1080 + 3, 1341 .vsync_end = 1080 + 3 + 12, 1342 .vtotal = 1080 + 3 + 12 + 17, 1343 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1344 }; 1345 1346 static const struct panel_desc ivo_m133nwf4_r0 = { 1347 .modes = &ivo_m133nwf4_r0_mode, 1348 .num_modes = 1, 1349 .bpc = 8, 1350 .size = { 1351 .width = 294, 1352 .height = 165, 1353 }, 1354 .delay = { 1355 .hpd_absent = 200, 1356 .unprepare = 500, 1357 }, 1358 }; 1359 1360 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1361 .clock = 81000, 1362 .hdisplay = 1366, 1363 .hsync_start = 1366 + 40, 1364 .hsync_end = 1366 + 40 + 32, 1365 .htotal = 1366 + 40 + 32 + 62, 1366 .vdisplay = 768, 1367 .vsync_start = 768 + 5, 1368 .vsync_end = 768 + 5 + 5, 1369 .vtotal = 768 + 5 + 5 + 122, 1370 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1371 }; 1372 1373 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1374 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1375 .num_modes = 1, 1376 .bpc = 6, 1377 .size = { 1378 .width = 256, 1379 .height = 144, 1380 }, 1381 .delay = { 1382 .hpd_absent = 200, 1383 }, 1384 }; 1385 1386 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1387 .clock = 200000, 1388 .hdisplay = 1536, 1389 .hsync_start = 1536 + 12, 1390 .hsync_end = 1536 + 12 + 16, 1391 .htotal = 1536 + 12 + 16 + 48, 1392 .vdisplay = 2048, 1393 .vsync_start = 2048 + 8, 1394 .vsync_end = 2048 + 8 + 4, 1395 .vtotal = 2048 + 8 + 4 + 8, 1396 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1397 }; 1398 1399 static const struct panel_desc lg_lp079qx1_sp0v = { 1400 .modes = &lg_lp079qx1_sp0v_mode, 1401 .num_modes = 1, 1402 .size = { 1403 .width = 129, 1404 .height = 171, 1405 }, 1406 }; 1407 1408 static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1409 .clock = 205210, 1410 .hdisplay = 2048, 1411 .hsync_start = 2048 + 150, 1412 .hsync_end = 2048 + 150 + 5, 1413 .htotal = 2048 + 150 + 5 + 5, 1414 .vdisplay = 1536, 1415 .vsync_start = 1536 + 3, 1416 .vsync_end = 1536 + 3 + 1, 1417 .vtotal = 1536 + 3 + 1 + 9, 1418 }; 1419 1420 static const struct panel_desc lg_lp097qx1_spa1 = { 1421 .modes = &lg_lp097qx1_spa1_mode, 1422 .num_modes = 1, 1423 .size = { 1424 .width = 208, 1425 .height = 147, 1426 }, 1427 }; 1428 1429 static const struct drm_display_mode lg_lp120up1_mode = { 1430 .clock = 162300, 1431 .hdisplay = 1920, 1432 .hsync_start = 1920 + 40, 1433 .hsync_end = 1920 + 40 + 40, 1434 .htotal = 1920 + 40 + 40 + 80, 1435 .vdisplay = 1280, 1436 .vsync_start = 1280 + 4, 1437 .vsync_end = 1280 + 4 + 4, 1438 .vtotal = 1280 + 4 + 4 + 12, 1439 }; 1440 1441 static const struct panel_desc lg_lp120up1 = { 1442 .modes = &lg_lp120up1_mode, 1443 .num_modes = 1, 1444 .bpc = 8, 1445 .size = { 1446 .width = 267, 1447 .height = 183, 1448 }, 1449 }; 1450 1451 static const struct drm_display_mode lg_lp129qe_mode = { 1452 .clock = 285250, 1453 .hdisplay = 2560, 1454 .hsync_start = 2560 + 48, 1455 .hsync_end = 2560 + 48 + 32, 1456 .htotal = 2560 + 48 + 32 + 80, 1457 .vdisplay = 1700, 1458 .vsync_start = 1700 + 3, 1459 .vsync_end = 1700 + 3 + 10, 1460 .vtotal = 1700 + 3 + 10 + 36, 1461 }; 1462 1463 static const struct panel_desc lg_lp129qe = { 1464 .modes = &lg_lp129qe_mode, 1465 .num_modes = 1, 1466 .bpc = 8, 1467 .size = { 1468 .width = 272, 1469 .height = 181, 1470 }, 1471 }; 1472 1473 static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1474 { 1475 .clock = 138500, 1476 .hdisplay = 1920, 1477 .hsync_start = 1920 + 48, 1478 .hsync_end = 1920 + 48 + 32, 1479 .htotal = 1920 + 48 + 32 + 80, 1480 .vdisplay = 1080, 1481 .vsync_start = 1080 + 3, 1482 .vsync_end = 1080 + 3 + 5, 1483 .vtotal = 1080 + 3 + 5 + 23, 1484 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1485 }, { 1486 .clock = 110920, 1487 .hdisplay = 1920, 1488 .hsync_start = 1920 + 48, 1489 .hsync_end = 1920 + 48 + 32, 1490 .htotal = 1920 + 48 + 32 + 80, 1491 .vdisplay = 1080, 1492 .vsync_start = 1080 + 3, 1493 .vsync_end = 1080 + 3 + 5, 1494 .vtotal = 1080 + 3 + 5 + 23, 1495 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1496 } 1497 }; 1498 1499 static const struct panel_desc neweast_wjfh116008a = { 1500 .modes = neweast_wjfh116008a_modes, 1501 .num_modes = 2, 1502 .bpc = 6, 1503 .size = { 1504 .width = 260, 1505 .height = 150, 1506 }, 1507 .delay = { 1508 .hpd_reliable = 110, 1509 .enable = 20, 1510 .unprepare = 500, 1511 }, 1512 }; 1513 1514 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1515 .clock = 271560, 1516 .hdisplay = 2560, 1517 .hsync_start = 2560 + 48, 1518 .hsync_end = 2560 + 48 + 32, 1519 .htotal = 2560 + 48 + 32 + 80, 1520 .vdisplay = 1600, 1521 .vsync_start = 1600 + 2, 1522 .vsync_end = 1600 + 2 + 5, 1523 .vtotal = 1600 + 2 + 5 + 57, 1524 }; 1525 1526 static const struct panel_desc samsung_lsn122dl01_c01 = { 1527 .modes = &samsung_lsn122dl01_c01_mode, 1528 .num_modes = 1, 1529 .size = { 1530 .width = 263, 1531 .height = 164, 1532 }, 1533 }; 1534 1535 static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1536 .clock = 76300, 1537 .hdisplay = 1366, 1538 .hsync_start = 1366 + 64, 1539 .hsync_end = 1366 + 64 + 48, 1540 .htotal = 1366 + 64 + 48 + 128, 1541 .vdisplay = 768, 1542 .vsync_start = 768 + 2, 1543 .vsync_end = 768 + 2 + 5, 1544 .vtotal = 768 + 2 + 5 + 17, 1545 }; 1546 1547 static const struct panel_desc samsung_ltn140at29_301 = { 1548 .modes = &samsung_ltn140at29_301_mode, 1549 .num_modes = 1, 1550 .bpc = 6, 1551 .size = { 1552 .width = 320, 1553 .height = 187, 1554 }, 1555 }; 1556 1557 static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1558 .clock = 168480, 1559 .hdisplay = 1920, 1560 .hsync_start = 1920 + 48, 1561 .hsync_end = 1920 + 48 + 32, 1562 .htotal = 1920 + 48 + 32 + 80, 1563 .vdisplay = 1280, 1564 .vsync_start = 1280 + 3, 1565 .vsync_end = 1280 + 3 + 10, 1566 .vtotal = 1280 + 3 + 10 + 57, 1567 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1568 }; 1569 1570 static const struct panel_desc sharp_ld_d5116z01b = { 1571 .modes = &sharp_ld_d5116z01b_mode, 1572 .num_modes = 1, 1573 .bpc = 8, 1574 .size = { 1575 .width = 260, 1576 .height = 120, 1577 }, 1578 }; 1579 1580 static const struct display_timing sharp_lq123p1jx31_timing = { 1581 .pixelclock = { 252750000, 252750000, 266604720 }, 1582 .hactive = { 2400, 2400, 2400 }, 1583 .hfront_porch = { 48, 48, 48 }, 1584 .hback_porch = { 80, 80, 84 }, 1585 .hsync_len = { 32, 32, 32 }, 1586 .vactive = { 1600, 1600, 1600 }, 1587 .vfront_porch = { 3, 3, 3 }, 1588 .vback_porch = { 33, 33, 120 }, 1589 .vsync_len = { 10, 10, 10 }, 1590 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1591 }; 1592 1593 static const struct panel_desc sharp_lq123p1jx31 = { 1594 .timings = &sharp_lq123p1jx31_timing, 1595 .num_timings = 1, 1596 .bpc = 8, 1597 .size = { 1598 .width = 259, 1599 .height = 173, 1600 }, 1601 .delay = { 1602 .hpd_reliable = 110, 1603 .enable = 50, 1604 .unprepare = 550, 1605 }, 1606 }; 1607 1608 static const struct drm_display_mode starry_kr122ea0sra_mode = { 1609 .clock = 147000, 1610 .hdisplay = 1920, 1611 .hsync_start = 1920 + 16, 1612 .hsync_end = 1920 + 16 + 16, 1613 .htotal = 1920 + 16 + 16 + 32, 1614 .vdisplay = 1200, 1615 .vsync_start = 1200 + 15, 1616 .vsync_end = 1200 + 15 + 2, 1617 .vtotal = 1200 + 15 + 2 + 18, 1618 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1619 }; 1620 1621 static const struct panel_desc starry_kr122ea0sra = { 1622 .modes = &starry_kr122ea0sra_mode, 1623 .num_modes = 1, 1624 .size = { 1625 .width = 263, 1626 .height = 164, 1627 }, 1628 .delay = { 1629 /* TODO: should be hpd-absent and no-hpd should be set? */ 1630 .hpd_reliable = 10 + 200, 1631 .enable = 50, 1632 .unprepare = 10 + 500, 1633 }, 1634 }; 1635 1636 static const struct of_device_id platform_of_match[] = { 1637 { 1638 /* Must be first */ 1639 .compatible = "edp-panel", 1640 }, { 1641 .compatible = "auo,b101ean01", 1642 .data = &auo_b101ean01, 1643 }, { 1644 .compatible = "auo,b116xa01", 1645 .data = &auo_b116xak01, 1646 }, { 1647 .compatible = "auo,b116xw03", 1648 .data = &auo_b116xw03, 1649 }, { 1650 .compatible = "auo,b133han05", 1651 .data = &auo_b133han05, 1652 }, { 1653 .compatible = "auo,b133htn01", 1654 .data = &auo_b133htn01, 1655 }, { 1656 .compatible = "auo,b133xtn01", 1657 .data = &auo_b133xtn01, 1658 }, { 1659 .compatible = "auo,b140han06", 1660 .data = &auo_b140han06, 1661 }, { 1662 .compatible = "boe,nv101wxmn51", 1663 .data = &boe_nv101wxmn51, 1664 }, { 1665 .compatible = "boe,nv110wtm-n61", 1666 .data = &boe_nv110wtm_n61, 1667 }, { 1668 .compatible = "boe,nv133fhm-n61", 1669 .data = &boe_nv133fhm_n61, 1670 }, { 1671 .compatible = "boe,nv133fhm-n62", 1672 .data = &boe_nv133fhm_n61, 1673 }, { 1674 .compatible = "boe,nv140fhmn49", 1675 .data = &boe_nv140fhmn49, 1676 }, { 1677 .compatible = "innolux,n116bca-ea1", 1678 .data = &innolux_n116bca_ea1, 1679 }, { 1680 .compatible = "innolux,n116bge", 1681 .data = &innolux_n116bge, 1682 }, { 1683 .compatible = "innolux,n125hce-gn1", 1684 .data = &innolux_n125hce_gn1, 1685 }, { 1686 .compatible = "innolux,p120zdg-bf1", 1687 .data = &innolux_p120zdg_bf1, 1688 }, { 1689 .compatible = "ivo,m133nwf4-r0", 1690 .data = &ivo_m133nwf4_r0, 1691 }, { 1692 .compatible = "kingdisplay,kd116n21-30nv-a010", 1693 .data = &kingdisplay_kd116n21_30nv_a010, 1694 }, { 1695 .compatible = "lg,lp079qx1-sp0v", 1696 .data = &lg_lp079qx1_sp0v, 1697 }, { 1698 .compatible = "lg,lp097qx1-spa1", 1699 .data = &lg_lp097qx1_spa1, 1700 }, { 1701 .compatible = "lg,lp120up1", 1702 .data = &lg_lp120up1, 1703 }, { 1704 .compatible = "lg,lp129qe", 1705 .data = &lg_lp129qe, 1706 }, { 1707 .compatible = "neweast,wjfh116008a", 1708 .data = &neweast_wjfh116008a, 1709 }, { 1710 .compatible = "samsung,lsn122dl01-c01", 1711 .data = &samsung_lsn122dl01_c01, 1712 }, { 1713 .compatible = "samsung,ltn140at29-301", 1714 .data = &samsung_ltn140at29_301, 1715 }, { 1716 .compatible = "sharp,ld-d5116z01b", 1717 .data = &sharp_ld_d5116z01b, 1718 }, { 1719 .compatible = "sharp,lq123p1jx31", 1720 .data = &sharp_lq123p1jx31, 1721 }, { 1722 .compatible = "starry,kr122ea0sra", 1723 .data = &starry_kr122ea0sra, 1724 }, { 1725 /* sentinel */ 1726 } 1727 }; 1728 MODULE_DEVICE_TABLE(of, platform_of_match); 1729 1730 static const struct panel_delay delay_200_500_p2e80 = { 1731 .hpd_absent = 200, 1732 .unprepare = 500, 1733 .prepare_to_enable = 80, 1734 }; 1735 1736 static const struct panel_delay delay_200_500_p2e100 = { 1737 .hpd_absent = 200, 1738 .unprepare = 500, 1739 .prepare_to_enable = 100, 1740 }; 1741 1742 static const struct panel_delay delay_200_500_e50 = { 1743 .hpd_absent = 200, 1744 .unprepare = 500, 1745 .enable = 50, 1746 }; 1747 1748 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1749 { \ 1750 .name = _name, \ 1751 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1752 product_id), \ 1753 .delay = _delay \ 1754 } 1755 1756 /* 1757 * This table is used to figure out power sequencing delays for panels that 1758 * are detected by EDID. Entries here may point to entries in the 1759 * platform_of_match table (if a panel is listed in both places). 1760 * 1761 * Sort first by vendor, then by product ID. 1762 */ 1763 static const struct edp_panel_entry edp_panels[] = { 1764 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01"), 1765 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"), 1766 1767 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 1768 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 1769 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 1770 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 1771 1772 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 1773 1774 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 1775 1776 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 1777 1778 { /* sentinal */ } 1779 }; 1780 1781 static const struct edp_panel_entry *find_edp_panel(u32 panel_id) 1782 { 1783 const struct edp_panel_entry *panel; 1784 1785 if (!panel_id) 1786 return NULL; 1787 1788 for (panel = edp_panels; panel->panel_id; panel++) 1789 if (panel->panel_id == panel_id) 1790 return panel; 1791 1792 return NULL; 1793 } 1794 1795 static int panel_edp_platform_probe(struct platform_device *pdev) 1796 { 1797 const struct of_device_id *id; 1798 1799 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 1800 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 1801 if (!id) 1802 return -ENODEV; 1803 1804 return panel_edp_probe(&pdev->dev, id->data, NULL); 1805 } 1806 1807 static int panel_edp_platform_remove(struct platform_device *pdev) 1808 { 1809 return panel_edp_remove(&pdev->dev); 1810 } 1811 1812 static void panel_edp_platform_shutdown(struct platform_device *pdev) 1813 { 1814 panel_edp_shutdown(&pdev->dev); 1815 } 1816 1817 static const struct dev_pm_ops panel_edp_pm_ops = { 1818 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 1819 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1820 pm_runtime_force_resume) 1821 }; 1822 1823 static struct platform_driver panel_edp_platform_driver = { 1824 .driver = { 1825 .name = "panel-edp", 1826 .of_match_table = platform_of_match, 1827 .pm = &panel_edp_pm_ops, 1828 }, 1829 .probe = panel_edp_platform_probe, 1830 .remove = panel_edp_platform_remove, 1831 .shutdown = panel_edp_platform_shutdown, 1832 }; 1833 1834 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 1835 { 1836 const struct of_device_id *id; 1837 1838 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 1839 if (!id) 1840 return -ENODEV; 1841 1842 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 1843 } 1844 1845 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 1846 { 1847 panel_edp_remove(&aux_ep->dev); 1848 } 1849 1850 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 1851 { 1852 panel_edp_shutdown(&aux_ep->dev); 1853 } 1854 1855 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 1856 .driver = { 1857 .name = "panel-simple-dp-aux", 1858 .of_match_table = platform_of_match, /* Same as platform one! */ 1859 .pm = &panel_edp_pm_ops, 1860 }, 1861 .probe = panel_edp_dp_aux_ep_probe, 1862 .remove = panel_edp_dp_aux_ep_remove, 1863 .shutdown = panel_edp_dp_aux_ep_shutdown, 1864 }; 1865 1866 static int __init panel_edp_init(void) 1867 { 1868 int err; 1869 1870 err = platform_driver_register(&panel_edp_platform_driver); 1871 if (err < 0) 1872 return err; 1873 1874 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 1875 if (err < 0) 1876 goto err_did_platform_register; 1877 1878 return 0; 1879 1880 err_did_platform_register: 1881 platform_driver_unregister(&panel_edp_platform_driver); 1882 1883 return err; 1884 } 1885 module_init(panel_edp_init); 1886 1887 static void __exit panel_edp_exit(void) 1888 { 1889 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 1890 platform_driver_unregister(&panel_edp_platform_driver); 1891 } 1892 module_exit(panel_edp_exit); 1893 1894 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 1895 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 1896 MODULE_LICENSE("GPL and additional rights"); 1897