1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2018 MediaTek Inc. 4 * Author: Jitao Shi <jitao.shi@mediatek.com> 5 */ 6 7 #include <linux/delay.h> 8 #include <linux/gpio/consumer.h> 9 #include <linux/module.h> 10 #include <linux/of.h> 11 #include <linux/of_device.h> 12 #include <linux/regulator/consumer.h> 13 14 #include <drm/drm_connector.h> 15 #include <drm/drm_crtc.h> 16 #include <drm/drm_mipi_dsi.h> 17 #include <drm/drm_panel.h> 18 19 #include <video/mipi_display.h> 20 21 struct panel_desc { 22 const struct drm_display_mode *modes; 23 unsigned int bpc; 24 25 /** 26 * @width_mm: width of the panel's active display area 27 * @height_mm: height of the panel's active display area 28 */ 29 struct { 30 unsigned int width_mm; 31 unsigned int height_mm; 32 } size; 33 34 unsigned long mode_flags; 35 enum mipi_dsi_pixel_format format; 36 const struct panel_init_cmd *init_cmds; 37 unsigned int lanes; 38 bool discharge_on_disable; 39 bool lp11_before_reset; 40 }; 41 42 struct boe_panel { 43 struct drm_panel base; 44 struct mipi_dsi_device *dsi; 45 46 const struct panel_desc *desc; 47 48 enum drm_panel_orientation orientation; 49 struct regulator *pp3300; 50 struct regulator *pp1800; 51 struct regulator *avee; 52 struct regulator *avdd; 53 struct gpio_desc *enable_gpio; 54 55 bool prepared; 56 }; 57 58 enum dsi_cmd_type { 59 INIT_DCS_CMD, 60 DELAY_CMD, 61 }; 62 63 struct panel_init_cmd { 64 enum dsi_cmd_type type; 65 size_t len; 66 const char *data; 67 }; 68 69 #define _INIT_DCS_CMD(...) { \ 70 .type = INIT_DCS_CMD, \ 71 .len = sizeof((char[]){__VA_ARGS__}), \ 72 .data = (char[]){__VA_ARGS__} } 73 74 #define _INIT_DELAY_CMD(...) { \ 75 .type = DELAY_CMD,\ 76 .len = sizeof((char[]){__VA_ARGS__}), \ 77 .data = (char[]){__VA_ARGS__} } 78 79 static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = { 80 _INIT_DCS_CMD(0xFF, 0x20), 81 _INIT_DCS_CMD(0xFB, 0x01), 82 _INIT_DCS_CMD(0x05, 0xD9), 83 _INIT_DCS_CMD(0x07, 0x78), 84 _INIT_DCS_CMD(0x08, 0x5A), 85 _INIT_DCS_CMD(0x0D, 0x63), 86 _INIT_DCS_CMD(0x0E, 0x91), 87 _INIT_DCS_CMD(0x0F, 0x73), 88 _INIT_DCS_CMD(0x95, 0xE6), 89 _INIT_DCS_CMD(0x96, 0xF0), 90 _INIT_DCS_CMD(0x30, 0x00), 91 _INIT_DCS_CMD(0x6D, 0x66), 92 _INIT_DCS_CMD(0x75, 0xA2), 93 _INIT_DCS_CMD(0x77, 0x3B), 94 95 _INIT_DCS_CMD(0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9), 96 _INIT_DCS_CMD(0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31), 97 _INIT_DCS_CMD(0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B), 98 _INIT_DCS_CMD(0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF), 99 100 _INIT_DCS_CMD(0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9), 101 _INIT_DCS_CMD(0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31), 102 _INIT_DCS_CMD(0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B), 103 _INIT_DCS_CMD(0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF), 104 _INIT_DCS_CMD(0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9), 105 _INIT_DCS_CMD(0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31), 106 _INIT_DCS_CMD(0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B), 107 _INIT_DCS_CMD(0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF), 108 109 _INIT_DCS_CMD(0xFF, 0x21), 110 _INIT_DCS_CMD(0xFB, 0x01), 111 112 _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), 113 _INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), 114 _INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), 115 116 _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0), 117 _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), 118 _INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), 119 _INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), 120 _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0), 121 122 _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), 123 _INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), 124 _INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), 125 126 _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0), 127 _INIT_DCS_CMD(0xFF, 0x24), 128 _INIT_DCS_CMD(0xFB, 0x01), 129 130 _INIT_DCS_CMD(0x00, 0x00), 131 _INIT_DCS_CMD(0x01, 0x00), 132 133 _INIT_DCS_CMD(0x02, 0x1C), 134 _INIT_DCS_CMD(0x03, 0x1C), 135 136 _INIT_DCS_CMD(0x04, 0x1D), 137 _INIT_DCS_CMD(0x05, 0x1D), 138 139 _INIT_DCS_CMD(0x06, 0x04), 140 _INIT_DCS_CMD(0x07, 0x04), 141 142 _INIT_DCS_CMD(0x08, 0x0F), 143 _INIT_DCS_CMD(0x09, 0x0F), 144 145 _INIT_DCS_CMD(0x0A, 0x0E), 146 _INIT_DCS_CMD(0x0B, 0x0E), 147 148 _INIT_DCS_CMD(0x0C, 0x0D), 149 _INIT_DCS_CMD(0x0D, 0x0D), 150 151 _INIT_DCS_CMD(0x0E, 0x0C), 152 _INIT_DCS_CMD(0x0F, 0x0C), 153 154 _INIT_DCS_CMD(0x10, 0x08), 155 _INIT_DCS_CMD(0x11, 0x08), 156 157 _INIT_DCS_CMD(0x12, 0x00), 158 _INIT_DCS_CMD(0x13, 0x00), 159 _INIT_DCS_CMD(0x14, 0x00), 160 _INIT_DCS_CMD(0x15, 0x00), 161 162 _INIT_DCS_CMD(0x16, 0x00), 163 _INIT_DCS_CMD(0x17, 0x00), 164 165 _INIT_DCS_CMD(0x18, 0x1C), 166 _INIT_DCS_CMD(0x19, 0x1C), 167 168 _INIT_DCS_CMD(0x1A, 0x1D), 169 _INIT_DCS_CMD(0x1B, 0x1D), 170 171 _INIT_DCS_CMD(0x1C, 0x04), 172 _INIT_DCS_CMD(0x1D, 0x04), 173 174 _INIT_DCS_CMD(0x1E, 0x0F), 175 _INIT_DCS_CMD(0x1F, 0x0F), 176 177 _INIT_DCS_CMD(0x20, 0x0E), 178 _INIT_DCS_CMD(0x21, 0x0E), 179 180 _INIT_DCS_CMD(0x22, 0x0D), 181 _INIT_DCS_CMD(0x23, 0x0D), 182 183 _INIT_DCS_CMD(0x24, 0x0C), 184 _INIT_DCS_CMD(0x25, 0x0C), 185 186 _INIT_DCS_CMD(0x26, 0x08), 187 _INIT_DCS_CMD(0x27, 0x08), 188 189 _INIT_DCS_CMD(0x28, 0x00), 190 _INIT_DCS_CMD(0x29, 0x00), 191 _INIT_DCS_CMD(0x2A, 0x00), 192 _INIT_DCS_CMD(0x2B, 0x00), 193 194 _INIT_DCS_CMD(0x2D, 0x20), 195 _INIT_DCS_CMD(0x2F, 0x0A), 196 _INIT_DCS_CMD(0x30, 0x44), 197 _INIT_DCS_CMD(0x33, 0x0C), 198 _INIT_DCS_CMD(0x34, 0x32), 199 200 _INIT_DCS_CMD(0x37, 0x44), 201 _INIT_DCS_CMD(0x38, 0x40), 202 _INIT_DCS_CMD(0x39, 0x00), 203 _INIT_DCS_CMD(0x3A, 0x5D), 204 _INIT_DCS_CMD(0x3B, 0x60), 205 _INIT_DCS_CMD(0x3D, 0x42), 206 _INIT_DCS_CMD(0x3F, 0x06), 207 _INIT_DCS_CMD(0x43, 0x06), 208 _INIT_DCS_CMD(0x47, 0x66), 209 _INIT_DCS_CMD(0x4A, 0x5D), 210 _INIT_DCS_CMD(0x4B, 0x60), 211 _INIT_DCS_CMD(0x4C, 0x91), 212 _INIT_DCS_CMD(0x4D, 0x21), 213 _INIT_DCS_CMD(0x4E, 0x43), 214 _INIT_DCS_CMD(0x51, 0x12), 215 _INIT_DCS_CMD(0x52, 0x34), 216 _INIT_DCS_CMD(0x55, 0x82, 0x02), 217 _INIT_DCS_CMD(0x56, 0x04), 218 _INIT_DCS_CMD(0x58, 0x21), 219 _INIT_DCS_CMD(0x59, 0x30), 220 _INIT_DCS_CMD(0x5A, 0x60), 221 _INIT_DCS_CMD(0x5B, 0x50), 222 _INIT_DCS_CMD(0x5E, 0x00, 0x06), 223 _INIT_DCS_CMD(0x5F, 0x00), 224 _INIT_DCS_CMD(0x65, 0x82), 225 _INIT_DCS_CMD(0x7E, 0x20), 226 _INIT_DCS_CMD(0x7F, 0x3C), 227 _INIT_DCS_CMD(0x82, 0x04), 228 _INIT_DCS_CMD(0x97, 0xC0), 229 230 _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00), 231 _INIT_DCS_CMD(0x91, 0x44), 232 _INIT_DCS_CMD(0x92, 0xA9), 233 _INIT_DCS_CMD(0x93, 0x1A), 234 _INIT_DCS_CMD(0x94, 0x96), 235 _INIT_DCS_CMD(0xD7, 0x55), 236 _INIT_DCS_CMD(0xDA, 0x0A), 237 _INIT_DCS_CMD(0xDE, 0x08), 238 _INIT_DCS_CMD(0xDB, 0x05), 239 _INIT_DCS_CMD(0xDC, 0xA9), 240 _INIT_DCS_CMD(0xDD, 0x22), 241 242 _INIT_DCS_CMD(0xDF, 0x05), 243 _INIT_DCS_CMD(0xE0, 0xA9), 244 _INIT_DCS_CMD(0xE1, 0x05), 245 _INIT_DCS_CMD(0xE2, 0xA9), 246 _INIT_DCS_CMD(0xE3, 0x05), 247 _INIT_DCS_CMD(0xE4, 0xA9), 248 _INIT_DCS_CMD(0xE5, 0x05), 249 _INIT_DCS_CMD(0xE6, 0xA9), 250 _INIT_DCS_CMD(0x5C, 0x00), 251 _INIT_DCS_CMD(0x5D, 0x00), 252 _INIT_DCS_CMD(0x8D, 0x00), 253 _INIT_DCS_CMD(0x8E, 0x00), 254 _INIT_DCS_CMD(0xB5, 0x90), 255 _INIT_DCS_CMD(0xFF, 0x25), 256 _INIT_DCS_CMD(0xFB, 0x01), 257 _INIT_DCS_CMD(0x05, 0x00), 258 _INIT_DCS_CMD(0x19, 0x07), 259 _INIT_DCS_CMD(0x1F, 0x60), 260 _INIT_DCS_CMD(0x20, 0x50), 261 _INIT_DCS_CMD(0x26, 0x60), 262 _INIT_DCS_CMD(0x27, 0x50), 263 _INIT_DCS_CMD(0x33, 0x60), 264 _INIT_DCS_CMD(0x34, 0x50), 265 _INIT_DCS_CMD(0x3F, 0xE0), 266 _INIT_DCS_CMD(0x40, 0x00), 267 _INIT_DCS_CMD(0x44, 0x00), 268 _INIT_DCS_CMD(0x45, 0x40), 269 _INIT_DCS_CMD(0x48, 0x60), 270 _INIT_DCS_CMD(0x49, 0x50), 271 _INIT_DCS_CMD(0x5B, 0x00), 272 _INIT_DCS_CMD(0x5C, 0x00), 273 _INIT_DCS_CMD(0x5D, 0x00), 274 _INIT_DCS_CMD(0x5E, 0xD0), 275 _INIT_DCS_CMD(0x61, 0x60), 276 _INIT_DCS_CMD(0x62, 0x50), 277 _INIT_DCS_CMD(0xF1, 0x10), 278 _INIT_DCS_CMD(0xFF, 0x2A), 279 _INIT_DCS_CMD(0xFB, 0x01), 280 281 _INIT_DCS_CMD(0x64, 0x16), 282 _INIT_DCS_CMD(0x67, 0x16), 283 _INIT_DCS_CMD(0x6A, 0x16), 284 285 _INIT_DCS_CMD(0x70, 0x30), 286 287 _INIT_DCS_CMD(0xA2, 0xF3), 288 _INIT_DCS_CMD(0xA3, 0xFF), 289 _INIT_DCS_CMD(0xA4, 0xFF), 290 _INIT_DCS_CMD(0xA5, 0xFF), 291 292 _INIT_DCS_CMD(0xD6, 0x08), 293 294 _INIT_DCS_CMD(0xFF, 0x26), 295 _INIT_DCS_CMD(0xFB, 0x01), 296 _INIT_DCS_CMD(0x00, 0xA1), 297 298 _INIT_DCS_CMD(0x02, 0x31), 299 _INIT_DCS_CMD(0x04, 0x28), 300 _INIT_DCS_CMD(0x06, 0x30), 301 _INIT_DCS_CMD(0x0C, 0x16), 302 _INIT_DCS_CMD(0x0D, 0x0D), 303 _INIT_DCS_CMD(0x0F, 0x00), 304 _INIT_DCS_CMD(0x11, 0x00), 305 _INIT_DCS_CMD(0x12, 0x50), 306 _INIT_DCS_CMD(0x13, 0x56), 307 _INIT_DCS_CMD(0x14, 0x57), 308 _INIT_DCS_CMD(0x15, 0x00), 309 _INIT_DCS_CMD(0x16, 0x10), 310 _INIT_DCS_CMD(0x17, 0xA0), 311 _INIT_DCS_CMD(0x18, 0x86), 312 _INIT_DCS_CMD(0x19, 0x0D), 313 _INIT_DCS_CMD(0x1A, 0x7F), 314 _INIT_DCS_CMD(0x1B, 0x0C), 315 _INIT_DCS_CMD(0x1C, 0xBF), 316 _INIT_DCS_CMD(0x22, 0x00), 317 _INIT_DCS_CMD(0x23, 0x00), 318 _INIT_DCS_CMD(0x2A, 0x0D), 319 _INIT_DCS_CMD(0x2B, 0x7F), 320 321 _INIT_DCS_CMD(0x1D, 0x00), 322 _INIT_DCS_CMD(0x1E, 0x65), 323 _INIT_DCS_CMD(0x1F, 0x65), 324 _INIT_DCS_CMD(0x24, 0x00), 325 _INIT_DCS_CMD(0x25, 0x65), 326 _INIT_DCS_CMD(0x2F, 0x05), 327 _INIT_DCS_CMD(0x30, 0x65), 328 _INIT_DCS_CMD(0x31, 0x05), 329 _INIT_DCS_CMD(0x32, 0x7D), 330 _INIT_DCS_CMD(0x39, 0x00), 331 _INIT_DCS_CMD(0x3A, 0x65), 332 _INIT_DCS_CMD(0x20, 0x01), 333 _INIT_DCS_CMD(0x33, 0x11), 334 _INIT_DCS_CMD(0x34, 0x78), 335 _INIT_DCS_CMD(0x35, 0x16), 336 _INIT_DCS_CMD(0xC8, 0x04), 337 _INIT_DCS_CMD(0xC9, 0x9E), 338 _INIT_DCS_CMD(0xCA, 0x4E), 339 _INIT_DCS_CMD(0xCB, 0x00), 340 341 _INIT_DCS_CMD(0xA9, 0x49), 342 _INIT_DCS_CMD(0xAA, 0x4B), 343 _INIT_DCS_CMD(0xAB, 0x48), 344 _INIT_DCS_CMD(0xAC, 0x43), 345 _INIT_DCS_CMD(0xAD, 0x40), 346 _INIT_DCS_CMD(0xAE, 0x50), 347 _INIT_DCS_CMD(0xAF, 0x44), 348 _INIT_DCS_CMD(0xB0, 0x54), 349 _INIT_DCS_CMD(0xB1, 0x4E), 350 _INIT_DCS_CMD(0xB2, 0x4D), 351 _INIT_DCS_CMD(0xB3, 0x4C), 352 _INIT_DCS_CMD(0xB4, 0x41), 353 _INIT_DCS_CMD(0xB5, 0x47), 354 _INIT_DCS_CMD(0xB6, 0x53), 355 _INIT_DCS_CMD(0xB7, 0x3E), 356 _INIT_DCS_CMD(0xB8, 0x51), 357 _INIT_DCS_CMD(0xB9, 0x3C), 358 _INIT_DCS_CMD(0xBA, 0x3B), 359 _INIT_DCS_CMD(0xBB, 0x46), 360 _INIT_DCS_CMD(0xBC, 0x45), 361 _INIT_DCS_CMD(0xBD, 0x55), 362 _INIT_DCS_CMD(0xBE, 0x3D), 363 _INIT_DCS_CMD(0xBF, 0x3F), 364 _INIT_DCS_CMD(0xC0, 0x52), 365 _INIT_DCS_CMD(0xC1, 0x4A), 366 _INIT_DCS_CMD(0xC2, 0x39), 367 _INIT_DCS_CMD(0xC3, 0x4F), 368 _INIT_DCS_CMD(0xC4, 0x3A), 369 _INIT_DCS_CMD(0xC5, 0x42), 370 _INIT_DCS_CMD(0xFF, 0x27), 371 _INIT_DCS_CMD(0xFB, 0x01), 372 373 _INIT_DCS_CMD(0x56, 0x06), 374 _INIT_DCS_CMD(0x58, 0x80), 375 _INIT_DCS_CMD(0x59, 0x75), 376 _INIT_DCS_CMD(0x5A, 0x00), 377 _INIT_DCS_CMD(0x5B, 0x02), 378 _INIT_DCS_CMD(0x5C, 0x00), 379 _INIT_DCS_CMD(0x5D, 0x00), 380 _INIT_DCS_CMD(0x5E, 0x20), 381 _INIT_DCS_CMD(0x5F, 0x10), 382 _INIT_DCS_CMD(0x60, 0x00), 383 _INIT_DCS_CMD(0x61, 0x2E), 384 _INIT_DCS_CMD(0x62, 0x00), 385 _INIT_DCS_CMD(0x63, 0x01), 386 _INIT_DCS_CMD(0x64, 0x43), 387 _INIT_DCS_CMD(0x65, 0x2D), 388 _INIT_DCS_CMD(0x66, 0x00), 389 _INIT_DCS_CMD(0x67, 0x01), 390 _INIT_DCS_CMD(0x68, 0x44), 391 392 _INIT_DCS_CMD(0x00, 0x00), 393 _INIT_DCS_CMD(0x78, 0x00), 394 _INIT_DCS_CMD(0xC3, 0x00), 395 396 _INIT_DCS_CMD(0xFF, 0x2A), 397 _INIT_DCS_CMD(0xFB, 0x01), 398 399 _INIT_DCS_CMD(0x22, 0x2F), 400 _INIT_DCS_CMD(0x23, 0x08), 401 402 _INIT_DCS_CMD(0x24, 0x00), 403 _INIT_DCS_CMD(0x25, 0x65), 404 _INIT_DCS_CMD(0x26, 0xF8), 405 _INIT_DCS_CMD(0x27, 0x00), 406 _INIT_DCS_CMD(0x28, 0x1A), 407 _INIT_DCS_CMD(0x29, 0x00), 408 _INIT_DCS_CMD(0x2A, 0x1A), 409 _INIT_DCS_CMD(0x2B, 0x00), 410 _INIT_DCS_CMD(0x2D, 0x1A), 411 412 _INIT_DCS_CMD(0xFF, 0x23), 413 _INIT_DCS_CMD(0xFB, 0x01), 414 415 _INIT_DCS_CMD(0x00, 0x80), 416 _INIT_DCS_CMD(0x07, 0x00), 417 418 _INIT_DCS_CMD(0xFF, 0xE0), 419 _INIT_DCS_CMD(0xFB, 0x01), 420 _INIT_DCS_CMD(0x14, 0x60), 421 _INIT_DCS_CMD(0x16, 0xC0), 422 423 _INIT_DCS_CMD(0xFF, 0xF0), 424 _INIT_DCS_CMD(0xFB, 0x01), 425 _INIT_DCS_CMD(0x3A, 0x08), 426 427 _INIT_DCS_CMD(0xFF, 0x10), 428 _INIT_DCS_CMD(0xFB, 0x01), 429 _INIT_DCS_CMD(0xB9, 0x01), 430 _INIT_DCS_CMD(0xFF, 0x20), 431 _INIT_DCS_CMD(0xFB, 0x01), 432 _INIT_DCS_CMD(0x18, 0x40), 433 434 _INIT_DCS_CMD(0xFF, 0x10), 435 _INIT_DCS_CMD(0xFB, 0x01), 436 _INIT_DCS_CMD(0xB9, 0x02), 437 _INIT_DCS_CMD(0x35, 0x00), 438 _INIT_DCS_CMD(0x51, 0x00, 0xFF), 439 _INIT_DCS_CMD(0x53, 0x24), 440 _INIT_DCS_CMD(0x55, 0x00), 441 _INIT_DCS_CMD(0xBB, 0x13), 442 _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04), 443 _INIT_DELAY_CMD(100), 444 _INIT_DCS_CMD(0x11), 445 _INIT_DELAY_CMD(200), 446 _INIT_DCS_CMD(0x29), 447 _INIT_DELAY_CMD(100), 448 {}, 449 }; 450 451 static const struct panel_init_cmd inx_hj110iz_init_cmd[] = { 452 _INIT_DCS_CMD(0xFF, 0x20), 453 _INIT_DCS_CMD(0xFB, 0x01), 454 _INIT_DCS_CMD(0x05, 0xD1), 455 _INIT_DCS_CMD(0x0D, 0x63), 456 _INIT_DCS_CMD(0x07, 0x8C), 457 _INIT_DCS_CMD(0x08, 0x4B), 458 _INIT_DCS_CMD(0x0E, 0x91), 459 _INIT_DCS_CMD(0x0F, 0x69), 460 _INIT_DCS_CMD(0x95, 0xF5), 461 _INIT_DCS_CMD(0x96, 0xF5), 462 _INIT_DCS_CMD(0x9D, 0x00), 463 _INIT_DCS_CMD(0x9E, 0x00), 464 _INIT_DCS_CMD(0x69, 0x98), 465 _INIT_DCS_CMD(0x75, 0xA2), 466 _INIT_DCS_CMD(0x77, 0xB3), 467 _INIT_DCS_CMD(0xFF, 0x24), 468 _INIT_DCS_CMD(0xFB, 0x01), 469 _INIT_DCS_CMD(0x91, 0x44), 470 _INIT_DCS_CMD(0x92, 0x7A), 471 _INIT_DCS_CMD(0x93, 0x1A), 472 _INIT_DCS_CMD(0x94, 0x40), 473 _INIT_DCS_CMD(0x9A, 0x08), 474 _INIT_DCS_CMD(0x60, 0x96), 475 _INIT_DCS_CMD(0x61, 0xD0), 476 _INIT_DCS_CMD(0x63, 0x70), 477 _INIT_DCS_CMD(0xC2, 0xCF), 478 _INIT_DCS_CMD(0x9B, 0x0F), 479 _INIT_DCS_CMD(0x9A, 0x08), 480 _INIT_DCS_CMD(0x00, 0x03), 481 _INIT_DCS_CMD(0x01, 0x03), 482 _INIT_DCS_CMD(0x02, 0x03), 483 _INIT_DCS_CMD(0x03, 0x03), 484 _INIT_DCS_CMD(0x04, 0x03), 485 _INIT_DCS_CMD(0x05, 0x03), 486 _INIT_DCS_CMD(0x06, 0x22), 487 _INIT_DCS_CMD(0x07, 0x06), 488 _INIT_DCS_CMD(0x08, 0x00), 489 _INIT_DCS_CMD(0x09, 0x1D), 490 _INIT_DCS_CMD(0x0A, 0x1C), 491 _INIT_DCS_CMD(0x0B, 0x13), 492 _INIT_DCS_CMD(0x0C, 0x12), 493 _INIT_DCS_CMD(0x0D, 0x11), 494 _INIT_DCS_CMD(0x0E, 0x10), 495 _INIT_DCS_CMD(0x0F, 0x0F), 496 _INIT_DCS_CMD(0x10, 0x0E), 497 _INIT_DCS_CMD(0x11, 0x0D), 498 _INIT_DCS_CMD(0x12, 0x0C), 499 _INIT_DCS_CMD(0x13, 0x04), 500 _INIT_DCS_CMD(0x14, 0x03), 501 _INIT_DCS_CMD(0x15, 0x03), 502 _INIT_DCS_CMD(0x16, 0x03), 503 _INIT_DCS_CMD(0x17, 0x03), 504 _INIT_DCS_CMD(0x18, 0x03), 505 _INIT_DCS_CMD(0x19, 0x03), 506 _INIT_DCS_CMD(0x1A, 0x03), 507 _INIT_DCS_CMD(0x1B, 0x03), 508 _INIT_DCS_CMD(0x1C, 0x22), 509 _INIT_DCS_CMD(0x1D, 0x06), 510 _INIT_DCS_CMD(0x1E, 0x00), 511 _INIT_DCS_CMD(0x1F, 0x1D), 512 _INIT_DCS_CMD(0x20, 0x1C), 513 _INIT_DCS_CMD(0x21, 0x13), 514 _INIT_DCS_CMD(0x22, 0x12), 515 _INIT_DCS_CMD(0x23, 0x11), 516 _INIT_DCS_CMD(0x24, 0x10), 517 _INIT_DCS_CMD(0x25, 0x0F), 518 _INIT_DCS_CMD(0x26, 0x0E), 519 _INIT_DCS_CMD(0x27, 0x0D), 520 _INIT_DCS_CMD(0x28, 0x0C), 521 _INIT_DCS_CMD(0x29, 0x04), 522 _INIT_DCS_CMD(0x2A, 0x03), 523 _INIT_DCS_CMD(0x2B, 0x03), 524 525 _INIT_DCS_CMD(0x2F, 0x05), 526 _INIT_DCS_CMD(0x30, 0x32), 527 _INIT_DCS_CMD(0x31, 0x43), 528 _INIT_DCS_CMD(0x33, 0x05), 529 _INIT_DCS_CMD(0x34, 0x32), 530 _INIT_DCS_CMD(0x35, 0x43), 531 _INIT_DCS_CMD(0x37, 0x44), 532 _INIT_DCS_CMD(0x38, 0x40), 533 _INIT_DCS_CMD(0x39, 0x00), 534 _INIT_DCS_CMD(0x3A, 0x18), 535 _INIT_DCS_CMD(0x3B, 0x00), 536 _INIT_DCS_CMD(0x3D, 0x93), 537 _INIT_DCS_CMD(0xAB, 0x44), 538 _INIT_DCS_CMD(0xAC, 0x40), 539 540 _INIT_DCS_CMD(0x4D, 0x21), 541 _INIT_DCS_CMD(0x4E, 0x43), 542 _INIT_DCS_CMD(0x4F, 0x65), 543 _INIT_DCS_CMD(0x50, 0x87), 544 _INIT_DCS_CMD(0x51, 0x78), 545 _INIT_DCS_CMD(0x52, 0x56), 546 _INIT_DCS_CMD(0x53, 0x34), 547 _INIT_DCS_CMD(0x54, 0x21), 548 _INIT_DCS_CMD(0x55, 0x83), 549 _INIT_DCS_CMD(0x56, 0x08), 550 _INIT_DCS_CMD(0x58, 0x21), 551 _INIT_DCS_CMD(0x59, 0x40), 552 _INIT_DCS_CMD(0x5A, 0x00), 553 _INIT_DCS_CMD(0x5B, 0x2C), 554 _INIT_DCS_CMD(0x5E, 0x00, 0x10), 555 _INIT_DCS_CMD(0x5F, 0x00), 556 557 _INIT_DCS_CMD(0x7A, 0x00), 558 _INIT_DCS_CMD(0x7B, 0x00), 559 _INIT_DCS_CMD(0x7C, 0x00), 560 _INIT_DCS_CMD(0x7D, 0x00), 561 _INIT_DCS_CMD(0x7E, 0x20), 562 _INIT_DCS_CMD(0x7F, 0x3C), 563 _INIT_DCS_CMD(0x80, 0x00), 564 _INIT_DCS_CMD(0x81, 0x00), 565 _INIT_DCS_CMD(0x82, 0x08), 566 _INIT_DCS_CMD(0x97, 0x02), 567 _INIT_DCS_CMD(0xC5, 0x10), 568 _INIT_DCS_CMD(0xDA, 0x05), 569 _INIT_DCS_CMD(0xDB, 0x01), 570 _INIT_DCS_CMD(0xDC, 0x7A), 571 _INIT_DCS_CMD(0xDD, 0x55), 572 _INIT_DCS_CMD(0xDE, 0x27), 573 _INIT_DCS_CMD(0xDF, 0x01), 574 _INIT_DCS_CMD(0xE0, 0x7A), 575 _INIT_DCS_CMD(0xE1, 0x01), 576 _INIT_DCS_CMD(0xE2, 0x7A), 577 _INIT_DCS_CMD(0xE3, 0x01), 578 _INIT_DCS_CMD(0xE4, 0x7A), 579 _INIT_DCS_CMD(0xE5, 0x01), 580 _INIT_DCS_CMD(0xE6, 0x7A), 581 _INIT_DCS_CMD(0xE7, 0x00), 582 _INIT_DCS_CMD(0xE8, 0x00), 583 _INIT_DCS_CMD(0xE9, 0x01), 584 _INIT_DCS_CMD(0xEA, 0x7A), 585 _INIT_DCS_CMD(0xEB, 0x01), 586 _INIT_DCS_CMD(0xEE, 0x7A), 587 _INIT_DCS_CMD(0xEF, 0x01), 588 _INIT_DCS_CMD(0xF0, 0x7A), 589 590 _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00), 591 _INIT_DCS_CMD(0xFF, 0x25), 592 _INIT_DCS_CMD(0xFB, 0x01), 593 594 _INIT_DCS_CMD(0x05, 0x00), 595 596 _INIT_DCS_CMD(0x13, 0x02), 597 _INIT_DCS_CMD(0x14, 0xDF), 598 _INIT_DCS_CMD(0xF1, 0x10), 599 _INIT_DCS_CMD(0x1E, 0x00), 600 _INIT_DCS_CMD(0x1F, 0x00), 601 _INIT_DCS_CMD(0x20, 0x2C), 602 _INIT_DCS_CMD(0x25, 0x00), 603 _INIT_DCS_CMD(0x26, 0x00), 604 _INIT_DCS_CMD(0x27, 0x2C), 605 _INIT_DCS_CMD(0x3F, 0x80), 606 _INIT_DCS_CMD(0x40, 0x00), 607 _INIT_DCS_CMD(0x43, 0x00), 608 609 _INIT_DCS_CMD(0x44, 0x18), 610 _INIT_DCS_CMD(0x45, 0x00), 611 612 _INIT_DCS_CMD(0x48, 0x00), 613 _INIT_DCS_CMD(0x49, 0x2C), 614 _INIT_DCS_CMD(0x5B, 0x80), 615 _INIT_DCS_CMD(0x5C, 0x00), 616 _INIT_DCS_CMD(0x5D, 0x00), 617 _INIT_DCS_CMD(0x5E, 0x00), 618 _INIT_DCS_CMD(0x61, 0x00), 619 _INIT_DCS_CMD(0x62, 0x2C), 620 _INIT_DCS_CMD(0x68, 0x10), 621 _INIT_DCS_CMD(0xFF, 0x26), 622 _INIT_DCS_CMD(0xFB, 0x01), 623 624 _INIT_DCS_CMD(0x00, 0xA1), 625 _INIT_DCS_CMD(0x02, 0x31), 626 _INIT_DCS_CMD(0x0A, 0xF2), 627 _INIT_DCS_CMD(0x04, 0x28), 628 _INIT_DCS_CMD(0x06, 0x30), 629 _INIT_DCS_CMD(0x0C, 0x16), 630 _INIT_DCS_CMD(0x0D, 0x0D), 631 _INIT_DCS_CMD(0x0F, 0x00), 632 _INIT_DCS_CMD(0x11, 0x00), 633 _INIT_DCS_CMD(0x12, 0x50), 634 _INIT_DCS_CMD(0x13, 0x56), 635 _INIT_DCS_CMD(0x14, 0x57), 636 _INIT_DCS_CMD(0x15, 0x00), 637 _INIT_DCS_CMD(0x16, 0x10), 638 _INIT_DCS_CMD(0x17, 0xA0), 639 _INIT_DCS_CMD(0x18, 0x86), 640 _INIT_DCS_CMD(0x22, 0x00), 641 _INIT_DCS_CMD(0x23, 0x00), 642 _INIT_DCS_CMD(0x19, 0x0D), 643 _INIT_DCS_CMD(0x1A, 0x7F), 644 _INIT_DCS_CMD(0x1B, 0x0C), 645 _INIT_DCS_CMD(0x1C, 0xBF), 646 _INIT_DCS_CMD(0x2A, 0x0D), 647 _INIT_DCS_CMD(0x2B, 0x7F), 648 _INIT_DCS_CMD(0x20, 0x00), 649 650 _INIT_DCS_CMD(0x1D, 0x00), 651 _INIT_DCS_CMD(0x1E, 0x78), 652 _INIT_DCS_CMD(0x1F, 0x78), 653 654 _INIT_DCS_CMD(0x2F, 0x03), 655 _INIT_DCS_CMD(0x30, 0x78), 656 _INIT_DCS_CMD(0x33, 0x78), 657 _INIT_DCS_CMD(0x34, 0x66), 658 _INIT_DCS_CMD(0x35, 0x11), 659 660 _INIT_DCS_CMD(0x39, 0x10), 661 _INIT_DCS_CMD(0x3A, 0x78), 662 _INIT_DCS_CMD(0x3B, 0x06), 663 664 _INIT_DCS_CMD(0xC8, 0x04), 665 _INIT_DCS_CMD(0xC9, 0x84), 666 _INIT_DCS_CMD(0xCA, 0x4E), 667 _INIT_DCS_CMD(0xCB, 0x00), 668 669 _INIT_DCS_CMD(0xA9, 0x50), 670 _INIT_DCS_CMD(0xAA, 0x4F), 671 _INIT_DCS_CMD(0xAB, 0x4D), 672 _INIT_DCS_CMD(0xAC, 0x4A), 673 _INIT_DCS_CMD(0xAD, 0x48), 674 _INIT_DCS_CMD(0xAE, 0x46), 675 _INIT_DCS_CMD(0xFF, 0x27), 676 _INIT_DCS_CMD(0xFB, 0x01), 677 _INIT_DCS_CMD(0xC0, 0x18), 678 _INIT_DCS_CMD(0xC1, 0x00), 679 _INIT_DCS_CMD(0xC2, 0x00), 680 _INIT_DCS_CMD(0x56, 0x06), 681 _INIT_DCS_CMD(0x58, 0x80), 682 _INIT_DCS_CMD(0x59, 0x75), 683 _INIT_DCS_CMD(0x5A, 0x00), 684 _INIT_DCS_CMD(0x5B, 0x02), 685 _INIT_DCS_CMD(0x5C, 0x00), 686 _INIT_DCS_CMD(0x5D, 0x00), 687 _INIT_DCS_CMD(0x5E, 0x20), 688 _INIT_DCS_CMD(0x5F, 0x10), 689 _INIT_DCS_CMD(0x60, 0x00), 690 _INIT_DCS_CMD(0x61, 0x2E), 691 _INIT_DCS_CMD(0x62, 0x00), 692 _INIT_DCS_CMD(0x63, 0x01), 693 _INIT_DCS_CMD(0x64, 0x43), 694 _INIT_DCS_CMD(0x65, 0x2D), 695 _INIT_DCS_CMD(0x66, 0x00), 696 _INIT_DCS_CMD(0x67, 0x01), 697 _INIT_DCS_CMD(0x68, 0x43), 698 _INIT_DCS_CMD(0x98, 0x01), 699 _INIT_DCS_CMD(0xB4, 0x03), 700 _INIT_DCS_CMD(0x9B, 0xBD), 701 _INIT_DCS_CMD(0xA0, 0x90), 702 _INIT_DCS_CMD(0xAB, 0x1B), 703 _INIT_DCS_CMD(0xBC, 0x0C), 704 _INIT_DCS_CMD(0xBD, 0x28), 705 706 _INIT_DCS_CMD(0xFF, 0x2A), 707 _INIT_DCS_CMD(0xFB, 0x01), 708 709 _INIT_DCS_CMD(0x22, 0x2F), 710 _INIT_DCS_CMD(0x23, 0x08), 711 712 _INIT_DCS_CMD(0x24, 0x00), 713 _INIT_DCS_CMD(0x25, 0x65), 714 _INIT_DCS_CMD(0x26, 0xF8), 715 _INIT_DCS_CMD(0x27, 0x00), 716 _INIT_DCS_CMD(0x28, 0x1A), 717 _INIT_DCS_CMD(0x29, 0x00), 718 _INIT_DCS_CMD(0x2A, 0x1A), 719 _INIT_DCS_CMD(0x2B, 0x00), 720 _INIT_DCS_CMD(0x2D, 0x1A), 721 722 _INIT_DCS_CMD(0x64, 0x96), 723 _INIT_DCS_CMD(0x65, 0x00), 724 _INIT_DCS_CMD(0x66, 0x00), 725 _INIT_DCS_CMD(0x6A, 0x96), 726 _INIT_DCS_CMD(0x6B, 0x00), 727 _INIT_DCS_CMD(0x6C, 0x00), 728 _INIT_DCS_CMD(0x70, 0x92), 729 _INIT_DCS_CMD(0x71, 0x00), 730 _INIT_DCS_CMD(0x72, 0x00), 731 _INIT_DCS_CMD(0xA2, 0x33), 732 _INIT_DCS_CMD(0xA3, 0x30), 733 _INIT_DCS_CMD(0xA4, 0xC0), 734 _INIT_DCS_CMD(0xE8, 0x00), 735 _INIT_DCS_CMD(0x97, 0x3C), 736 _INIT_DCS_CMD(0x98, 0x02), 737 _INIT_DCS_CMD(0x99, 0x95), 738 _INIT_DCS_CMD(0x9A, 0x06), 739 _INIT_DCS_CMD(0x9B, 0x00), 740 _INIT_DCS_CMD(0x9C, 0x0B), 741 _INIT_DCS_CMD(0x9D, 0x0A), 742 _INIT_DCS_CMD(0x9E, 0x90), 743 _INIT_DCS_CMD(0xFF, 0xF0), 744 _INIT_DCS_CMD(0xFB, 0x01), 745 _INIT_DCS_CMD(0x3A, 0x08), 746 _INIT_DCS_CMD(0xFF, 0xD0), 747 _INIT_DCS_CMD(0xFB, 0x01), 748 _INIT_DCS_CMD(0x00, 0x33), 749 _INIT_DCS_CMD(0x08, 0x01), 750 _INIT_DCS_CMD(0x09, 0xBF), 751 _INIT_DCS_CMD(0x2F, 0x33), 752 _INIT_DCS_CMD(0xFF, 0x23), 753 _INIT_DCS_CMD(0xFB, 0x01), 754 _INIT_DCS_CMD(0x00, 0x80), 755 _INIT_DCS_CMD(0x07, 0x00), 756 _INIT_DCS_CMD(0xFF, 0x20), 757 _INIT_DCS_CMD(0xFB, 0x01), 758 _INIT_DCS_CMD(0x30, 0x00), 759 _INIT_DCS_CMD(0xFF, 0x24), 760 _INIT_DCS_CMD(0x5C, 0x88), 761 _INIT_DCS_CMD(0x5D, 0x08), 762 _INIT_DCS_CMD(0xFF, 0x10), 763 _INIT_DCS_CMD(0xB9, 0x01), 764 _INIT_DCS_CMD(0xFF, 0x20), 765 _INIT_DCS_CMD(0x18, 0x40), 766 _INIT_DCS_CMD(0xFF, 0x10), 767 _INIT_DCS_CMD(0xB9, 0x02), 768 _INIT_DCS_CMD(0xFF, 0x10), 769 _INIT_DCS_CMD(0xFB, 0x01), 770 _INIT_DCS_CMD(0xBB, 0x13), 771 _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04), 772 _INIT_DCS_CMD(0x35, 0x00), 773 _INIT_DCS_CMD(0x51, 0x0F, 0xFF), 774 _INIT_DCS_CMD(0x53, 0x24), 775 _INIT_DELAY_CMD(100), 776 _INIT_DCS_CMD(0x11), 777 _INIT_DELAY_CMD(200), 778 _INIT_DCS_CMD(0x29), 779 _INIT_DELAY_CMD(100), 780 {}, 781 }; 782 783 static const struct panel_init_cmd boe_init_cmd[] = { 784 _INIT_DCS_CMD(0xB0, 0x05), 785 _INIT_DCS_CMD(0xB1, 0xE5), 786 _INIT_DCS_CMD(0xB3, 0x52), 787 _INIT_DCS_CMD(0xB0, 0x00), 788 _INIT_DCS_CMD(0xB3, 0x88), 789 _INIT_DCS_CMD(0xB0, 0x04), 790 _INIT_DCS_CMD(0xB8, 0x00), 791 _INIT_DCS_CMD(0xB0, 0x00), 792 _INIT_DCS_CMD(0xB6, 0x03), 793 _INIT_DCS_CMD(0xBA, 0x8B), 794 _INIT_DCS_CMD(0xBF, 0x1A), 795 _INIT_DCS_CMD(0xC0, 0x0F), 796 _INIT_DCS_CMD(0xC2, 0x0C), 797 _INIT_DCS_CMD(0xC3, 0x02), 798 _INIT_DCS_CMD(0xC4, 0x0C), 799 _INIT_DCS_CMD(0xC5, 0x02), 800 _INIT_DCS_CMD(0xB0, 0x01), 801 _INIT_DCS_CMD(0xE0, 0x26), 802 _INIT_DCS_CMD(0xE1, 0x26), 803 _INIT_DCS_CMD(0xDC, 0x00), 804 _INIT_DCS_CMD(0xDD, 0x00), 805 _INIT_DCS_CMD(0xCC, 0x26), 806 _INIT_DCS_CMD(0xCD, 0x26), 807 _INIT_DCS_CMD(0xC8, 0x00), 808 _INIT_DCS_CMD(0xC9, 0x00), 809 _INIT_DCS_CMD(0xD2, 0x03), 810 _INIT_DCS_CMD(0xD3, 0x03), 811 _INIT_DCS_CMD(0xE6, 0x04), 812 _INIT_DCS_CMD(0xE7, 0x04), 813 _INIT_DCS_CMD(0xC4, 0x09), 814 _INIT_DCS_CMD(0xC5, 0x09), 815 _INIT_DCS_CMD(0xD8, 0x0A), 816 _INIT_DCS_CMD(0xD9, 0x0A), 817 _INIT_DCS_CMD(0xC2, 0x0B), 818 _INIT_DCS_CMD(0xC3, 0x0B), 819 _INIT_DCS_CMD(0xD6, 0x0C), 820 _INIT_DCS_CMD(0xD7, 0x0C), 821 _INIT_DCS_CMD(0xC0, 0x05), 822 _INIT_DCS_CMD(0xC1, 0x05), 823 _INIT_DCS_CMD(0xD4, 0x06), 824 _INIT_DCS_CMD(0xD5, 0x06), 825 _INIT_DCS_CMD(0xCA, 0x07), 826 _INIT_DCS_CMD(0xCB, 0x07), 827 _INIT_DCS_CMD(0xDE, 0x08), 828 _INIT_DCS_CMD(0xDF, 0x08), 829 _INIT_DCS_CMD(0xB0, 0x02), 830 _INIT_DCS_CMD(0xC0, 0x00), 831 _INIT_DCS_CMD(0xC1, 0x0D), 832 _INIT_DCS_CMD(0xC2, 0x17), 833 _INIT_DCS_CMD(0xC3, 0x26), 834 _INIT_DCS_CMD(0xC4, 0x31), 835 _INIT_DCS_CMD(0xC5, 0x1C), 836 _INIT_DCS_CMD(0xC6, 0x2C), 837 _INIT_DCS_CMD(0xC7, 0x33), 838 _INIT_DCS_CMD(0xC8, 0x31), 839 _INIT_DCS_CMD(0xC9, 0x37), 840 _INIT_DCS_CMD(0xCA, 0x37), 841 _INIT_DCS_CMD(0xCB, 0x37), 842 _INIT_DCS_CMD(0xCC, 0x39), 843 _INIT_DCS_CMD(0xCD, 0x2E), 844 _INIT_DCS_CMD(0xCE, 0x2F), 845 _INIT_DCS_CMD(0xCF, 0x2F), 846 _INIT_DCS_CMD(0xD0, 0x07), 847 _INIT_DCS_CMD(0xD2, 0x00), 848 _INIT_DCS_CMD(0xD3, 0x0D), 849 _INIT_DCS_CMD(0xD4, 0x17), 850 _INIT_DCS_CMD(0xD5, 0x26), 851 _INIT_DCS_CMD(0xD6, 0x31), 852 _INIT_DCS_CMD(0xD7, 0x3F), 853 _INIT_DCS_CMD(0xD8, 0x3F), 854 _INIT_DCS_CMD(0xD9, 0x3F), 855 _INIT_DCS_CMD(0xDA, 0x3F), 856 _INIT_DCS_CMD(0xDB, 0x37), 857 _INIT_DCS_CMD(0xDC, 0x37), 858 _INIT_DCS_CMD(0xDD, 0x37), 859 _INIT_DCS_CMD(0xDE, 0x39), 860 _INIT_DCS_CMD(0xDF, 0x2E), 861 _INIT_DCS_CMD(0xE0, 0x2F), 862 _INIT_DCS_CMD(0xE1, 0x2F), 863 _INIT_DCS_CMD(0xE2, 0x07), 864 _INIT_DCS_CMD(0xB0, 0x03), 865 _INIT_DCS_CMD(0xC8, 0x0B), 866 _INIT_DCS_CMD(0xC9, 0x07), 867 _INIT_DCS_CMD(0xC3, 0x00), 868 _INIT_DCS_CMD(0xE7, 0x00), 869 _INIT_DCS_CMD(0xC5, 0x2A), 870 _INIT_DCS_CMD(0xDE, 0x2A), 871 _INIT_DCS_CMD(0xCA, 0x43), 872 _INIT_DCS_CMD(0xC9, 0x07), 873 _INIT_DCS_CMD(0xE4, 0xC0), 874 _INIT_DCS_CMD(0xE5, 0x0D), 875 _INIT_DCS_CMD(0xCB, 0x00), 876 _INIT_DCS_CMD(0xB0, 0x06), 877 _INIT_DCS_CMD(0xB8, 0xA5), 878 _INIT_DCS_CMD(0xC0, 0xA5), 879 _INIT_DCS_CMD(0xC7, 0x0F), 880 _INIT_DCS_CMD(0xD5, 0x32), 881 _INIT_DCS_CMD(0xB8, 0x00), 882 _INIT_DCS_CMD(0xC0, 0x00), 883 _INIT_DCS_CMD(0xBC, 0x00), 884 _INIT_DCS_CMD(0xB0, 0x07), 885 _INIT_DCS_CMD(0xB1, 0x00), 886 _INIT_DCS_CMD(0xB2, 0x02), 887 _INIT_DCS_CMD(0xB3, 0x0F), 888 _INIT_DCS_CMD(0xB4, 0x25), 889 _INIT_DCS_CMD(0xB5, 0x39), 890 _INIT_DCS_CMD(0xB6, 0x4E), 891 _INIT_DCS_CMD(0xB7, 0x72), 892 _INIT_DCS_CMD(0xB8, 0x97), 893 _INIT_DCS_CMD(0xB9, 0xDC), 894 _INIT_DCS_CMD(0xBA, 0x22), 895 _INIT_DCS_CMD(0xBB, 0xA4), 896 _INIT_DCS_CMD(0xBC, 0x2B), 897 _INIT_DCS_CMD(0xBD, 0x2F), 898 _INIT_DCS_CMD(0xBE, 0xA9), 899 _INIT_DCS_CMD(0xBF, 0x25), 900 _INIT_DCS_CMD(0xC0, 0x61), 901 _INIT_DCS_CMD(0xC1, 0x97), 902 _INIT_DCS_CMD(0xC2, 0xB2), 903 _INIT_DCS_CMD(0xC3, 0xCD), 904 _INIT_DCS_CMD(0xC4, 0xD9), 905 _INIT_DCS_CMD(0xC5, 0xE7), 906 _INIT_DCS_CMD(0xC6, 0xF4), 907 _INIT_DCS_CMD(0xC7, 0xFA), 908 _INIT_DCS_CMD(0xC8, 0xFC), 909 _INIT_DCS_CMD(0xC9, 0x00), 910 _INIT_DCS_CMD(0xCA, 0x00), 911 _INIT_DCS_CMD(0xCB, 0x16), 912 _INIT_DCS_CMD(0xCC, 0xAF), 913 _INIT_DCS_CMD(0xCD, 0xFF), 914 _INIT_DCS_CMD(0xCE, 0xFF), 915 _INIT_DCS_CMD(0xB0, 0x08), 916 _INIT_DCS_CMD(0xB1, 0x04), 917 _INIT_DCS_CMD(0xB2, 0x05), 918 _INIT_DCS_CMD(0xB3, 0x11), 919 _INIT_DCS_CMD(0xB4, 0x24), 920 _INIT_DCS_CMD(0xB5, 0x39), 921 _INIT_DCS_CMD(0xB6, 0x4F), 922 _INIT_DCS_CMD(0xB7, 0x72), 923 _INIT_DCS_CMD(0xB8, 0x98), 924 _INIT_DCS_CMD(0xB9, 0xDC), 925 _INIT_DCS_CMD(0xBA, 0x23), 926 _INIT_DCS_CMD(0xBB, 0xA6), 927 _INIT_DCS_CMD(0xBC, 0x2C), 928 _INIT_DCS_CMD(0xBD, 0x30), 929 _INIT_DCS_CMD(0xBE, 0xAA), 930 _INIT_DCS_CMD(0xBF, 0x26), 931 _INIT_DCS_CMD(0xC0, 0x62), 932 _INIT_DCS_CMD(0xC1, 0x9B), 933 _INIT_DCS_CMD(0xC2, 0xB5), 934 _INIT_DCS_CMD(0xC3, 0xCF), 935 _INIT_DCS_CMD(0xC4, 0xDB), 936 _INIT_DCS_CMD(0xC5, 0xE8), 937 _INIT_DCS_CMD(0xC6, 0xF5), 938 _INIT_DCS_CMD(0xC7, 0xFA), 939 _INIT_DCS_CMD(0xC8, 0xFC), 940 _INIT_DCS_CMD(0xC9, 0x00), 941 _INIT_DCS_CMD(0xCA, 0x00), 942 _INIT_DCS_CMD(0xCB, 0x16), 943 _INIT_DCS_CMD(0xCC, 0xAF), 944 _INIT_DCS_CMD(0xCD, 0xFF), 945 _INIT_DCS_CMD(0xCE, 0xFF), 946 _INIT_DCS_CMD(0xB0, 0x09), 947 _INIT_DCS_CMD(0xB1, 0x04), 948 _INIT_DCS_CMD(0xB2, 0x02), 949 _INIT_DCS_CMD(0xB3, 0x16), 950 _INIT_DCS_CMD(0xB4, 0x24), 951 _INIT_DCS_CMD(0xB5, 0x3B), 952 _INIT_DCS_CMD(0xB6, 0x4F), 953 _INIT_DCS_CMD(0xB7, 0x73), 954 _INIT_DCS_CMD(0xB8, 0x99), 955 _INIT_DCS_CMD(0xB9, 0xE0), 956 _INIT_DCS_CMD(0xBA, 0x26), 957 _INIT_DCS_CMD(0xBB, 0xAD), 958 _INIT_DCS_CMD(0xBC, 0x36), 959 _INIT_DCS_CMD(0xBD, 0x3A), 960 _INIT_DCS_CMD(0xBE, 0xAE), 961 _INIT_DCS_CMD(0xBF, 0x2A), 962 _INIT_DCS_CMD(0xC0, 0x66), 963 _INIT_DCS_CMD(0xC1, 0x9E), 964 _INIT_DCS_CMD(0xC2, 0xB8), 965 _INIT_DCS_CMD(0xC3, 0xD1), 966 _INIT_DCS_CMD(0xC4, 0xDD), 967 _INIT_DCS_CMD(0xC5, 0xE9), 968 _INIT_DCS_CMD(0xC6, 0xF6), 969 _INIT_DCS_CMD(0xC7, 0xFA), 970 _INIT_DCS_CMD(0xC8, 0xFC), 971 _INIT_DCS_CMD(0xC9, 0x00), 972 _INIT_DCS_CMD(0xCA, 0x00), 973 _INIT_DCS_CMD(0xCB, 0x16), 974 _INIT_DCS_CMD(0xCC, 0xAF), 975 _INIT_DCS_CMD(0xCD, 0xFF), 976 _INIT_DCS_CMD(0xCE, 0xFF), 977 _INIT_DCS_CMD(0xB0, 0x0A), 978 _INIT_DCS_CMD(0xB1, 0x00), 979 _INIT_DCS_CMD(0xB2, 0x02), 980 _INIT_DCS_CMD(0xB3, 0x0F), 981 _INIT_DCS_CMD(0xB4, 0x25), 982 _INIT_DCS_CMD(0xB5, 0x39), 983 _INIT_DCS_CMD(0xB6, 0x4E), 984 _INIT_DCS_CMD(0xB7, 0x72), 985 _INIT_DCS_CMD(0xB8, 0x97), 986 _INIT_DCS_CMD(0xB9, 0xDC), 987 _INIT_DCS_CMD(0xBA, 0x22), 988 _INIT_DCS_CMD(0xBB, 0xA4), 989 _INIT_DCS_CMD(0xBC, 0x2B), 990 _INIT_DCS_CMD(0xBD, 0x2F), 991 _INIT_DCS_CMD(0xBE, 0xA9), 992 _INIT_DCS_CMD(0xBF, 0x25), 993 _INIT_DCS_CMD(0xC0, 0x61), 994 _INIT_DCS_CMD(0xC1, 0x97), 995 _INIT_DCS_CMD(0xC2, 0xB2), 996 _INIT_DCS_CMD(0xC3, 0xCD), 997 _INIT_DCS_CMD(0xC4, 0xD9), 998 _INIT_DCS_CMD(0xC5, 0xE7), 999 _INIT_DCS_CMD(0xC6, 0xF4), 1000 _INIT_DCS_CMD(0xC7, 0xFA), 1001 _INIT_DCS_CMD(0xC8, 0xFC), 1002 _INIT_DCS_CMD(0xC9, 0x00), 1003 _INIT_DCS_CMD(0xCA, 0x00), 1004 _INIT_DCS_CMD(0xCB, 0x16), 1005 _INIT_DCS_CMD(0xCC, 0xAF), 1006 _INIT_DCS_CMD(0xCD, 0xFF), 1007 _INIT_DCS_CMD(0xCE, 0xFF), 1008 _INIT_DCS_CMD(0xB0, 0x0B), 1009 _INIT_DCS_CMD(0xB1, 0x04), 1010 _INIT_DCS_CMD(0xB2, 0x05), 1011 _INIT_DCS_CMD(0xB3, 0x11), 1012 _INIT_DCS_CMD(0xB4, 0x24), 1013 _INIT_DCS_CMD(0xB5, 0x39), 1014 _INIT_DCS_CMD(0xB6, 0x4F), 1015 _INIT_DCS_CMD(0xB7, 0x72), 1016 _INIT_DCS_CMD(0xB8, 0x98), 1017 _INIT_DCS_CMD(0xB9, 0xDC), 1018 _INIT_DCS_CMD(0xBA, 0x23), 1019 _INIT_DCS_CMD(0xBB, 0xA6), 1020 _INIT_DCS_CMD(0xBC, 0x2C), 1021 _INIT_DCS_CMD(0xBD, 0x30), 1022 _INIT_DCS_CMD(0xBE, 0xAA), 1023 _INIT_DCS_CMD(0xBF, 0x26), 1024 _INIT_DCS_CMD(0xC0, 0x62), 1025 _INIT_DCS_CMD(0xC1, 0x9B), 1026 _INIT_DCS_CMD(0xC2, 0xB5), 1027 _INIT_DCS_CMD(0xC3, 0xCF), 1028 _INIT_DCS_CMD(0xC4, 0xDB), 1029 _INIT_DCS_CMD(0xC5, 0xE8), 1030 _INIT_DCS_CMD(0xC6, 0xF5), 1031 _INIT_DCS_CMD(0xC7, 0xFA), 1032 _INIT_DCS_CMD(0xC8, 0xFC), 1033 _INIT_DCS_CMD(0xC9, 0x00), 1034 _INIT_DCS_CMD(0xCA, 0x00), 1035 _INIT_DCS_CMD(0xCB, 0x16), 1036 _INIT_DCS_CMD(0xCC, 0xAF), 1037 _INIT_DCS_CMD(0xCD, 0xFF), 1038 _INIT_DCS_CMD(0xCE, 0xFF), 1039 _INIT_DCS_CMD(0xB0, 0x0C), 1040 _INIT_DCS_CMD(0xB1, 0x04), 1041 _INIT_DCS_CMD(0xB2, 0x02), 1042 _INIT_DCS_CMD(0xB3, 0x16), 1043 _INIT_DCS_CMD(0xB4, 0x24), 1044 _INIT_DCS_CMD(0xB5, 0x3B), 1045 _INIT_DCS_CMD(0xB6, 0x4F), 1046 _INIT_DCS_CMD(0xB7, 0x73), 1047 _INIT_DCS_CMD(0xB8, 0x99), 1048 _INIT_DCS_CMD(0xB9, 0xE0), 1049 _INIT_DCS_CMD(0xBA, 0x26), 1050 _INIT_DCS_CMD(0xBB, 0xAD), 1051 _INIT_DCS_CMD(0xBC, 0x36), 1052 _INIT_DCS_CMD(0xBD, 0x3A), 1053 _INIT_DCS_CMD(0xBE, 0xAE), 1054 _INIT_DCS_CMD(0xBF, 0x2A), 1055 _INIT_DCS_CMD(0xC0, 0x66), 1056 _INIT_DCS_CMD(0xC1, 0x9E), 1057 _INIT_DCS_CMD(0xC2, 0xB8), 1058 _INIT_DCS_CMD(0xC3, 0xD1), 1059 _INIT_DCS_CMD(0xC4, 0xDD), 1060 _INIT_DCS_CMD(0xC5, 0xE9), 1061 _INIT_DCS_CMD(0xC6, 0xF6), 1062 _INIT_DCS_CMD(0xC7, 0xFA), 1063 _INIT_DCS_CMD(0xC8, 0xFC), 1064 _INIT_DCS_CMD(0xC9, 0x00), 1065 _INIT_DCS_CMD(0xCA, 0x00), 1066 _INIT_DCS_CMD(0xCB, 0x16), 1067 _INIT_DCS_CMD(0xCC, 0xAF), 1068 _INIT_DCS_CMD(0xCD, 0xFF), 1069 _INIT_DCS_CMD(0xCE, 0xFF), 1070 _INIT_DCS_CMD(0xB0, 0x00), 1071 _INIT_DCS_CMD(0xB3, 0x08), 1072 _INIT_DCS_CMD(0xB0, 0x04), 1073 _INIT_DCS_CMD(0xB8, 0x68), 1074 _INIT_DELAY_CMD(150), 1075 {}, 1076 }; 1077 1078 static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = { 1079 _INIT_DELAY_CMD(24), 1080 _INIT_DCS_CMD(0x11), 1081 _INIT_DELAY_CMD(120), 1082 _INIT_DCS_CMD(0x29), 1083 _INIT_DELAY_CMD(120), 1084 {}, 1085 }; 1086 1087 static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = { 1088 _INIT_DELAY_CMD(24), 1089 _INIT_DCS_CMD(0xB0, 0x01), 1090 _INIT_DCS_CMD(0xC0, 0x48), 1091 _INIT_DCS_CMD(0xC1, 0x48), 1092 _INIT_DCS_CMD(0xC2, 0x47), 1093 _INIT_DCS_CMD(0xC3, 0x47), 1094 _INIT_DCS_CMD(0xC4, 0x46), 1095 _INIT_DCS_CMD(0xC5, 0x46), 1096 _INIT_DCS_CMD(0xC6, 0x45), 1097 _INIT_DCS_CMD(0xC7, 0x45), 1098 _INIT_DCS_CMD(0xC8, 0x64), 1099 _INIT_DCS_CMD(0xC9, 0x64), 1100 _INIT_DCS_CMD(0xCA, 0x4F), 1101 _INIT_DCS_CMD(0xCB, 0x4F), 1102 _INIT_DCS_CMD(0xCC, 0x40), 1103 _INIT_DCS_CMD(0xCD, 0x40), 1104 _INIT_DCS_CMD(0xCE, 0x66), 1105 _INIT_DCS_CMD(0xCF, 0x66), 1106 _INIT_DCS_CMD(0xD0, 0x4F), 1107 _INIT_DCS_CMD(0xD1, 0x4F), 1108 _INIT_DCS_CMD(0xD2, 0x41), 1109 _INIT_DCS_CMD(0xD3, 0x41), 1110 _INIT_DCS_CMD(0xD4, 0x48), 1111 _INIT_DCS_CMD(0xD5, 0x48), 1112 _INIT_DCS_CMD(0xD6, 0x47), 1113 _INIT_DCS_CMD(0xD7, 0x47), 1114 _INIT_DCS_CMD(0xD8, 0x46), 1115 _INIT_DCS_CMD(0xD9, 0x46), 1116 _INIT_DCS_CMD(0xDA, 0x45), 1117 _INIT_DCS_CMD(0xDB, 0x45), 1118 _INIT_DCS_CMD(0xDC, 0x64), 1119 _INIT_DCS_CMD(0xDD, 0x64), 1120 _INIT_DCS_CMD(0xDE, 0x4F), 1121 _INIT_DCS_CMD(0xDF, 0x4F), 1122 _INIT_DCS_CMD(0xE0, 0x40), 1123 _INIT_DCS_CMD(0xE1, 0x40), 1124 _INIT_DCS_CMD(0xE2, 0x66), 1125 _INIT_DCS_CMD(0xE3, 0x66), 1126 _INIT_DCS_CMD(0xE4, 0x4F), 1127 _INIT_DCS_CMD(0xE5, 0x4F), 1128 _INIT_DCS_CMD(0xE6, 0x41), 1129 _INIT_DCS_CMD(0xE7, 0x41), 1130 _INIT_DELAY_CMD(150), 1131 {}, 1132 }; 1133 1134 static const struct panel_init_cmd starry_qfh032011_53g_init_cmd[] = { 1135 _INIT_DCS_CMD(0xB0, 0x01), 1136 _INIT_DCS_CMD(0xC3, 0x4F), 1137 _INIT_DCS_CMD(0xC4, 0x40), 1138 _INIT_DCS_CMD(0xC5, 0x40), 1139 _INIT_DCS_CMD(0xC6, 0x40), 1140 _INIT_DCS_CMD(0xC7, 0x40), 1141 _INIT_DCS_CMD(0xC8, 0x4D), 1142 _INIT_DCS_CMD(0xC9, 0x52), 1143 _INIT_DCS_CMD(0xCA, 0x51), 1144 _INIT_DCS_CMD(0xCD, 0x5D), 1145 _INIT_DCS_CMD(0xCE, 0x5B), 1146 _INIT_DCS_CMD(0xCF, 0x4B), 1147 _INIT_DCS_CMD(0xD0, 0x49), 1148 _INIT_DCS_CMD(0xD1, 0x47), 1149 _INIT_DCS_CMD(0xD2, 0x45), 1150 _INIT_DCS_CMD(0xD3, 0x41), 1151 _INIT_DCS_CMD(0xD7, 0x50), 1152 _INIT_DCS_CMD(0xD8, 0x40), 1153 _INIT_DCS_CMD(0xD9, 0x40), 1154 _INIT_DCS_CMD(0xDA, 0x40), 1155 _INIT_DCS_CMD(0xDB, 0x40), 1156 _INIT_DCS_CMD(0xDC, 0x4E), 1157 _INIT_DCS_CMD(0xDD, 0x52), 1158 _INIT_DCS_CMD(0xDE, 0x51), 1159 _INIT_DCS_CMD(0xE1, 0x5E), 1160 _INIT_DCS_CMD(0xE2, 0x5C), 1161 _INIT_DCS_CMD(0xE3, 0x4C), 1162 _INIT_DCS_CMD(0xE4, 0x4A), 1163 _INIT_DCS_CMD(0xE5, 0x48), 1164 _INIT_DCS_CMD(0xE6, 0x46), 1165 _INIT_DCS_CMD(0xE7, 0x42), 1166 _INIT_DCS_CMD(0xB0, 0x03), 1167 _INIT_DCS_CMD(0xBE, 0x03), 1168 _INIT_DCS_CMD(0xCC, 0x44), 1169 _INIT_DCS_CMD(0xC8, 0x07), 1170 _INIT_DCS_CMD(0xC9, 0x05), 1171 _INIT_DCS_CMD(0xCA, 0x42), 1172 _INIT_DCS_CMD(0xCD, 0x3E), 1173 _INIT_DCS_CMD(0xCF, 0x60), 1174 _INIT_DCS_CMD(0xD2, 0x04), 1175 _INIT_DCS_CMD(0xD3, 0x04), 1176 _INIT_DCS_CMD(0xD4, 0x01), 1177 _INIT_DCS_CMD(0xD5, 0x00), 1178 _INIT_DCS_CMD(0xD6, 0x03), 1179 _INIT_DCS_CMD(0xD7, 0x04), 1180 _INIT_DCS_CMD(0xD9, 0x01), 1181 _INIT_DCS_CMD(0xDB, 0x01), 1182 _INIT_DCS_CMD(0xE4, 0xF0), 1183 _INIT_DCS_CMD(0xE5, 0x0A), 1184 _INIT_DCS_CMD(0xB0, 0x00), 1185 _INIT_DCS_CMD(0xCC, 0x08), 1186 _INIT_DCS_CMD(0xC2, 0x08), 1187 _INIT_DCS_CMD(0xC4, 0x10), 1188 _INIT_DCS_CMD(0xB0, 0x02), 1189 _INIT_DCS_CMD(0xC0, 0x00), 1190 _INIT_DCS_CMD(0xC1, 0x0A), 1191 _INIT_DCS_CMD(0xC2, 0x20), 1192 _INIT_DCS_CMD(0xC3, 0x24), 1193 _INIT_DCS_CMD(0xC4, 0x23), 1194 _INIT_DCS_CMD(0xC5, 0x29), 1195 _INIT_DCS_CMD(0xC6, 0x23), 1196 _INIT_DCS_CMD(0xC7, 0x1C), 1197 _INIT_DCS_CMD(0xC8, 0x19), 1198 _INIT_DCS_CMD(0xC9, 0x17), 1199 _INIT_DCS_CMD(0xCA, 0x17), 1200 _INIT_DCS_CMD(0xCB, 0x18), 1201 _INIT_DCS_CMD(0xCC, 0x1A), 1202 _INIT_DCS_CMD(0xCD, 0x1E), 1203 _INIT_DCS_CMD(0xCE, 0x20), 1204 _INIT_DCS_CMD(0xCF, 0x23), 1205 _INIT_DCS_CMD(0xD0, 0x07), 1206 _INIT_DCS_CMD(0xD1, 0x00), 1207 _INIT_DCS_CMD(0xD2, 0x00), 1208 _INIT_DCS_CMD(0xD3, 0x0A), 1209 _INIT_DCS_CMD(0xD4, 0x13), 1210 _INIT_DCS_CMD(0xD5, 0x1C), 1211 _INIT_DCS_CMD(0xD6, 0x1A), 1212 _INIT_DCS_CMD(0xD7, 0x13), 1213 _INIT_DCS_CMD(0xD8, 0x17), 1214 _INIT_DCS_CMD(0xD9, 0x1C), 1215 _INIT_DCS_CMD(0xDA, 0x19), 1216 _INIT_DCS_CMD(0xDB, 0x17), 1217 _INIT_DCS_CMD(0xDC, 0x17), 1218 _INIT_DCS_CMD(0xDD, 0x18), 1219 _INIT_DCS_CMD(0xDE, 0x1A), 1220 _INIT_DCS_CMD(0xDF, 0x1E), 1221 _INIT_DCS_CMD(0xE0, 0x20), 1222 _INIT_DCS_CMD(0xE1, 0x23), 1223 _INIT_DCS_CMD(0xE2, 0x07), 1224 _INIT_DCS_CMD(0X11), 1225 _INIT_DELAY_CMD(120), 1226 _INIT_DCS_CMD(0X29), 1227 _INIT_DELAY_CMD(80), 1228 {}, 1229 }; 1230 1231 static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) 1232 { 1233 return container_of(panel, struct boe_panel, base); 1234 } 1235 1236 static int boe_panel_init_dcs_cmd(struct boe_panel *boe) 1237 { 1238 struct mipi_dsi_device *dsi = boe->dsi; 1239 struct drm_panel *panel = &boe->base; 1240 int i, err = 0; 1241 1242 if (boe->desc->init_cmds) { 1243 const struct panel_init_cmd *init_cmds = boe->desc->init_cmds; 1244 1245 for (i = 0; init_cmds[i].len != 0; i++) { 1246 const struct panel_init_cmd *cmd = &init_cmds[i]; 1247 1248 switch (cmd->type) { 1249 case DELAY_CMD: 1250 msleep(cmd->data[0]); 1251 err = 0; 1252 break; 1253 1254 case INIT_DCS_CMD: 1255 err = mipi_dsi_dcs_write(dsi, cmd->data[0], 1256 cmd->len <= 1 ? NULL : 1257 &cmd->data[1], 1258 cmd->len - 1); 1259 break; 1260 1261 default: 1262 err = -EINVAL; 1263 } 1264 1265 if (err < 0) { 1266 dev_err(panel->dev, 1267 "failed to write command %u\n", i); 1268 return err; 1269 } 1270 } 1271 } 1272 return 0; 1273 } 1274 1275 static int boe_panel_enter_sleep_mode(struct boe_panel *boe) 1276 { 1277 struct mipi_dsi_device *dsi = boe->dsi; 1278 int ret; 1279 1280 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; 1281 1282 ret = mipi_dsi_dcs_set_display_off(dsi); 1283 if (ret < 0) 1284 return ret; 1285 1286 ret = mipi_dsi_dcs_enter_sleep_mode(dsi); 1287 if (ret < 0) 1288 return ret; 1289 1290 return 0; 1291 } 1292 1293 static int boe_panel_disable(struct drm_panel *panel) 1294 { 1295 struct boe_panel *boe = to_boe_panel(panel); 1296 int ret; 1297 1298 ret = boe_panel_enter_sleep_mode(boe); 1299 if (ret < 0) { 1300 dev_err(panel->dev, "failed to set panel off: %d\n", ret); 1301 return ret; 1302 } 1303 1304 msleep(150); 1305 1306 return 0; 1307 } 1308 1309 static int boe_panel_unprepare(struct drm_panel *panel) 1310 { 1311 struct boe_panel *boe = to_boe_panel(panel); 1312 1313 if (!boe->prepared) 1314 return 0; 1315 1316 if (boe->desc->discharge_on_disable) { 1317 regulator_disable(boe->avee); 1318 regulator_disable(boe->avdd); 1319 usleep_range(5000, 7000); 1320 gpiod_set_value(boe->enable_gpio, 0); 1321 usleep_range(5000, 7000); 1322 regulator_disable(boe->pp1800); 1323 regulator_disable(boe->pp3300); 1324 } else { 1325 gpiod_set_value(boe->enable_gpio, 0); 1326 usleep_range(1000, 2000); 1327 regulator_disable(boe->avee); 1328 regulator_disable(boe->avdd); 1329 usleep_range(5000, 7000); 1330 regulator_disable(boe->pp1800); 1331 regulator_disable(boe->pp3300); 1332 } 1333 1334 boe->prepared = false; 1335 1336 return 0; 1337 } 1338 1339 static int boe_panel_prepare(struct drm_panel *panel) 1340 { 1341 struct boe_panel *boe = to_boe_panel(panel); 1342 int ret; 1343 1344 if (boe->prepared) 1345 return 0; 1346 1347 gpiod_set_value(boe->enable_gpio, 0); 1348 usleep_range(1000, 1500); 1349 1350 ret = regulator_enable(boe->pp3300); 1351 if (ret < 0) 1352 return ret; 1353 1354 ret = regulator_enable(boe->pp1800); 1355 if (ret < 0) 1356 return ret; 1357 1358 usleep_range(3000, 5000); 1359 1360 ret = regulator_enable(boe->avdd); 1361 if (ret < 0) 1362 goto poweroff1v8; 1363 ret = regulator_enable(boe->avee); 1364 if (ret < 0) 1365 goto poweroffavdd; 1366 1367 usleep_range(10000, 11000); 1368 1369 if (boe->desc->lp11_before_reset) { 1370 mipi_dsi_dcs_nop(boe->dsi); 1371 usleep_range(1000, 2000); 1372 } 1373 gpiod_set_value(boe->enable_gpio, 1); 1374 usleep_range(1000, 2000); 1375 gpiod_set_value(boe->enable_gpio, 0); 1376 usleep_range(1000, 2000); 1377 gpiod_set_value(boe->enable_gpio, 1); 1378 usleep_range(6000, 10000); 1379 1380 ret = boe_panel_init_dcs_cmd(boe); 1381 if (ret < 0) { 1382 dev_err(panel->dev, "failed to init panel: %d\n", ret); 1383 goto poweroff; 1384 } 1385 1386 boe->prepared = true; 1387 1388 return 0; 1389 1390 poweroff: 1391 regulator_disable(boe->avee); 1392 poweroffavdd: 1393 regulator_disable(boe->avdd); 1394 poweroff1v8: 1395 usleep_range(5000, 7000); 1396 regulator_disable(boe->pp1800); 1397 gpiod_set_value(boe->enable_gpio, 0); 1398 1399 return ret; 1400 } 1401 1402 static int boe_panel_enable(struct drm_panel *panel) 1403 { 1404 msleep(130); 1405 return 0; 1406 } 1407 1408 static const struct drm_display_mode boe_tv110c9m_default_mode = { 1409 .clock = 166594, 1410 .hdisplay = 1200, 1411 .hsync_start = 1200 + 40, 1412 .hsync_end = 1200 + 40 + 8, 1413 .htotal = 1200 + 40 + 8 + 28, 1414 .vdisplay = 2000, 1415 .vsync_start = 2000 + 26, 1416 .vsync_end = 2000 + 26 + 2, 1417 .vtotal = 2000 + 26 + 2 + 148, 1418 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 1419 }; 1420 1421 static const struct panel_desc boe_tv110c9m_desc = { 1422 .modes = &boe_tv110c9m_default_mode, 1423 .bpc = 8, 1424 .size = { 1425 .width_mm = 143, 1426 .height_mm = 238, 1427 }, 1428 .lanes = 4, 1429 .format = MIPI_DSI_FMT_RGB888, 1430 .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO 1431 | MIPI_DSI_MODE_VIDEO_HSE 1432 | MIPI_DSI_CLOCK_NON_CONTINUOUS 1433 | MIPI_DSI_MODE_VIDEO_BURST, 1434 .init_cmds = boe_tv110c9m_init_cmd, 1435 }; 1436 1437 static const struct drm_display_mode inx_hj110iz_default_mode = { 1438 .clock = 166594, 1439 .hdisplay = 1200, 1440 .hsync_start = 1200 + 40, 1441 .hsync_end = 1200 + 40 + 8, 1442 .htotal = 1200 + 40 + 8 + 28, 1443 .vdisplay = 2000, 1444 .vsync_start = 2000 + 26, 1445 .vsync_end = 2000 + 26 + 1, 1446 .vtotal = 2000 + 26 + 1 + 149, 1447 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 1448 }; 1449 1450 static const struct panel_desc inx_hj110iz_desc = { 1451 .modes = &inx_hj110iz_default_mode, 1452 .bpc = 8, 1453 .size = { 1454 .width_mm = 143, 1455 .height_mm = 238, 1456 }, 1457 .lanes = 4, 1458 .format = MIPI_DSI_FMT_RGB888, 1459 .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO 1460 | MIPI_DSI_MODE_VIDEO_HSE 1461 | MIPI_DSI_CLOCK_NON_CONTINUOUS 1462 | MIPI_DSI_MODE_VIDEO_BURST, 1463 .init_cmds = inx_hj110iz_init_cmd, 1464 }; 1465 1466 static const struct drm_display_mode boe_tv101wum_nl6_default_mode = { 1467 .clock = 159425, 1468 .hdisplay = 1200, 1469 .hsync_start = 1200 + 100, 1470 .hsync_end = 1200 + 100 + 40, 1471 .htotal = 1200 + 100 + 40 + 24, 1472 .vdisplay = 1920, 1473 .vsync_start = 1920 + 10, 1474 .vsync_end = 1920 + 10 + 14, 1475 .vtotal = 1920 + 10 + 14 + 4, 1476 }; 1477 1478 static const struct panel_desc boe_tv101wum_nl6_desc = { 1479 .modes = &boe_tv101wum_nl6_default_mode, 1480 .bpc = 8, 1481 .size = { 1482 .width_mm = 135, 1483 .height_mm = 216, 1484 }, 1485 .lanes = 4, 1486 .format = MIPI_DSI_FMT_RGB888, 1487 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 1488 MIPI_DSI_MODE_LPM, 1489 .init_cmds = boe_init_cmd, 1490 .discharge_on_disable = false, 1491 }; 1492 1493 static const struct drm_display_mode auo_kd101n80_45na_default_mode = { 1494 .clock = 157000, 1495 .hdisplay = 1200, 1496 .hsync_start = 1200 + 60, 1497 .hsync_end = 1200 + 60 + 24, 1498 .htotal = 1200 + 60 + 24 + 56, 1499 .vdisplay = 1920, 1500 .vsync_start = 1920 + 16, 1501 .vsync_end = 1920 + 16 + 4, 1502 .vtotal = 1920 + 16 + 4 + 16, 1503 }; 1504 1505 static const struct panel_desc auo_kd101n80_45na_desc = { 1506 .modes = &auo_kd101n80_45na_default_mode, 1507 .bpc = 8, 1508 .size = { 1509 .width_mm = 135, 1510 .height_mm = 216, 1511 }, 1512 .lanes = 4, 1513 .format = MIPI_DSI_FMT_RGB888, 1514 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 1515 MIPI_DSI_MODE_LPM, 1516 .init_cmds = auo_kd101n80_45na_init_cmd, 1517 .discharge_on_disable = true, 1518 }; 1519 1520 static const struct drm_display_mode boe_tv101wum_n53_default_mode = { 1521 .clock = 159916, 1522 .hdisplay = 1200, 1523 .hsync_start = 1200 + 80, 1524 .hsync_end = 1200 + 80 + 24, 1525 .htotal = 1200 + 80 + 24 + 60, 1526 .vdisplay = 1920, 1527 .vsync_start = 1920 + 20, 1528 .vsync_end = 1920 + 20 + 4, 1529 .vtotal = 1920 + 20 + 4 + 10, 1530 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 1531 }; 1532 1533 static const struct panel_desc boe_tv101wum_n53_desc = { 1534 .modes = &boe_tv101wum_n53_default_mode, 1535 .bpc = 8, 1536 .size = { 1537 .width_mm = 135, 1538 .height_mm = 216, 1539 }, 1540 .lanes = 4, 1541 .format = MIPI_DSI_FMT_RGB888, 1542 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 1543 MIPI_DSI_MODE_LPM, 1544 .init_cmds = boe_init_cmd, 1545 }; 1546 1547 static const struct drm_display_mode auo_b101uan08_3_default_mode = { 1548 .clock = 159667, 1549 .hdisplay = 1200, 1550 .hsync_start = 1200 + 60, 1551 .hsync_end = 1200 + 60 + 4, 1552 .htotal = 1200 + 60 + 4 + 80, 1553 .vdisplay = 1920, 1554 .vsync_start = 1920 + 34, 1555 .vsync_end = 1920 + 34 + 2, 1556 .vtotal = 1920 + 34 + 2 + 24, 1557 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 1558 }; 1559 1560 static const struct panel_desc auo_b101uan08_3_desc = { 1561 .modes = &auo_b101uan08_3_default_mode, 1562 .bpc = 8, 1563 .size = { 1564 .width_mm = 135, 1565 .height_mm = 216, 1566 }, 1567 .lanes = 4, 1568 .format = MIPI_DSI_FMT_RGB888, 1569 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 1570 MIPI_DSI_MODE_LPM, 1571 .init_cmds = auo_b101uan08_3_init_cmd, 1572 }; 1573 1574 static const struct drm_display_mode boe_tv105wum_nw0_default_mode = { 1575 .clock = 159916, 1576 .hdisplay = 1200, 1577 .hsync_start = 1200 + 80, 1578 .hsync_end = 1200 + 80 + 24, 1579 .htotal = 1200 + 80 + 24 + 60, 1580 .vdisplay = 1920, 1581 .vsync_start = 1920 + 20, 1582 .vsync_end = 1920 + 20 + 4, 1583 .vtotal = 1920 + 20 + 4 + 10, 1584 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 1585 }; 1586 1587 static const struct panel_desc boe_tv105wum_nw0_desc = { 1588 .modes = &boe_tv105wum_nw0_default_mode, 1589 .bpc = 8, 1590 .size = { 1591 .width_mm = 141, 1592 .height_mm = 226, 1593 }, 1594 .lanes = 4, 1595 .format = MIPI_DSI_FMT_RGB888, 1596 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 1597 MIPI_DSI_MODE_LPM, 1598 .init_cmds = boe_init_cmd, 1599 .lp11_before_reset = true, 1600 }; 1601 1602 static const struct drm_display_mode starry_qfh032011_53g_default_mode = { 1603 .clock = 165731, 1604 .hdisplay = 1200, 1605 .hsync_start = 1200 + 100, 1606 .hsync_end = 1200 + 100 + 10, 1607 .htotal = 1200 + 100 + 10 + 100, 1608 .vdisplay = 1920, 1609 .vsync_start = 1920 + 14, 1610 .vsync_end = 1920 + 14 + 10, 1611 .vtotal = 1920 + 14 + 10 + 15, 1612 }; 1613 1614 static const struct panel_desc starry_qfh032011_53g_desc = { 1615 .modes = &starry_qfh032011_53g_default_mode, 1616 .bpc = 8, 1617 .size = { 1618 .width_mm = 135, 1619 .height_mm = 216, 1620 }, 1621 .lanes = 4, 1622 .format = MIPI_DSI_FMT_RGB888, 1623 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 1624 MIPI_DSI_MODE_LPM, 1625 .init_cmds = starry_qfh032011_53g_init_cmd, 1626 }; 1627 1628 static int boe_panel_get_modes(struct drm_panel *panel, 1629 struct drm_connector *connector) 1630 { 1631 struct boe_panel *boe = to_boe_panel(panel); 1632 const struct drm_display_mode *m = boe->desc->modes; 1633 struct drm_display_mode *mode; 1634 1635 mode = drm_mode_duplicate(connector->dev, m); 1636 if (!mode) { 1637 dev_err(panel->dev, "failed to add mode %ux%u@%u\n", 1638 m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); 1639 return -ENOMEM; 1640 } 1641 1642 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 1643 drm_mode_set_name(mode); 1644 drm_mode_probed_add(connector, mode); 1645 1646 connector->display_info.width_mm = boe->desc->size.width_mm; 1647 connector->display_info.height_mm = boe->desc->size.height_mm; 1648 connector->display_info.bpc = boe->desc->bpc; 1649 /* 1650 * TODO: Remove once all drm drivers call 1651 * drm_connector_set_orientation_from_panel() 1652 */ 1653 drm_connector_set_panel_orientation(connector, boe->orientation); 1654 1655 return 1; 1656 } 1657 1658 static enum drm_panel_orientation boe_panel_get_orientation(struct drm_panel *panel) 1659 { 1660 struct boe_panel *boe = to_boe_panel(panel); 1661 1662 return boe->orientation; 1663 } 1664 1665 static const struct drm_panel_funcs boe_panel_funcs = { 1666 .disable = boe_panel_disable, 1667 .unprepare = boe_panel_unprepare, 1668 .prepare = boe_panel_prepare, 1669 .enable = boe_panel_enable, 1670 .get_modes = boe_panel_get_modes, 1671 .get_orientation = boe_panel_get_orientation, 1672 }; 1673 1674 static int boe_panel_add(struct boe_panel *boe) 1675 { 1676 struct device *dev = &boe->dsi->dev; 1677 int err; 1678 1679 boe->avdd = devm_regulator_get(dev, "avdd"); 1680 if (IS_ERR(boe->avdd)) 1681 return PTR_ERR(boe->avdd); 1682 1683 boe->avee = devm_regulator_get(dev, "avee"); 1684 if (IS_ERR(boe->avee)) 1685 return PTR_ERR(boe->avee); 1686 1687 boe->pp3300 = devm_regulator_get(dev, "pp3300"); 1688 if (IS_ERR(boe->pp3300)) 1689 return PTR_ERR(boe->pp3300); 1690 1691 boe->pp1800 = devm_regulator_get(dev, "pp1800"); 1692 if (IS_ERR(boe->pp1800)) 1693 return PTR_ERR(boe->pp1800); 1694 1695 boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW); 1696 if (IS_ERR(boe->enable_gpio)) { 1697 dev_err(dev, "cannot get reset-gpios %ld\n", 1698 PTR_ERR(boe->enable_gpio)); 1699 return PTR_ERR(boe->enable_gpio); 1700 } 1701 1702 gpiod_set_value(boe->enable_gpio, 0); 1703 1704 drm_panel_init(&boe->base, dev, &boe_panel_funcs, 1705 DRM_MODE_CONNECTOR_DSI); 1706 err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation); 1707 if (err < 0) { 1708 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 1709 return err; 1710 } 1711 1712 err = drm_panel_of_backlight(&boe->base); 1713 if (err) 1714 return err; 1715 1716 boe->base.funcs = &boe_panel_funcs; 1717 boe->base.dev = &boe->dsi->dev; 1718 1719 drm_panel_add(&boe->base); 1720 1721 return 0; 1722 } 1723 1724 static int boe_panel_probe(struct mipi_dsi_device *dsi) 1725 { 1726 struct boe_panel *boe; 1727 int ret; 1728 const struct panel_desc *desc; 1729 1730 boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL); 1731 if (!boe) 1732 return -ENOMEM; 1733 1734 desc = of_device_get_match_data(&dsi->dev); 1735 dsi->lanes = desc->lanes; 1736 dsi->format = desc->format; 1737 dsi->mode_flags = desc->mode_flags; 1738 boe->desc = desc; 1739 boe->dsi = dsi; 1740 ret = boe_panel_add(boe); 1741 if (ret < 0) 1742 return ret; 1743 1744 mipi_dsi_set_drvdata(dsi, boe); 1745 1746 ret = mipi_dsi_attach(dsi); 1747 if (ret) 1748 drm_panel_remove(&boe->base); 1749 1750 return ret; 1751 } 1752 1753 static void boe_panel_shutdown(struct mipi_dsi_device *dsi) 1754 { 1755 struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); 1756 1757 drm_panel_disable(&boe->base); 1758 drm_panel_unprepare(&boe->base); 1759 } 1760 1761 static void boe_panel_remove(struct mipi_dsi_device *dsi) 1762 { 1763 struct boe_panel *boe = mipi_dsi_get_drvdata(dsi); 1764 int ret; 1765 1766 boe_panel_shutdown(dsi); 1767 1768 ret = mipi_dsi_detach(dsi); 1769 if (ret < 0) 1770 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); 1771 1772 if (boe->base.dev) 1773 drm_panel_remove(&boe->base); 1774 } 1775 1776 static const struct of_device_id boe_of_match[] = { 1777 { .compatible = "boe,tv101wum-nl6", 1778 .data = &boe_tv101wum_nl6_desc 1779 }, 1780 { .compatible = "auo,kd101n80-45na", 1781 .data = &auo_kd101n80_45na_desc 1782 }, 1783 { .compatible = "boe,tv101wum-n53", 1784 .data = &boe_tv101wum_n53_desc 1785 }, 1786 { .compatible = "auo,b101uan08.3", 1787 .data = &auo_b101uan08_3_desc 1788 }, 1789 { .compatible = "boe,tv105wum-nw0", 1790 .data = &boe_tv105wum_nw0_desc 1791 }, 1792 { .compatible = "boe,tv110c9m-ll3", 1793 .data = &boe_tv110c9m_desc 1794 }, 1795 { .compatible = "innolux,hj110iz-01a", 1796 .data = &inx_hj110iz_desc 1797 }, 1798 { .compatible = "starry,2081101qfh032011-53g", 1799 .data = &starry_qfh032011_53g_desc 1800 }, 1801 { /* sentinel */ } 1802 }; 1803 MODULE_DEVICE_TABLE(of, boe_of_match); 1804 1805 static struct mipi_dsi_driver boe_panel_driver = { 1806 .driver = { 1807 .name = "panel-boe-tv101wum-nl6", 1808 .of_match_table = boe_of_match, 1809 }, 1810 .probe = boe_panel_probe, 1811 .remove = boe_panel_remove, 1812 .shutdown = boe_panel_shutdown, 1813 }; 1814 module_mipi_dsi_driver(boe_panel_driver); 1815 1816 MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>"); 1817 MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver"); 1818 MODULE_LICENSE("GPL v2"); 1819