1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2018 MediaTek Inc.
4  * Author: Jitao Shi <jitao.shi@mediatek.com>
5  */
6 
7 #include <linux/delay.h>
8 #include <linux/gpio/consumer.h>
9 #include <linux/module.h>
10 #include <linux/of.h>
11 #include <linux/of_device.h>
12 #include <linux/regulator/consumer.h>
13 
14 #include <drm/drm_connector.h>
15 #include <drm/drm_crtc.h>
16 #include <drm/drm_mipi_dsi.h>
17 #include <drm/drm_panel.h>
18 
19 #include <video/mipi_display.h>
20 
21 struct panel_desc {
22 	const struct drm_display_mode *modes;
23 	unsigned int bpc;
24 
25 	/**
26 	 * @width_mm: width of the panel's active display area
27 	 * @height_mm: height of the panel's active display area
28 	 */
29 	struct {
30 		unsigned int width_mm;
31 		unsigned int height_mm;
32 	} size;
33 
34 	unsigned long mode_flags;
35 	enum mipi_dsi_pixel_format format;
36 	const struct panel_init_cmd *init_cmds;
37 	unsigned int lanes;
38 	bool discharge_on_disable;
39 };
40 
41 struct boe_panel {
42 	struct drm_panel base;
43 	struct mipi_dsi_device *dsi;
44 
45 	const struct panel_desc *desc;
46 
47 	enum drm_panel_orientation orientation;
48 	struct regulator *pp3300;
49 	struct regulator *pp1800;
50 	struct regulator *avee;
51 	struct regulator *avdd;
52 	struct gpio_desc *enable_gpio;
53 
54 	bool prepared;
55 };
56 
57 enum dsi_cmd_type {
58 	INIT_DCS_CMD,
59 	DELAY_CMD,
60 };
61 
62 struct panel_init_cmd {
63 	enum dsi_cmd_type type;
64 	size_t len;
65 	const char *data;
66 };
67 
68 #define _INIT_DCS_CMD(...) { \
69 	.type = INIT_DCS_CMD, \
70 	.len = sizeof((char[]){__VA_ARGS__}), \
71 	.data = (char[]){__VA_ARGS__} }
72 
73 #define _INIT_DELAY_CMD(...) { \
74 	.type = DELAY_CMD,\
75 	.len = sizeof((char[]){__VA_ARGS__}), \
76 	.data = (char[]){__VA_ARGS__} }
77 
78 static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
79 	_INIT_DCS_CMD(0xFF, 0x20),
80 	_INIT_DCS_CMD(0xFB, 0x01),
81 	_INIT_DCS_CMD(0x05, 0xD9),
82 	_INIT_DCS_CMD(0x07, 0x78),
83 	_INIT_DCS_CMD(0x08, 0x5A),
84 	_INIT_DCS_CMD(0x0D, 0x63),
85 	_INIT_DCS_CMD(0x0E, 0x91),
86 	_INIT_DCS_CMD(0x0F, 0x73),
87 	_INIT_DCS_CMD(0x95, 0xE6),
88 	_INIT_DCS_CMD(0x96, 0xF0),
89 	_INIT_DCS_CMD(0x30, 0x00),
90 	_INIT_DCS_CMD(0x6D, 0x66),
91 	_INIT_DCS_CMD(0x75, 0xA2),
92 	_INIT_DCS_CMD(0x77, 0x3B),
93 
94 	_INIT_DCS_CMD(0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
95 	_INIT_DCS_CMD(0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
96 	_INIT_DCS_CMD(0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
97 	_INIT_DCS_CMD(0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
98 
99 	_INIT_DCS_CMD(0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
100 	_INIT_DCS_CMD(0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
101 	_INIT_DCS_CMD(0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
102 	_INIT_DCS_CMD(0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
103 	_INIT_DCS_CMD(0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
104 	_INIT_DCS_CMD(0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
105 	_INIT_DCS_CMD(0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
106 	_INIT_DCS_CMD(0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
107 
108 	_INIT_DCS_CMD(0xFF, 0x21),
109 	_INIT_DCS_CMD(0xFB, 0x01),
110 
111 	_INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
112 	_INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
113 	_INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
114 
115 	_INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
116 	_INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
117 	_INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
118 	_INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
119 	_INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
120 
121 	_INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
122 	_INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
123 	_INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
124 
125 	_INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
126 	_INIT_DCS_CMD(0xFF, 0x24),
127 	_INIT_DCS_CMD(0xFB, 0x01),
128 
129 	_INIT_DCS_CMD(0x00, 0x00),
130 	_INIT_DCS_CMD(0x01, 0x00),
131 
132 	_INIT_DCS_CMD(0x02, 0x1C),
133 	_INIT_DCS_CMD(0x03, 0x1C),
134 
135 	_INIT_DCS_CMD(0x04, 0x1D),
136 	_INIT_DCS_CMD(0x05, 0x1D),
137 
138 	_INIT_DCS_CMD(0x06, 0x04),
139 	_INIT_DCS_CMD(0x07, 0x04),
140 
141 	_INIT_DCS_CMD(0x08, 0x0F),
142 	_INIT_DCS_CMD(0x09, 0x0F),
143 
144 	_INIT_DCS_CMD(0x0A, 0x0E),
145 	_INIT_DCS_CMD(0x0B, 0x0E),
146 
147 	_INIT_DCS_CMD(0x0C, 0x0D),
148 	_INIT_DCS_CMD(0x0D, 0x0D),
149 
150 	_INIT_DCS_CMD(0x0E, 0x0C),
151 	_INIT_DCS_CMD(0x0F, 0x0C),
152 
153 	_INIT_DCS_CMD(0x10, 0x08),
154 	_INIT_DCS_CMD(0x11, 0x08),
155 
156 	_INIT_DCS_CMD(0x12, 0x00),
157 	_INIT_DCS_CMD(0x13, 0x00),
158 	_INIT_DCS_CMD(0x14, 0x00),
159 	_INIT_DCS_CMD(0x15, 0x00),
160 
161 	_INIT_DCS_CMD(0x16, 0x00),
162 	_INIT_DCS_CMD(0x17, 0x00),
163 
164 	_INIT_DCS_CMD(0x18, 0x1C),
165 	_INIT_DCS_CMD(0x19, 0x1C),
166 
167 	_INIT_DCS_CMD(0x1A, 0x1D),
168 	_INIT_DCS_CMD(0x1B, 0x1D),
169 
170 	_INIT_DCS_CMD(0x1C, 0x04),
171 	_INIT_DCS_CMD(0x1D, 0x04),
172 
173 	_INIT_DCS_CMD(0x1E, 0x0F),
174 	_INIT_DCS_CMD(0x1F, 0x0F),
175 
176 	_INIT_DCS_CMD(0x20, 0x0E),
177 	_INIT_DCS_CMD(0x21, 0x0E),
178 
179 	_INIT_DCS_CMD(0x22, 0x0D),
180 	_INIT_DCS_CMD(0x23, 0x0D),
181 
182 	_INIT_DCS_CMD(0x24, 0x0C),
183 	_INIT_DCS_CMD(0x25, 0x0C),
184 
185 	_INIT_DCS_CMD(0x26, 0x08),
186 	_INIT_DCS_CMD(0x27, 0x08),
187 
188 	_INIT_DCS_CMD(0x28, 0x00),
189 	_INIT_DCS_CMD(0x29, 0x00),
190 	_INIT_DCS_CMD(0x2A, 0x00),
191 	_INIT_DCS_CMD(0x2B, 0x00),
192 
193 	_INIT_DCS_CMD(0x2D, 0x20),
194 	_INIT_DCS_CMD(0x2F, 0x0A),
195 	_INIT_DCS_CMD(0x30, 0x44),
196 	_INIT_DCS_CMD(0x33, 0x0C),
197 	_INIT_DCS_CMD(0x34, 0x32),
198 
199 	_INIT_DCS_CMD(0x37, 0x44),
200 	_INIT_DCS_CMD(0x38, 0x40),
201 	_INIT_DCS_CMD(0x39, 0x00),
202 	_INIT_DCS_CMD(0x3A, 0x5D),
203 	_INIT_DCS_CMD(0x3B, 0x60),
204 	_INIT_DCS_CMD(0x3D, 0x42),
205 	_INIT_DCS_CMD(0x3F, 0x06),
206 	_INIT_DCS_CMD(0x43, 0x06),
207 	_INIT_DCS_CMD(0x47, 0x66),
208 	_INIT_DCS_CMD(0x4A, 0x5D),
209 	_INIT_DCS_CMD(0x4B, 0x60),
210 	_INIT_DCS_CMD(0x4C, 0x91),
211 	_INIT_DCS_CMD(0x4D, 0x21),
212 	_INIT_DCS_CMD(0x4E, 0x43),
213 	_INIT_DCS_CMD(0x51, 0x12),
214 	_INIT_DCS_CMD(0x52, 0x34),
215 	_INIT_DCS_CMD(0x55, 0x82, 0x02),
216 	_INIT_DCS_CMD(0x56, 0x04),
217 	_INIT_DCS_CMD(0x58, 0x21),
218 	_INIT_DCS_CMD(0x59, 0x30),
219 	_INIT_DCS_CMD(0x5A, 0x60),
220 	_INIT_DCS_CMD(0x5B, 0x50),
221 	_INIT_DCS_CMD(0x5E, 0x00, 0x06),
222 	_INIT_DCS_CMD(0x5F, 0x00),
223 	_INIT_DCS_CMD(0x65, 0x82),
224 	_INIT_DCS_CMD(0x7E, 0x20),
225 	_INIT_DCS_CMD(0x7F, 0x3C),
226 	_INIT_DCS_CMD(0x82, 0x04),
227 	_INIT_DCS_CMD(0x97, 0xC0),
228 
229 	_INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
230 	_INIT_DCS_CMD(0x91, 0x44),
231 	_INIT_DCS_CMD(0x92, 0xA9),
232 	_INIT_DCS_CMD(0x93, 0x1A),
233 	_INIT_DCS_CMD(0x94, 0x96),
234 	_INIT_DCS_CMD(0xD7, 0x55),
235 	_INIT_DCS_CMD(0xDA, 0x0A),
236 	_INIT_DCS_CMD(0xDE, 0x08),
237 	_INIT_DCS_CMD(0xDB, 0x05),
238 	_INIT_DCS_CMD(0xDC, 0xA9),
239 	_INIT_DCS_CMD(0xDD, 0x22),
240 
241 	_INIT_DCS_CMD(0xDF, 0x05),
242 	_INIT_DCS_CMD(0xE0, 0xA9),
243 	_INIT_DCS_CMD(0xE1, 0x05),
244 	_INIT_DCS_CMD(0xE2, 0xA9),
245 	_INIT_DCS_CMD(0xE3, 0x05),
246 	_INIT_DCS_CMD(0xE4, 0xA9),
247 	_INIT_DCS_CMD(0xE5, 0x05),
248 	_INIT_DCS_CMD(0xE6, 0xA9),
249 	_INIT_DCS_CMD(0x5C, 0x00),
250 	_INIT_DCS_CMD(0x5D, 0x00),
251 	_INIT_DCS_CMD(0x8D, 0x00),
252 	_INIT_DCS_CMD(0x8E, 0x00),
253 	_INIT_DCS_CMD(0xB5, 0x90),
254 	_INIT_DCS_CMD(0xFF, 0x25),
255 	_INIT_DCS_CMD(0xFB, 0x01),
256 	_INIT_DCS_CMD(0x05, 0x00),
257 	_INIT_DCS_CMD(0x19, 0x07),
258 	_INIT_DCS_CMD(0x1F, 0x60),
259 	_INIT_DCS_CMD(0x20, 0x50),
260 	_INIT_DCS_CMD(0x26, 0x60),
261 	_INIT_DCS_CMD(0x27, 0x50),
262 	_INIT_DCS_CMD(0x33, 0x60),
263 	_INIT_DCS_CMD(0x34, 0x50),
264 	_INIT_DCS_CMD(0x3F, 0xE0),
265 	_INIT_DCS_CMD(0x40, 0x00),
266 	_INIT_DCS_CMD(0x44, 0x00),
267 	_INIT_DCS_CMD(0x45, 0x40),
268 	_INIT_DCS_CMD(0x48, 0x60),
269 	_INIT_DCS_CMD(0x49, 0x50),
270 	_INIT_DCS_CMD(0x5B, 0x00),
271 	_INIT_DCS_CMD(0x5C, 0x00),
272 	_INIT_DCS_CMD(0x5D, 0x00),
273 	_INIT_DCS_CMD(0x5E, 0xD0),
274 	_INIT_DCS_CMD(0x61, 0x60),
275 	_INIT_DCS_CMD(0x62, 0x50),
276 	_INIT_DCS_CMD(0xF1, 0x10),
277 	_INIT_DCS_CMD(0xFF, 0x2A),
278 	_INIT_DCS_CMD(0xFB, 0x01),
279 
280 	_INIT_DCS_CMD(0x64, 0x16),
281 	_INIT_DCS_CMD(0x67, 0x16),
282 	_INIT_DCS_CMD(0x6A, 0x16),
283 
284 	_INIT_DCS_CMD(0x70, 0x30),
285 
286 	_INIT_DCS_CMD(0xA2, 0xF3),
287 	_INIT_DCS_CMD(0xA3, 0xFF),
288 	_INIT_DCS_CMD(0xA4, 0xFF),
289 	_INIT_DCS_CMD(0xA5, 0xFF),
290 
291 	_INIT_DCS_CMD(0xD6, 0x08),
292 
293 	_INIT_DCS_CMD(0xFF, 0x26),
294 	_INIT_DCS_CMD(0xFB, 0x01),
295 	_INIT_DCS_CMD(0x00, 0xA1),
296 
297 	_INIT_DCS_CMD(0x02, 0x31),
298 	_INIT_DCS_CMD(0x04, 0x28),
299 	_INIT_DCS_CMD(0x06, 0x30),
300 	_INIT_DCS_CMD(0x0C, 0x16),
301 	_INIT_DCS_CMD(0x0D, 0x0D),
302 	_INIT_DCS_CMD(0x0F, 0x00),
303 	_INIT_DCS_CMD(0x11, 0x00),
304 	_INIT_DCS_CMD(0x12, 0x50),
305 	_INIT_DCS_CMD(0x13, 0x56),
306 	_INIT_DCS_CMD(0x14, 0x57),
307 	_INIT_DCS_CMD(0x15, 0x00),
308 	_INIT_DCS_CMD(0x16, 0x10),
309 	_INIT_DCS_CMD(0x17, 0xA0),
310 	_INIT_DCS_CMD(0x18, 0x86),
311 	_INIT_DCS_CMD(0x19, 0x0D),
312 	_INIT_DCS_CMD(0x1A, 0x7F),
313 	_INIT_DCS_CMD(0x1B, 0x0C),
314 	_INIT_DCS_CMD(0x1C, 0xBF),
315 	_INIT_DCS_CMD(0x22, 0x00),
316 	_INIT_DCS_CMD(0x23, 0x00),
317 	_INIT_DCS_CMD(0x2A, 0x0D),
318 	_INIT_DCS_CMD(0x2B, 0x7F),
319 
320 	_INIT_DCS_CMD(0x1D, 0x00),
321 	_INIT_DCS_CMD(0x1E, 0x65),
322 	_INIT_DCS_CMD(0x1F, 0x65),
323 	_INIT_DCS_CMD(0x24, 0x00),
324 	_INIT_DCS_CMD(0x25, 0x65),
325 	_INIT_DCS_CMD(0x2F, 0x05),
326 	_INIT_DCS_CMD(0x30, 0x65),
327 	_INIT_DCS_CMD(0x31, 0x05),
328 	_INIT_DCS_CMD(0x32, 0x7D),
329 	_INIT_DCS_CMD(0x39, 0x00),
330 	_INIT_DCS_CMD(0x3A, 0x65),
331 	_INIT_DCS_CMD(0x20, 0x01),
332 	_INIT_DCS_CMD(0x33, 0x11),
333 	_INIT_DCS_CMD(0x34, 0x78),
334 	_INIT_DCS_CMD(0x35, 0x16),
335 	_INIT_DCS_CMD(0xC8, 0x04),
336 	_INIT_DCS_CMD(0xC9, 0x9E),
337 	_INIT_DCS_CMD(0xCA, 0x4E),
338 	_INIT_DCS_CMD(0xCB, 0x00),
339 
340 	_INIT_DCS_CMD(0xA9, 0x49),
341 	_INIT_DCS_CMD(0xAA, 0x4B),
342 	_INIT_DCS_CMD(0xAB, 0x48),
343 	_INIT_DCS_CMD(0xAC, 0x43),
344 	_INIT_DCS_CMD(0xAD, 0x40),
345 	_INIT_DCS_CMD(0xAE, 0x50),
346 	_INIT_DCS_CMD(0xAF, 0x44),
347 	_INIT_DCS_CMD(0xB0, 0x54),
348 	_INIT_DCS_CMD(0xB1, 0x4E),
349 	_INIT_DCS_CMD(0xB2, 0x4D),
350 	_INIT_DCS_CMD(0xB3, 0x4C),
351 	_INIT_DCS_CMD(0xB4, 0x41),
352 	_INIT_DCS_CMD(0xB5, 0x47),
353 	_INIT_DCS_CMD(0xB6, 0x53),
354 	_INIT_DCS_CMD(0xB7, 0x3E),
355 	_INIT_DCS_CMD(0xB8, 0x51),
356 	_INIT_DCS_CMD(0xB9, 0x3C),
357 	_INIT_DCS_CMD(0xBA, 0x3B),
358 	_INIT_DCS_CMD(0xBB, 0x46),
359 	_INIT_DCS_CMD(0xBC, 0x45),
360 	_INIT_DCS_CMD(0xBD, 0x55),
361 	_INIT_DCS_CMD(0xBE, 0x3D),
362 	_INIT_DCS_CMD(0xBF, 0x3F),
363 	_INIT_DCS_CMD(0xC0, 0x52),
364 	_INIT_DCS_CMD(0xC1, 0x4A),
365 	_INIT_DCS_CMD(0xC2, 0x39),
366 	_INIT_DCS_CMD(0xC3, 0x4F),
367 	_INIT_DCS_CMD(0xC4, 0x3A),
368 	_INIT_DCS_CMD(0xC5, 0x42),
369 	_INIT_DCS_CMD(0xFF, 0x27),
370 	_INIT_DCS_CMD(0xFB, 0x01),
371 
372 	_INIT_DCS_CMD(0x56, 0x06),
373 	_INIT_DCS_CMD(0x58, 0x80),
374 	_INIT_DCS_CMD(0x59, 0x75),
375 	_INIT_DCS_CMD(0x5A, 0x00),
376 	_INIT_DCS_CMD(0x5B, 0x02),
377 	_INIT_DCS_CMD(0x5C, 0x00),
378 	_INIT_DCS_CMD(0x5D, 0x00),
379 	_INIT_DCS_CMD(0x5E, 0x20),
380 	_INIT_DCS_CMD(0x5F, 0x10),
381 	_INIT_DCS_CMD(0x60, 0x00),
382 	_INIT_DCS_CMD(0x61, 0x2E),
383 	_INIT_DCS_CMD(0x62, 0x00),
384 	_INIT_DCS_CMD(0x63, 0x01),
385 	_INIT_DCS_CMD(0x64, 0x43),
386 	_INIT_DCS_CMD(0x65, 0x2D),
387 	_INIT_DCS_CMD(0x66, 0x00),
388 	_INIT_DCS_CMD(0x67, 0x01),
389 	_INIT_DCS_CMD(0x68, 0x44),
390 
391 	_INIT_DCS_CMD(0x00, 0x00),
392 	_INIT_DCS_CMD(0x78, 0x00),
393 	_INIT_DCS_CMD(0xC3, 0x00),
394 
395 	_INIT_DCS_CMD(0xFF, 0x2A),
396 	_INIT_DCS_CMD(0xFB, 0x01),
397 
398 	_INIT_DCS_CMD(0x22, 0x2F),
399 	_INIT_DCS_CMD(0x23, 0x08),
400 
401 	_INIT_DCS_CMD(0x24, 0x00),
402 	_INIT_DCS_CMD(0x25, 0x65),
403 	_INIT_DCS_CMD(0x26, 0xF8),
404 	_INIT_DCS_CMD(0x27, 0x00),
405 	_INIT_DCS_CMD(0x28, 0x1A),
406 	_INIT_DCS_CMD(0x29, 0x00),
407 	_INIT_DCS_CMD(0x2A, 0x1A),
408 	_INIT_DCS_CMD(0x2B, 0x00),
409 	_INIT_DCS_CMD(0x2D, 0x1A),
410 
411 	_INIT_DCS_CMD(0xFF, 0x23),
412 	_INIT_DCS_CMD(0xFB, 0x01),
413 
414 	_INIT_DCS_CMD(0x00, 0x80),
415 	_INIT_DCS_CMD(0x07, 0x00),
416 
417 	_INIT_DCS_CMD(0xFF, 0xE0),
418 	_INIT_DCS_CMD(0xFB, 0x01),
419 	_INIT_DCS_CMD(0x14, 0x60),
420 	_INIT_DCS_CMD(0x16, 0xC0),
421 
422 	_INIT_DCS_CMD(0xFF, 0xF0),
423 	_INIT_DCS_CMD(0xFB, 0x01),
424 	_INIT_DCS_CMD(0x3A, 0x08),
425 
426 	_INIT_DCS_CMD(0xFF, 0x10),
427 	_INIT_DCS_CMD(0xFB, 0x01),
428 	_INIT_DCS_CMD(0xB9, 0x01),
429 	_INIT_DCS_CMD(0xFF, 0x20),
430 	_INIT_DCS_CMD(0xFB, 0x01),
431 	_INIT_DCS_CMD(0x18, 0x40),
432 
433 	_INIT_DCS_CMD(0xFF, 0x10),
434 	_INIT_DCS_CMD(0xFB, 0x01),
435 	_INIT_DCS_CMD(0xB9, 0x02),
436 	_INIT_DCS_CMD(0x35, 0x00),
437 	_INIT_DCS_CMD(0x51, 0x00, 0xFF),
438 	_INIT_DCS_CMD(0x53, 0x24),
439 	_INIT_DCS_CMD(0x55, 0x00),
440 	_INIT_DCS_CMD(0xBB, 0x13),
441 	_INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
442 	_INIT_DELAY_CMD(100),
443 	_INIT_DCS_CMD(0x11),
444 	_INIT_DELAY_CMD(200),
445 	_INIT_DCS_CMD(0x29),
446 	_INIT_DELAY_CMD(100),
447 	{},
448 };
449 
450 static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
451 	_INIT_DCS_CMD(0xFF, 0x20),
452 	_INIT_DCS_CMD(0xFB, 0x01),
453 	_INIT_DCS_CMD(0x05, 0xD1),
454 	_INIT_DCS_CMD(0x0D, 0x63),
455 	_INIT_DCS_CMD(0x07, 0x8C),
456 	_INIT_DCS_CMD(0x08, 0x4B),
457 	_INIT_DCS_CMD(0x0E, 0x91),
458 	_INIT_DCS_CMD(0x0F, 0x69),
459 	_INIT_DCS_CMD(0x95, 0xF5),
460 	_INIT_DCS_CMD(0x96, 0xF5),
461 	_INIT_DCS_CMD(0x9D, 0x00),
462 	_INIT_DCS_CMD(0x9E, 0x00),
463 	_INIT_DCS_CMD(0x69, 0x98),
464 	_INIT_DCS_CMD(0x75, 0xA2),
465 	_INIT_DCS_CMD(0x77, 0xB3),
466 	_INIT_DCS_CMD(0xFF, 0x24),
467 	_INIT_DCS_CMD(0xFB, 0x01),
468 	_INIT_DCS_CMD(0x91, 0x44),
469 	_INIT_DCS_CMD(0x92, 0x7A),
470 	_INIT_DCS_CMD(0x93, 0x1A),
471 	_INIT_DCS_CMD(0x94, 0x40),
472 	_INIT_DCS_CMD(0x9A, 0x08),
473 	_INIT_DCS_CMD(0x60, 0x96),
474 	_INIT_DCS_CMD(0x61, 0xD0),
475 	_INIT_DCS_CMD(0x63, 0x70),
476 	_INIT_DCS_CMD(0xC2, 0xCF),
477 	_INIT_DCS_CMD(0x9B, 0x0F),
478 	_INIT_DCS_CMD(0x9A, 0x08),
479 	_INIT_DCS_CMD(0x00, 0x03),
480 	_INIT_DCS_CMD(0x01, 0x03),
481 	_INIT_DCS_CMD(0x02, 0x03),
482 	_INIT_DCS_CMD(0x03, 0x03),
483 	_INIT_DCS_CMD(0x04, 0x03),
484 	_INIT_DCS_CMD(0x05, 0x03),
485 	_INIT_DCS_CMD(0x06, 0x22),
486 	_INIT_DCS_CMD(0x07, 0x06),
487 	_INIT_DCS_CMD(0x08, 0x00),
488 	_INIT_DCS_CMD(0x09, 0x1D),
489 	_INIT_DCS_CMD(0x0A, 0x1C),
490 	_INIT_DCS_CMD(0x0B, 0x13),
491 	_INIT_DCS_CMD(0x0C, 0x12),
492 	_INIT_DCS_CMD(0x0D, 0x11),
493 	_INIT_DCS_CMD(0x0E, 0x10),
494 	_INIT_DCS_CMD(0x0F, 0x0F),
495 	_INIT_DCS_CMD(0x10, 0x0E),
496 	_INIT_DCS_CMD(0x11, 0x0D),
497 	_INIT_DCS_CMD(0x12, 0x0C),
498 	_INIT_DCS_CMD(0x13, 0x04),
499 	_INIT_DCS_CMD(0x14, 0x03),
500 	_INIT_DCS_CMD(0x15, 0x03),
501 	_INIT_DCS_CMD(0x16, 0x03),
502 	_INIT_DCS_CMD(0x17, 0x03),
503 	_INIT_DCS_CMD(0x18, 0x03),
504 	_INIT_DCS_CMD(0x19, 0x03),
505 	_INIT_DCS_CMD(0x1A, 0x03),
506 	_INIT_DCS_CMD(0x1B, 0x03),
507 	_INIT_DCS_CMD(0x1C, 0x22),
508 	_INIT_DCS_CMD(0x1D, 0x06),
509 	_INIT_DCS_CMD(0x1E, 0x00),
510 	_INIT_DCS_CMD(0x1F, 0x1D),
511 	_INIT_DCS_CMD(0x20, 0x1C),
512 	_INIT_DCS_CMD(0x21, 0x13),
513 	_INIT_DCS_CMD(0x22, 0x12),
514 	_INIT_DCS_CMD(0x23, 0x11),
515 	_INIT_DCS_CMD(0x24, 0x10),
516 	_INIT_DCS_CMD(0x25, 0x0F),
517 	_INIT_DCS_CMD(0x26, 0x0E),
518 	_INIT_DCS_CMD(0x27, 0x0D),
519 	_INIT_DCS_CMD(0x28, 0x0C),
520 	_INIT_DCS_CMD(0x29, 0x04),
521 	_INIT_DCS_CMD(0x2A, 0x03),
522 	_INIT_DCS_CMD(0x2B, 0x03),
523 
524 	_INIT_DCS_CMD(0x2F, 0x05),
525 	_INIT_DCS_CMD(0x30, 0x32),
526 	_INIT_DCS_CMD(0x31, 0x43),
527 	_INIT_DCS_CMD(0x33, 0x05),
528 	_INIT_DCS_CMD(0x34, 0x32),
529 	_INIT_DCS_CMD(0x35, 0x43),
530 	_INIT_DCS_CMD(0x37, 0x44),
531 	_INIT_DCS_CMD(0x38, 0x40),
532 	_INIT_DCS_CMD(0x39, 0x00),
533 	_INIT_DCS_CMD(0x3A, 0x18),
534 	_INIT_DCS_CMD(0x3B, 0x00),
535 	_INIT_DCS_CMD(0x3D, 0x93),
536 	_INIT_DCS_CMD(0xAB, 0x44),
537 	_INIT_DCS_CMD(0xAC, 0x40),
538 
539 	_INIT_DCS_CMD(0x4D, 0x21),
540 	_INIT_DCS_CMD(0x4E, 0x43),
541 	_INIT_DCS_CMD(0x4F, 0x65),
542 	_INIT_DCS_CMD(0x50, 0x87),
543 	_INIT_DCS_CMD(0x51, 0x78),
544 	_INIT_DCS_CMD(0x52, 0x56),
545 	_INIT_DCS_CMD(0x53, 0x34),
546 	_INIT_DCS_CMD(0x54, 0x21),
547 	_INIT_DCS_CMD(0x55, 0x83),
548 	_INIT_DCS_CMD(0x56, 0x08),
549 	_INIT_DCS_CMD(0x58, 0x21),
550 	_INIT_DCS_CMD(0x59, 0x40),
551 	_INIT_DCS_CMD(0x5A, 0x00),
552 	_INIT_DCS_CMD(0x5B, 0x2C),
553 	_INIT_DCS_CMD(0x5E, 0x00, 0x10),
554 	_INIT_DCS_CMD(0x5F, 0x00),
555 
556 	_INIT_DCS_CMD(0x7A, 0x00),
557 	_INIT_DCS_CMD(0x7B, 0x00),
558 	_INIT_DCS_CMD(0x7C, 0x00),
559 	_INIT_DCS_CMD(0x7D, 0x00),
560 	_INIT_DCS_CMD(0x7E, 0x20),
561 	_INIT_DCS_CMD(0x7F, 0x3C),
562 	_INIT_DCS_CMD(0x80, 0x00),
563 	_INIT_DCS_CMD(0x81, 0x00),
564 	_INIT_DCS_CMD(0x82, 0x08),
565 	_INIT_DCS_CMD(0x97, 0x02),
566 	_INIT_DCS_CMD(0xC5, 0x10),
567 	_INIT_DCS_CMD(0xDA, 0x05),
568 	_INIT_DCS_CMD(0xDB, 0x01),
569 	_INIT_DCS_CMD(0xDC, 0x7A),
570 	_INIT_DCS_CMD(0xDD, 0x55),
571 	_INIT_DCS_CMD(0xDE, 0x27),
572 	_INIT_DCS_CMD(0xDF, 0x01),
573 	_INIT_DCS_CMD(0xE0, 0x7A),
574 	_INIT_DCS_CMD(0xE1, 0x01),
575 	_INIT_DCS_CMD(0xE2, 0x7A),
576 	_INIT_DCS_CMD(0xE3, 0x01),
577 	_INIT_DCS_CMD(0xE4, 0x7A),
578 	_INIT_DCS_CMD(0xE5, 0x01),
579 	_INIT_DCS_CMD(0xE6, 0x7A),
580 	_INIT_DCS_CMD(0xE7, 0x00),
581 	_INIT_DCS_CMD(0xE8, 0x00),
582 	_INIT_DCS_CMD(0xE9, 0x01),
583 	_INIT_DCS_CMD(0xEA, 0x7A),
584 	_INIT_DCS_CMD(0xEB, 0x01),
585 	_INIT_DCS_CMD(0xEE, 0x7A),
586 	_INIT_DCS_CMD(0xEF, 0x01),
587 	_INIT_DCS_CMD(0xF0, 0x7A),
588 
589 	_INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
590 	_INIT_DCS_CMD(0xFF, 0x25),
591 	_INIT_DCS_CMD(0xFB, 0x01),
592 
593 	_INIT_DCS_CMD(0x05, 0x00),
594 
595 	_INIT_DCS_CMD(0x13, 0x02),
596 	_INIT_DCS_CMD(0x14, 0xDF),
597 	_INIT_DCS_CMD(0xF1, 0x10),
598 	_INIT_DCS_CMD(0x1E, 0x00),
599 	_INIT_DCS_CMD(0x1F, 0x00),
600 	_INIT_DCS_CMD(0x20, 0x2C),
601 	_INIT_DCS_CMD(0x25, 0x00),
602 	_INIT_DCS_CMD(0x26, 0x00),
603 	_INIT_DCS_CMD(0x27, 0x2C),
604 	_INIT_DCS_CMD(0x3F, 0x80),
605 	_INIT_DCS_CMD(0x40, 0x00),
606 	_INIT_DCS_CMD(0x43, 0x00),
607 
608 	_INIT_DCS_CMD(0x44, 0x18),
609 	_INIT_DCS_CMD(0x45, 0x00),
610 
611 	_INIT_DCS_CMD(0x48, 0x00),
612 	_INIT_DCS_CMD(0x49, 0x2C),
613 	_INIT_DCS_CMD(0x5B, 0x80),
614 	_INIT_DCS_CMD(0x5C, 0x00),
615 	_INIT_DCS_CMD(0x5D, 0x00),
616 	_INIT_DCS_CMD(0x5E, 0x00),
617 	_INIT_DCS_CMD(0x61, 0x00),
618 	_INIT_DCS_CMD(0x62, 0x2C),
619 	_INIT_DCS_CMD(0x68, 0x10),
620 	_INIT_DCS_CMD(0xFF, 0x26),
621 	_INIT_DCS_CMD(0xFB, 0x01),
622 
623 	_INIT_DCS_CMD(0x00, 0xA1),
624 	_INIT_DCS_CMD(0x02, 0x31),
625 	_INIT_DCS_CMD(0x0A, 0xF2),
626 	_INIT_DCS_CMD(0x04, 0x28),
627 	_INIT_DCS_CMD(0x06, 0x30),
628 	_INIT_DCS_CMD(0x0C, 0x16),
629 	_INIT_DCS_CMD(0x0D, 0x0D),
630 	_INIT_DCS_CMD(0x0F, 0x00),
631 	_INIT_DCS_CMD(0x11, 0x00),
632 	_INIT_DCS_CMD(0x12, 0x50),
633 	_INIT_DCS_CMD(0x13, 0x56),
634 	_INIT_DCS_CMD(0x14, 0x57),
635 	_INIT_DCS_CMD(0x15, 0x00),
636 	_INIT_DCS_CMD(0x16, 0x10),
637 	_INIT_DCS_CMD(0x17, 0xA0),
638 	_INIT_DCS_CMD(0x18, 0x86),
639 	_INIT_DCS_CMD(0x22, 0x00),
640 	_INIT_DCS_CMD(0x23, 0x00),
641 	_INIT_DCS_CMD(0x19, 0x0D),
642 	_INIT_DCS_CMD(0x1A, 0x7F),
643 	_INIT_DCS_CMD(0x1B, 0x0C),
644 	_INIT_DCS_CMD(0x1C, 0xBF),
645 	_INIT_DCS_CMD(0x2A, 0x0D),
646 	_INIT_DCS_CMD(0x2B, 0x7F),
647 	_INIT_DCS_CMD(0x20, 0x00),
648 
649 	_INIT_DCS_CMD(0x1D, 0x00),
650 	_INIT_DCS_CMD(0x1E, 0x78),
651 	_INIT_DCS_CMD(0x1F, 0x78),
652 
653 	_INIT_DCS_CMD(0x2F, 0x03),
654 	_INIT_DCS_CMD(0x30, 0x78),
655 	_INIT_DCS_CMD(0x33, 0x78),
656 	_INIT_DCS_CMD(0x34, 0x66),
657 	_INIT_DCS_CMD(0x35, 0x11),
658 
659 	_INIT_DCS_CMD(0x39, 0x10),
660 	_INIT_DCS_CMD(0x3A, 0x78),
661 	_INIT_DCS_CMD(0x3B, 0x06),
662 
663 	_INIT_DCS_CMD(0xC8, 0x04),
664 	_INIT_DCS_CMD(0xC9, 0x84),
665 	_INIT_DCS_CMD(0xCA, 0x4E),
666 	_INIT_DCS_CMD(0xCB, 0x00),
667 
668 	_INIT_DCS_CMD(0xA9, 0x50),
669 	_INIT_DCS_CMD(0xAA, 0x4F),
670 	_INIT_DCS_CMD(0xAB, 0x4D),
671 	_INIT_DCS_CMD(0xAC, 0x4A),
672 	_INIT_DCS_CMD(0xAD, 0x48),
673 	_INIT_DCS_CMD(0xAE, 0x46),
674 	_INIT_DCS_CMD(0xFF, 0x27),
675 	_INIT_DCS_CMD(0xFB, 0x01),
676 	_INIT_DCS_CMD(0xC0, 0x18),
677 	_INIT_DCS_CMD(0xC1, 0x00),
678 	_INIT_DCS_CMD(0xC2, 0x00),
679 	_INIT_DCS_CMD(0x56, 0x06),
680 	_INIT_DCS_CMD(0x58, 0x80),
681 	_INIT_DCS_CMD(0x59, 0x75),
682 	_INIT_DCS_CMD(0x5A, 0x00),
683 	_INIT_DCS_CMD(0x5B, 0x02),
684 	_INIT_DCS_CMD(0x5C, 0x00),
685 	_INIT_DCS_CMD(0x5D, 0x00),
686 	_INIT_DCS_CMD(0x5E, 0x20),
687 	_INIT_DCS_CMD(0x5F, 0x10),
688 	_INIT_DCS_CMD(0x60, 0x00),
689 	_INIT_DCS_CMD(0x61, 0x2E),
690 	_INIT_DCS_CMD(0x62, 0x00),
691 	_INIT_DCS_CMD(0x63, 0x01),
692 	_INIT_DCS_CMD(0x64, 0x43),
693 	_INIT_DCS_CMD(0x65, 0x2D),
694 	_INIT_DCS_CMD(0x66, 0x00),
695 	_INIT_DCS_CMD(0x67, 0x01),
696 	_INIT_DCS_CMD(0x68, 0x43),
697 	_INIT_DCS_CMD(0x98, 0x01),
698 	_INIT_DCS_CMD(0xB4, 0x03),
699 	_INIT_DCS_CMD(0x9B, 0xBD),
700 	_INIT_DCS_CMD(0xA0, 0x90),
701 	_INIT_DCS_CMD(0xAB, 0x1B),
702 	_INIT_DCS_CMD(0xBC, 0x0C),
703 	_INIT_DCS_CMD(0xBD, 0x28),
704 
705 	_INIT_DCS_CMD(0xFF, 0x2A),
706 	_INIT_DCS_CMD(0xFB, 0x01),
707 
708 	_INIT_DCS_CMD(0x22, 0x2F),
709 	_INIT_DCS_CMD(0x23, 0x08),
710 
711 	_INIT_DCS_CMD(0x24, 0x00),
712 	_INIT_DCS_CMD(0x25, 0x65),
713 	_INIT_DCS_CMD(0x26, 0xF8),
714 	_INIT_DCS_CMD(0x27, 0x00),
715 	_INIT_DCS_CMD(0x28, 0x1A),
716 	_INIT_DCS_CMD(0x29, 0x00),
717 	_INIT_DCS_CMD(0x2A, 0x1A),
718 	_INIT_DCS_CMD(0x2B, 0x00),
719 	_INIT_DCS_CMD(0x2D, 0x1A),
720 
721 	_INIT_DCS_CMD(0x64, 0x96),
722 	_INIT_DCS_CMD(0x65, 0x00),
723 	_INIT_DCS_CMD(0x66, 0x00),
724 	_INIT_DCS_CMD(0x6A, 0x96),
725 	_INIT_DCS_CMD(0x6B, 0x00),
726 	_INIT_DCS_CMD(0x6C, 0x00),
727 	_INIT_DCS_CMD(0x70, 0x92),
728 	_INIT_DCS_CMD(0x71, 0x00),
729 	_INIT_DCS_CMD(0x72, 0x00),
730 	_INIT_DCS_CMD(0xA2, 0x33),
731 	_INIT_DCS_CMD(0xA3, 0x30),
732 	_INIT_DCS_CMD(0xA4, 0xC0),
733 	_INIT_DCS_CMD(0xE8, 0x00),
734 	_INIT_DCS_CMD(0x97, 0x3C),
735 	_INIT_DCS_CMD(0x98, 0x02),
736 	_INIT_DCS_CMD(0x99, 0x95),
737 	_INIT_DCS_CMD(0x9A, 0x06),
738 	_INIT_DCS_CMD(0x9B, 0x00),
739 	_INIT_DCS_CMD(0x9C, 0x0B),
740 	_INIT_DCS_CMD(0x9D, 0x0A),
741 	_INIT_DCS_CMD(0x9E, 0x90),
742 	_INIT_DCS_CMD(0xFF, 0xF0),
743 	_INIT_DCS_CMD(0xFB, 0x01),
744 	_INIT_DCS_CMD(0x3A, 0x08),
745 	_INIT_DCS_CMD(0xFF, 0xD0),
746 	_INIT_DCS_CMD(0xFB, 0x01),
747 	_INIT_DCS_CMD(0x00, 0x33),
748 	_INIT_DCS_CMD(0x08, 0x01),
749 	_INIT_DCS_CMD(0x09, 0xBF),
750 	_INIT_DCS_CMD(0x2F, 0x33),
751 	_INIT_DCS_CMD(0xFF, 0x23),
752 	_INIT_DCS_CMD(0xFB, 0x01),
753 	_INIT_DCS_CMD(0x00, 0x80),
754 	_INIT_DCS_CMD(0x07, 0x00),
755 	_INIT_DCS_CMD(0xFF, 0x20),
756 	_INIT_DCS_CMD(0xFB, 0x01),
757 	_INIT_DCS_CMD(0x30, 0x00),
758 	_INIT_DCS_CMD(0xFF, 0x24),
759 	_INIT_DCS_CMD(0x5C, 0x88),
760 	_INIT_DCS_CMD(0x5D, 0x08),
761 	_INIT_DCS_CMD(0xFF, 0x10),
762 	_INIT_DCS_CMD(0xB9, 0x01),
763 	_INIT_DCS_CMD(0xFF, 0x20),
764 	_INIT_DCS_CMD(0x18, 0x40),
765 	_INIT_DCS_CMD(0xFF, 0x10),
766 	_INIT_DCS_CMD(0xB9, 0x02),
767 	_INIT_DCS_CMD(0xFF, 0x10),
768 	_INIT_DCS_CMD(0xFB, 0x01),
769 	_INIT_DCS_CMD(0xBB, 0x13),
770 	_INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
771 	_INIT_DCS_CMD(0x35, 0x00),
772 	_INIT_DCS_CMD(0x51, 0x0F, 0xFF),
773 	_INIT_DCS_CMD(0x53, 0x24),
774 	_INIT_DELAY_CMD(100),
775 	_INIT_DCS_CMD(0x11),
776 	_INIT_DELAY_CMD(200),
777 	_INIT_DCS_CMD(0x29),
778 	_INIT_DELAY_CMD(100),
779 	{},
780 };
781 
782 static const struct panel_init_cmd boe_init_cmd[] = {
783 	_INIT_DELAY_CMD(24),
784 	_INIT_DCS_CMD(0xB0, 0x05),
785 	_INIT_DCS_CMD(0xB1, 0xE5),
786 	_INIT_DCS_CMD(0xB3, 0x52),
787 	_INIT_DCS_CMD(0xB0, 0x00),
788 	_INIT_DCS_CMD(0xB3, 0x88),
789 	_INIT_DCS_CMD(0xB0, 0x04),
790 	_INIT_DCS_CMD(0xB8, 0x00),
791 	_INIT_DCS_CMD(0xB0, 0x00),
792 	_INIT_DCS_CMD(0xB6, 0x03),
793 	_INIT_DCS_CMD(0xBA, 0x8B),
794 	_INIT_DCS_CMD(0xBF, 0x1A),
795 	_INIT_DCS_CMD(0xC0, 0x0F),
796 	_INIT_DCS_CMD(0xC2, 0x0C),
797 	_INIT_DCS_CMD(0xC3, 0x02),
798 	_INIT_DCS_CMD(0xC4, 0x0C),
799 	_INIT_DCS_CMD(0xC5, 0x02),
800 	_INIT_DCS_CMD(0xB0, 0x01),
801 	_INIT_DCS_CMD(0xE0, 0x26),
802 	_INIT_DCS_CMD(0xE1, 0x26),
803 	_INIT_DCS_CMD(0xDC, 0x00),
804 	_INIT_DCS_CMD(0xDD, 0x00),
805 	_INIT_DCS_CMD(0xCC, 0x26),
806 	_INIT_DCS_CMD(0xCD, 0x26),
807 	_INIT_DCS_CMD(0xC8, 0x00),
808 	_INIT_DCS_CMD(0xC9, 0x00),
809 	_INIT_DCS_CMD(0xD2, 0x03),
810 	_INIT_DCS_CMD(0xD3, 0x03),
811 	_INIT_DCS_CMD(0xE6, 0x04),
812 	_INIT_DCS_CMD(0xE7, 0x04),
813 	_INIT_DCS_CMD(0xC4, 0x09),
814 	_INIT_DCS_CMD(0xC5, 0x09),
815 	_INIT_DCS_CMD(0xD8, 0x0A),
816 	_INIT_DCS_CMD(0xD9, 0x0A),
817 	_INIT_DCS_CMD(0xC2, 0x0B),
818 	_INIT_DCS_CMD(0xC3, 0x0B),
819 	_INIT_DCS_CMD(0xD6, 0x0C),
820 	_INIT_DCS_CMD(0xD7, 0x0C),
821 	_INIT_DCS_CMD(0xC0, 0x05),
822 	_INIT_DCS_CMD(0xC1, 0x05),
823 	_INIT_DCS_CMD(0xD4, 0x06),
824 	_INIT_DCS_CMD(0xD5, 0x06),
825 	_INIT_DCS_CMD(0xCA, 0x07),
826 	_INIT_DCS_CMD(0xCB, 0x07),
827 	_INIT_DCS_CMD(0xDE, 0x08),
828 	_INIT_DCS_CMD(0xDF, 0x08),
829 	_INIT_DCS_CMD(0xB0, 0x02),
830 	_INIT_DCS_CMD(0xC0, 0x00),
831 	_INIT_DCS_CMD(0xC1, 0x0D),
832 	_INIT_DCS_CMD(0xC2, 0x17),
833 	_INIT_DCS_CMD(0xC3, 0x26),
834 	_INIT_DCS_CMD(0xC4, 0x31),
835 	_INIT_DCS_CMD(0xC5, 0x1C),
836 	_INIT_DCS_CMD(0xC6, 0x2C),
837 	_INIT_DCS_CMD(0xC7, 0x33),
838 	_INIT_DCS_CMD(0xC8, 0x31),
839 	_INIT_DCS_CMD(0xC9, 0x37),
840 	_INIT_DCS_CMD(0xCA, 0x37),
841 	_INIT_DCS_CMD(0xCB, 0x37),
842 	_INIT_DCS_CMD(0xCC, 0x39),
843 	_INIT_DCS_CMD(0xCD, 0x2E),
844 	_INIT_DCS_CMD(0xCE, 0x2F),
845 	_INIT_DCS_CMD(0xCF, 0x2F),
846 	_INIT_DCS_CMD(0xD0, 0x07),
847 	_INIT_DCS_CMD(0xD2, 0x00),
848 	_INIT_DCS_CMD(0xD3, 0x0D),
849 	_INIT_DCS_CMD(0xD4, 0x17),
850 	_INIT_DCS_CMD(0xD5, 0x26),
851 	_INIT_DCS_CMD(0xD6, 0x31),
852 	_INIT_DCS_CMD(0xD7, 0x3F),
853 	_INIT_DCS_CMD(0xD8, 0x3F),
854 	_INIT_DCS_CMD(0xD9, 0x3F),
855 	_INIT_DCS_CMD(0xDA, 0x3F),
856 	_INIT_DCS_CMD(0xDB, 0x37),
857 	_INIT_DCS_CMD(0xDC, 0x37),
858 	_INIT_DCS_CMD(0xDD, 0x37),
859 	_INIT_DCS_CMD(0xDE, 0x39),
860 	_INIT_DCS_CMD(0xDF, 0x2E),
861 	_INIT_DCS_CMD(0xE0, 0x2F),
862 	_INIT_DCS_CMD(0xE1, 0x2F),
863 	_INIT_DCS_CMD(0xE2, 0x07),
864 	_INIT_DCS_CMD(0xB0, 0x03),
865 	_INIT_DCS_CMD(0xC8, 0x0B),
866 	_INIT_DCS_CMD(0xC9, 0x07),
867 	_INIT_DCS_CMD(0xC3, 0x00),
868 	_INIT_DCS_CMD(0xE7, 0x00),
869 	_INIT_DCS_CMD(0xC5, 0x2A),
870 	_INIT_DCS_CMD(0xDE, 0x2A),
871 	_INIT_DCS_CMD(0xCA, 0x43),
872 	_INIT_DCS_CMD(0xC9, 0x07),
873 	_INIT_DCS_CMD(0xE4, 0xC0),
874 	_INIT_DCS_CMD(0xE5, 0x0D),
875 	_INIT_DCS_CMD(0xCB, 0x00),
876 	_INIT_DCS_CMD(0xB0, 0x06),
877 	_INIT_DCS_CMD(0xB8, 0xA5),
878 	_INIT_DCS_CMD(0xC0, 0xA5),
879 	_INIT_DCS_CMD(0xC7, 0x0F),
880 	_INIT_DCS_CMD(0xD5, 0x32),
881 	_INIT_DCS_CMD(0xB8, 0x00),
882 	_INIT_DCS_CMD(0xC0, 0x00),
883 	_INIT_DCS_CMD(0xBC, 0x00),
884 	_INIT_DCS_CMD(0xB0, 0x07),
885 	_INIT_DCS_CMD(0xB1, 0x00),
886 	_INIT_DCS_CMD(0xB2, 0x02),
887 	_INIT_DCS_CMD(0xB3, 0x0F),
888 	_INIT_DCS_CMD(0xB4, 0x25),
889 	_INIT_DCS_CMD(0xB5, 0x39),
890 	_INIT_DCS_CMD(0xB6, 0x4E),
891 	_INIT_DCS_CMD(0xB7, 0x72),
892 	_INIT_DCS_CMD(0xB8, 0x97),
893 	_INIT_DCS_CMD(0xB9, 0xDC),
894 	_INIT_DCS_CMD(0xBA, 0x22),
895 	_INIT_DCS_CMD(0xBB, 0xA4),
896 	_INIT_DCS_CMD(0xBC, 0x2B),
897 	_INIT_DCS_CMD(0xBD, 0x2F),
898 	_INIT_DCS_CMD(0xBE, 0xA9),
899 	_INIT_DCS_CMD(0xBF, 0x25),
900 	_INIT_DCS_CMD(0xC0, 0x61),
901 	_INIT_DCS_CMD(0xC1, 0x97),
902 	_INIT_DCS_CMD(0xC2, 0xB2),
903 	_INIT_DCS_CMD(0xC3, 0xCD),
904 	_INIT_DCS_CMD(0xC4, 0xD9),
905 	_INIT_DCS_CMD(0xC5, 0xE7),
906 	_INIT_DCS_CMD(0xC6, 0xF4),
907 	_INIT_DCS_CMD(0xC7, 0xFA),
908 	_INIT_DCS_CMD(0xC8, 0xFC),
909 	_INIT_DCS_CMD(0xC9, 0x00),
910 	_INIT_DCS_CMD(0xCA, 0x00),
911 	_INIT_DCS_CMD(0xCB, 0x16),
912 	_INIT_DCS_CMD(0xCC, 0xAF),
913 	_INIT_DCS_CMD(0xCD, 0xFF),
914 	_INIT_DCS_CMD(0xCE, 0xFF),
915 	_INIT_DCS_CMD(0xB0, 0x08),
916 	_INIT_DCS_CMD(0xB1, 0x04),
917 	_INIT_DCS_CMD(0xB2, 0x05),
918 	_INIT_DCS_CMD(0xB3, 0x11),
919 	_INIT_DCS_CMD(0xB4, 0x24),
920 	_INIT_DCS_CMD(0xB5, 0x39),
921 	_INIT_DCS_CMD(0xB6, 0x4F),
922 	_INIT_DCS_CMD(0xB7, 0x72),
923 	_INIT_DCS_CMD(0xB8, 0x98),
924 	_INIT_DCS_CMD(0xB9, 0xDC),
925 	_INIT_DCS_CMD(0xBA, 0x23),
926 	_INIT_DCS_CMD(0xBB, 0xA6),
927 	_INIT_DCS_CMD(0xBC, 0x2C),
928 	_INIT_DCS_CMD(0xBD, 0x30),
929 	_INIT_DCS_CMD(0xBE, 0xAA),
930 	_INIT_DCS_CMD(0xBF, 0x26),
931 	_INIT_DCS_CMD(0xC0, 0x62),
932 	_INIT_DCS_CMD(0xC1, 0x9B),
933 	_INIT_DCS_CMD(0xC2, 0xB5),
934 	_INIT_DCS_CMD(0xC3, 0xCF),
935 	_INIT_DCS_CMD(0xC4, 0xDB),
936 	_INIT_DCS_CMD(0xC5, 0xE8),
937 	_INIT_DCS_CMD(0xC6, 0xF5),
938 	_INIT_DCS_CMD(0xC7, 0xFA),
939 	_INIT_DCS_CMD(0xC8, 0xFC),
940 	_INIT_DCS_CMD(0xC9, 0x00),
941 	_INIT_DCS_CMD(0xCA, 0x00),
942 	_INIT_DCS_CMD(0xCB, 0x16),
943 	_INIT_DCS_CMD(0xCC, 0xAF),
944 	_INIT_DCS_CMD(0xCD, 0xFF),
945 	_INIT_DCS_CMD(0xCE, 0xFF),
946 	_INIT_DCS_CMD(0xB0, 0x09),
947 	_INIT_DCS_CMD(0xB1, 0x04),
948 	_INIT_DCS_CMD(0xB2, 0x02),
949 	_INIT_DCS_CMD(0xB3, 0x16),
950 	_INIT_DCS_CMD(0xB4, 0x24),
951 	_INIT_DCS_CMD(0xB5, 0x3B),
952 	_INIT_DCS_CMD(0xB6, 0x4F),
953 	_INIT_DCS_CMD(0xB7, 0x73),
954 	_INIT_DCS_CMD(0xB8, 0x99),
955 	_INIT_DCS_CMD(0xB9, 0xE0),
956 	_INIT_DCS_CMD(0xBA, 0x26),
957 	_INIT_DCS_CMD(0xBB, 0xAD),
958 	_INIT_DCS_CMD(0xBC, 0x36),
959 	_INIT_DCS_CMD(0xBD, 0x3A),
960 	_INIT_DCS_CMD(0xBE, 0xAE),
961 	_INIT_DCS_CMD(0xBF, 0x2A),
962 	_INIT_DCS_CMD(0xC0, 0x66),
963 	_INIT_DCS_CMD(0xC1, 0x9E),
964 	_INIT_DCS_CMD(0xC2, 0xB8),
965 	_INIT_DCS_CMD(0xC3, 0xD1),
966 	_INIT_DCS_CMD(0xC4, 0xDD),
967 	_INIT_DCS_CMD(0xC5, 0xE9),
968 	_INIT_DCS_CMD(0xC6, 0xF6),
969 	_INIT_DCS_CMD(0xC7, 0xFA),
970 	_INIT_DCS_CMD(0xC8, 0xFC),
971 	_INIT_DCS_CMD(0xC9, 0x00),
972 	_INIT_DCS_CMD(0xCA, 0x00),
973 	_INIT_DCS_CMD(0xCB, 0x16),
974 	_INIT_DCS_CMD(0xCC, 0xAF),
975 	_INIT_DCS_CMD(0xCD, 0xFF),
976 	_INIT_DCS_CMD(0xCE, 0xFF),
977 	_INIT_DCS_CMD(0xB0, 0x0A),
978 	_INIT_DCS_CMD(0xB1, 0x00),
979 	_INIT_DCS_CMD(0xB2, 0x02),
980 	_INIT_DCS_CMD(0xB3, 0x0F),
981 	_INIT_DCS_CMD(0xB4, 0x25),
982 	_INIT_DCS_CMD(0xB5, 0x39),
983 	_INIT_DCS_CMD(0xB6, 0x4E),
984 	_INIT_DCS_CMD(0xB7, 0x72),
985 	_INIT_DCS_CMD(0xB8, 0x97),
986 	_INIT_DCS_CMD(0xB9, 0xDC),
987 	_INIT_DCS_CMD(0xBA, 0x22),
988 	_INIT_DCS_CMD(0xBB, 0xA4),
989 	_INIT_DCS_CMD(0xBC, 0x2B),
990 	_INIT_DCS_CMD(0xBD, 0x2F),
991 	_INIT_DCS_CMD(0xBE, 0xA9),
992 	_INIT_DCS_CMD(0xBF, 0x25),
993 	_INIT_DCS_CMD(0xC0, 0x61),
994 	_INIT_DCS_CMD(0xC1, 0x97),
995 	_INIT_DCS_CMD(0xC2, 0xB2),
996 	_INIT_DCS_CMD(0xC3, 0xCD),
997 	_INIT_DCS_CMD(0xC4, 0xD9),
998 	_INIT_DCS_CMD(0xC5, 0xE7),
999 	_INIT_DCS_CMD(0xC6, 0xF4),
1000 	_INIT_DCS_CMD(0xC7, 0xFA),
1001 	_INIT_DCS_CMD(0xC8, 0xFC),
1002 	_INIT_DCS_CMD(0xC9, 0x00),
1003 	_INIT_DCS_CMD(0xCA, 0x00),
1004 	_INIT_DCS_CMD(0xCB, 0x16),
1005 	_INIT_DCS_CMD(0xCC, 0xAF),
1006 	_INIT_DCS_CMD(0xCD, 0xFF),
1007 	_INIT_DCS_CMD(0xCE, 0xFF),
1008 	_INIT_DCS_CMD(0xB0, 0x0B),
1009 	_INIT_DCS_CMD(0xB1, 0x04),
1010 	_INIT_DCS_CMD(0xB2, 0x05),
1011 	_INIT_DCS_CMD(0xB3, 0x11),
1012 	_INIT_DCS_CMD(0xB4, 0x24),
1013 	_INIT_DCS_CMD(0xB5, 0x39),
1014 	_INIT_DCS_CMD(0xB6, 0x4F),
1015 	_INIT_DCS_CMD(0xB7, 0x72),
1016 	_INIT_DCS_CMD(0xB8, 0x98),
1017 	_INIT_DCS_CMD(0xB9, 0xDC),
1018 	_INIT_DCS_CMD(0xBA, 0x23),
1019 	_INIT_DCS_CMD(0xBB, 0xA6),
1020 	_INIT_DCS_CMD(0xBC, 0x2C),
1021 	_INIT_DCS_CMD(0xBD, 0x30),
1022 	_INIT_DCS_CMD(0xBE, 0xAA),
1023 	_INIT_DCS_CMD(0xBF, 0x26),
1024 	_INIT_DCS_CMD(0xC0, 0x62),
1025 	_INIT_DCS_CMD(0xC1, 0x9B),
1026 	_INIT_DCS_CMD(0xC2, 0xB5),
1027 	_INIT_DCS_CMD(0xC3, 0xCF),
1028 	_INIT_DCS_CMD(0xC4, 0xDB),
1029 	_INIT_DCS_CMD(0xC5, 0xE8),
1030 	_INIT_DCS_CMD(0xC6, 0xF5),
1031 	_INIT_DCS_CMD(0xC7, 0xFA),
1032 	_INIT_DCS_CMD(0xC8, 0xFC),
1033 	_INIT_DCS_CMD(0xC9, 0x00),
1034 	_INIT_DCS_CMD(0xCA, 0x00),
1035 	_INIT_DCS_CMD(0xCB, 0x16),
1036 	_INIT_DCS_CMD(0xCC, 0xAF),
1037 	_INIT_DCS_CMD(0xCD, 0xFF),
1038 	_INIT_DCS_CMD(0xCE, 0xFF),
1039 	_INIT_DCS_CMD(0xB0, 0x0C),
1040 	_INIT_DCS_CMD(0xB1, 0x04),
1041 	_INIT_DCS_CMD(0xB2, 0x02),
1042 	_INIT_DCS_CMD(0xB3, 0x16),
1043 	_INIT_DCS_CMD(0xB4, 0x24),
1044 	_INIT_DCS_CMD(0xB5, 0x3B),
1045 	_INIT_DCS_CMD(0xB6, 0x4F),
1046 	_INIT_DCS_CMD(0xB7, 0x73),
1047 	_INIT_DCS_CMD(0xB8, 0x99),
1048 	_INIT_DCS_CMD(0xB9, 0xE0),
1049 	_INIT_DCS_CMD(0xBA, 0x26),
1050 	_INIT_DCS_CMD(0xBB, 0xAD),
1051 	_INIT_DCS_CMD(0xBC, 0x36),
1052 	_INIT_DCS_CMD(0xBD, 0x3A),
1053 	_INIT_DCS_CMD(0xBE, 0xAE),
1054 	_INIT_DCS_CMD(0xBF, 0x2A),
1055 	_INIT_DCS_CMD(0xC0, 0x66),
1056 	_INIT_DCS_CMD(0xC1, 0x9E),
1057 	_INIT_DCS_CMD(0xC2, 0xB8),
1058 	_INIT_DCS_CMD(0xC3, 0xD1),
1059 	_INIT_DCS_CMD(0xC4, 0xDD),
1060 	_INIT_DCS_CMD(0xC5, 0xE9),
1061 	_INIT_DCS_CMD(0xC6, 0xF6),
1062 	_INIT_DCS_CMD(0xC7, 0xFA),
1063 	_INIT_DCS_CMD(0xC8, 0xFC),
1064 	_INIT_DCS_CMD(0xC9, 0x00),
1065 	_INIT_DCS_CMD(0xCA, 0x00),
1066 	_INIT_DCS_CMD(0xCB, 0x16),
1067 	_INIT_DCS_CMD(0xCC, 0xAF),
1068 	_INIT_DCS_CMD(0xCD, 0xFF),
1069 	_INIT_DCS_CMD(0xCE, 0xFF),
1070 	_INIT_DCS_CMD(0xB0, 0x00),
1071 	_INIT_DCS_CMD(0xB3, 0x08),
1072 	_INIT_DCS_CMD(0xB0, 0x04),
1073 	_INIT_DCS_CMD(0xB8, 0x68),
1074 	_INIT_DELAY_CMD(150),
1075 	{},
1076 };
1077 
1078 static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
1079 	_INIT_DELAY_CMD(24),
1080 	_INIT_DCS_CMD(0x11),
1081 	_INIT_DELAY_CMD(120),
1082 	_INIT_DCS_CMD(0x29),
1083 	_INIT_DELAY_CMD(120),
1084 	{},
1085 };
1086 
1087 static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = {
1088 	_INIT_DELAY_CMD(24),
1089 	_INIT_DCS_CMD(0xB0, 0x01),
1090 	_INIT_DCS_CMD(0xC0, 0x48),
1091 	_INIT_DCS_CMD(0xC1, 0x48),
1092 	_INIT_DCS_CMD(0xC2, 0x47),
1093 	_INIT_DCS_CMD(0xC3, 0x47),
1094 	_INIT_DCS_CMD(0xC4, 0x46),
1095 	_INIT_DCS_CMD(0xC5, 0x46),
1096 	_INIT_DCS_CMD(0xC6, 0x45),
1097 	_INIT_DCS_CMD(0xC7, 0x45),
1098 	_INIT_DCS_CMD(0xC8, 0x64),
1099 	_INIT_DCS_CMD(0xC9, 0x64),
1100 	_INIT_DCS_CMD(0xCA, 0x4F),
1101 	_INIT_DCS_CMD(0xCB, 0x4F),
1102 	_INIT_DCS_CMD(0xCC, 0x40),
1103 	_INIT_DCS_CMD(0xCD, 0x40),
1104 	_INIT_DCS_CMD(0xCE, 0x66),
1105 	_INIT_DCS_CMD(0xCF, 0x66),
1106 	_INIT_DCS_CMD(0xD0, 0x4F),
1107 	_INIT_DCS_CMD(0xD1, 0x4F),
1108 	_INIT_DCS_CMD(0xD2, 0x41),
1109 	_INIT_DCS_CMD(0xD3, 0x41),
1110 	_INIT_DCS_CMD(0xD4, 0x48),
1111 	_INIT_DCS_CMD(0xD5, 0x48),
1112 	_INIT_DCS_CMD(0xD6, 0x47),
1113 	_INIT_DCS_CMD(0xD7, 0x47),
1114 	_INIT_DCS_CMD(0xD8, 0x46),
1115 	_INIT_DCS_CMD(0xD9, 0x46),
1116 	_INIT_DCS_CMD(0xDA, 0x45),
1117 	_INIT_DCS_CMD(0xDB, 0x45),
1118 	_INIT_DCS_CMD(0xDC, 0x64),
1119 	_INIT_DCS_CMD(0xDD, 0x64),
1120 	_INIT_DCS_CMD(0xDE, 0x4F),
1121 	_INIT_DCS_CMD(0xDF, 0x4F),
1122 	_INIT_DCS_CMD(0xE0, 0x40),
1123 	_INIT_DCS_CMD(0xE1, 0x40),
1124 	_INIT_DCS_CMD(0xE2, 0x66),
1125 	_INIT_DCS_CMD(0xE3, 0x66),
1126 	_INIT_DCS_CMD(0xE4, 0x4F),
1127 	_INIT_DCS_CMD(0xE5, 0x4F),
1128 	_INIT_DCS_CMD(0xE6, 0x41),
1129 	_INIT_DCS_CMD(0xE7, 0x41),
1130 	_INIT_DELAY_CMD(150),
1131 	{},
1132 };
1133 
1134 static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
1135 {
1136 	return container_of(panel, struct boe_panel, base);
1137 }
1138 
1139 static int boe_panel_init_dcs_cmd(struct boe_panel *boe)
1140 {
1141 	struct mipi_dsi_device *dsi = boe->dsi;
1142 	struct drm_panel *panel = &boe->base;
1143 	int i, err = 0;
1144 
1145 	if (boe->desc->init_cmds) {
1146 		const struct panel_init_cmd *init_cmds = boe->desc->init_cmds;
1147 
1148 		for (i = 0; init_cmds[i].len != 0; i++) {
1149 			const struct panel_init_cmd *cmd = &init_cmds[i];
1150 
1151 			switch (cmd->type) {
1152 			case DELAY_CMD:
1153 				msleep(cmd->data[0]);
1154 				err = 0;
1155 				break;
1156 
1157 			case INIT_DCS_CMD:
1158 				err = mipi_dsi_dcs_write(dsi, cmd->data[0],
1159 							 cmd->len <= 1 ? NULL :
1160 							 &cmd->data[1],
1161 							 cmd->len - 1);
1162 				break;
1163 
1164 			default:
1165 				err = -EINVAL;
1166 			}
1167 
1168 			if (err < 0) {
1169 				dev_err(panel->dev,
1170 					"failed to write command %u\n", i);
1171 				return err;
1172 			}
1173 		}
1174 	}
1175 	return 0;
1176 }
1177 
1178 static int boe_panel_enter_sleep_mode(struct boe_panel *boe)
1179 {
1180 	struct mipi_dsi_device *dsi = boe->dsi;
1181 	int ret;
1182 
1183 	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
1184 
1185 	ret = mipi_dsi_dcs_set_display_off(dsi);
1186 	if (ret < 0)
1187 		return ret;
1188 
1189 	ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
1190 	if (ret < 0)
1191 		return ret;
1192 
1193 	return 0;
1194 }
1195 
1196 static int boe_panel_unprepare(struct drm_panel *panel)
1197 {
1198 	struct boe_panel *boe = to_boe_panel(panel);
1199 	int ret;
1200 
1201 	if (!boe->prepared)
1202 		return 0;
1203 
1204 	ret = boe_panel_enter_sleep_mode(boe);
1205 	if (ret < 0) {
1206 		dev_err(panel->dev, "failed to set panel off: %d\n", ret);
1207 		return ret;
1208 	}
1209 
1210 	msleep(150);
1211 
1212 	if (boe->desc->discharge_on_disable) {
1213 		regulator_disable(boe->avee);
1214 		regulator_disable(boe->avdd);
1215 		usleep_range(5000, 7000);
1216 		gpiod_set_value(boe->enable_gpio, 0);
1217 		usleep_range(5000, 7000);
1218 		regulator_disable(boe->pp1800);
1219 		regulator_disable(boe->pp3300);
1220 	} else {
1221 		gpiod_set_value(boe->enable_gpio, 0);
1222 		usleep_range(1000, 2000);
1223 		regulator_disable(boe->avee);
1224 		regulator_disable(boe->avdd);
1225 		usleep_range(5000, 7000);
1226 		regulator_disable(boe->pp1800);
1227 		regulator_disable(boe->pp3300);
1228 	}
1229 
1230 	boe->prepared = false;
1231 
1232 	return 0;
1233 }
1234 
1235 static int boe_panel_prepare(struct drm_panel *panel)
1236 {
1237 	struct boe_panel *boe = to_boe_panel(panel);
1238 	int ret;
1239 
1240 	if (boe->prepared)
1241 		return 0;
1242 
1243 	gpiod_set_value(boe->enable_gpio, 0);
1244 	usleep_range(1000, 1500);
1245 
1246 	ret = regulator_enable(boe->pp3300);
1247 	if (ret < 0)
1248 		return ret;
1249 
1250 	ret = regulator_enable(boe->pp1800);
1251 	if (ret < 0)
1252 		return ret;
1253 
1254 	usleep_range(3000, 5000);
1255 
1256 	ret = regulator_enable(boe->avdd);
1257 	if (ret < 0)
1258 		goto poweroff1v8;
1259 	ret = regulator_enable(boe->avee);
1260 	if (ret < 0)
1261 		goto poweroffavdd;
1262 
1263 	usleep_range(10000, 11000);
1264 
1265 	gpiod_set_value(boe->enable_gpio, 1);
1266 	usleep_range(1000, 2000);
1267 	gpiod_set_value(boe->enable_gpio, 0);
1268 	usleep_range(1000, 2000);
1269 	gpiod_set_value(boe->enable_gpio, 1);
1270 	usleep_range(6000, 10000);
1271 
1272 	ret = boe_panel_init_dcs_cmd(boe);
1273 	if (ret < 0) {
1274 		dev_err(panel->dev, "failed to init panel: %d\n", ret);
1275 		goto poweroff;
1276 	}
1277 
1278 	boe->prepared = true;
1279 
1280 	return 0;
1281 
1282 poweroff:
1283 	regulator_disable(boe->avee);
1284 poweroffavdd:
1285 	regulator_disable(boe->avdd);
1286 poweroff1v8:
1287 	usleep_range(5000, 7000);
1288 	regulator_disable(boe->pp1800);
1289 	gpiod_set_value(boe->enable_gpio, 0);
1290 
1291 	return ret;
1292 }
1293 
1294 static int boe_panel_enable(struct drm_panel *panel)
1295 {
1296 	msleep(130);
1297 	return 0;
1298 }
1299 
1300 static const struct drm_display_mode boe_tv110c9m_default_mode = {
1301 	.clock = 166594,
1302 	.hdisplay = 1200,
1303 	.hsync_start = 1200 + 40,
1304 	.hsync_end = 1200 + 40 + 8,
1305 	.htotal = 1200 + 40 + 8 + 28,
1306 	.vdisplay = 2000,
1307 	.vsync_start = 2000 + 26,
1308 	.vsync_end = 2000 + 26 + 2,
1309 	.vtotal = 2000 + 26 + 2 + 148,
1310 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1311 };
1312 
1313 static const struct panel_desc boe_tv110c9m_desc = {
1314 	.modes = &boe_tv110c9m_default_mode,
1315 	.bpc = 8,
1316 	.size = {
1317 		.width_mm = 143,
1318 		.height_mm = 238,
1319 	},
1320 	.lanes = 4,
1321 	.format = MIPI_DSI_FMT_RGB888,
1322 	.mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1323 			| MIPI_DSI_MODE_VIDEO_HSE
1324 			| MIPI_DSI_CLOCK_NON_CONTINUOUS
1325 			| MIPI_DSI_MODE_VIDEO_BURST,
1326 	.init_cmds = boe_tv110c9m_init_cmd,
1327 };
1328 
1329 static const struct drm_display_mode inx_hj110iz_default_mode = {
1330 	.clock = 166594,
1331 	.hdisplay = 1200,
1332 	.hsync_start = 1200 + 40,
1333 	.hsync_end = 1200 + 40 + 8,
1334 	.htotal = 1200 + 40 + 8 + 28,
1335 	.vdisplay = 2000,
1336 	.vsync_start = 2000 + 26,
1337 	.vsync_end = 2000 + 26 + 1,
1338 	.vtotal = 2000 + 26 + 1 + 149,
1339 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1340 };
1341 
1342 static const struct panel_desc inx_hj110iz_desc = {
1343 	.modes = &inx_hj110iz_default_mode,
1344 	.bpc = 8,
1345 	.size = {
1346 		.width_mm = 143,
1347 		.height_mm = 238,
1348 	},
1349 	.lanes = 4,
1350 	.format = MIPI_DSI_FMT_RGB888,
1351 	.mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1352 			| MIPI_DSI_MODE_VIDEO_HSE
1353 			| MIPI_DSI_CLOCK_NON_CONTINUOUS
1354 			| MIPI_DSI_MODE_VIDEO_BURST,
1355 	.init_cmds = inx_hj110iz_init_cmd,
1356 };
1357 
1358 static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
1359 	.clock = 159425,
1360 	.hdisplay = 1200,
1361 	.hsync_start = 1200 + 100,
1362 	.hsync_end = 1200 + 100 + 40,
1363 	.htotal = 1200 + 100 + 40 + 24,
1364 	.vdisplay = 1920,
1365 	.vsync_start = 1920 + 10,
1366 	.vsync_end = 1920 + 10 + 14,
1367 	.vtotal = 1920 + 10 + 14 + 4,
1368 };
1369 
1370 static const struct panel_desc boe_tv101wum_nl6_desc = {
1371 	.modes = &boe_tv101wum_nl6_default_mode,
1372 	.bpc = 8,
1373 	.size = {
1374 		.width_mm = 135,
1375 		.height_mm = 216,
1376 	},
1377 	.lanes = 4,
1378 	.format = MIPI_DSI_FMT_RGB888,
1379 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1380 		      MIPI_DSI_MODE_LPM,
1381 	.init_cmds = boe_init_cmd,
1382 	.discharge_on_disable = false,
1383 };
1384 
1385 static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
1386 	.clock = 157000,
1387 	.hdisplay = 1200,
1388 	.hsync_start = 1200 + 60,
1389 	.hsync_end = 1200 + 60 + 24,
1390 	.htotal = 1200 + 60 + 24 + 56,
1391 	.vdisplay = 1920,
1392 	.vsync_start = 1920 + 16,
1393 	.vsync_end = 1920 + 16 + 4,
1394 	.vtotal = 1920 + 16 + 4 + 16,
1395 };
1396 
1397 static const struct panel_desc auo_kd101n80_45na_desc = {
1398 	.modes = &auo_kd101n80_45na_default_mode,
1399 	.bpc = 8,
1400 	.size = {
1401 		.width_mm = 135,
1402 		.height_mm = 216,
1403 	},
1404 	.lanes = 4,
1405 	.format = MIPI_DSI_FMT_RGB888,
1406 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1407 		      MIPI_DSI_MODE_LPM,
1408 	.init_cmds = auo_kd101n80_45na_init_cmd,
1409 	.discharge_on_disable = true,
1410 };
1411 
1412 static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
1413 	.clock = 159916,
1414 	.hdisplay = 1200,
1415 	.hsync_start = 1200 + 80,
1416 	.hsync_end = 1200 + 80 + 24,
1417 	.htotal = 1200 + 80 + 24 + 60,
1418 	.vdisplay = 1920,
1419 	.vsync_start = 1920 + 20,
1420 	.vsync_end = 1920 + 20 + 4,
1421 	.vtotal = 1920 + 20 + 4 + 10,
1422 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1423 };
1424 
1425 static const struct panel_desc boe_tv101wum_n53_desc = {
1426 	.modes = &boe_tv101wum_n53_default_mode,
1427 	.bpc = 8,
1428 	.size = {
1429 		.width_mm = 135,
1430 		.height_mm = 216,
1431 	},
1432 	.lanes = 4,
1433 	.format = MIPI_DSI_FMT_RGB888,
1434 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1435 		      MIPI_DSI_MODE_LPM,
1436 	.init_cmds = boe_init_cmd,
1437 };
1438 
1439 static const struct drm_display_mode auo_b101uan08_3_default_mode = {
1440 	.clock = 159667,
1441 	.hdisplay = 1200,
1442 	.hsync_start = 1200 + 60,
1443 	.hsync_end = 1200 + 60 + 4,
1444 	.htotal = 1200 + 60 + 4 + 80,
1445 	.vdisplay = 1920,
1446 	.vsync_start = 1920 + 34,
1447 	.vsync_end = 1920 + 34 + 2,
1448 	.vtotal = 1920 + 34 + 2 + 24,
1449 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1450 };
1451 
1452 static const struct panel_desc auo_b101uan08_3_desc = {
1453 	.modes = &auo_b101uan08_3_default_mode,
1454 	.bpc = 8,
1455 	.size = {
1456 		.width_mm = 135,
1457 		.height_mm = 216,
1458 	},
1459 	.lanes = 4,
1460 	.format = MIPI_DSI_FMT_RGB888,
1461 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1462 		      MIPI_DSI_MODE_LPM,
1463 	.init_cmds = auo_b101uan08_3_init_cmd,
1464 };
1465 
1466 static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
1467 	.clock = 159916,
1468 	.hdisplay = 1200,
1469 	.hsync_start = 1200 + 80,
1470 	.hsync_end = 1200 + 80 + 24,
1471 	.htotal = 1200 + 80 + 24 + 60,
1472 	.vdisplay = 1920,
1473 	.vsync_start = 1920 + 20,
1474 	.vsync_end = 1920 + 20 + 4,
1475 	.vtotal = 1920 + 20 + 4 + 10,
1476 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1477 };
1478 
1479 static const struct panel_desc boe_tv105wum_nw0_desc = {
1480 	.modes = &boe_tv105wum_nw0_default_mode,
1481 	.bpc = 8,
1482 	.size = {
1483 		.width_mm = 141,
1484 		.height_mm = 226,
1485 	},
1486 	.lanes = 4,
1487 	.format = MIPI_DSI_FMT_RGB888,
1488 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1489 		      MIPI_DSI_MODE_LPM,
1490 	.init_cmds = boe_init_cmd,
1491 };
1492 
1493 static int boe_panel_get_modes(struct drm_panel *panel,
1494 			       struct drm_connector *connector)
1495 {
1496 	struct boe_panel *boe = to_boe_panel(panel);
1497 	const struct drm_display_mode *m = boe->desc->modes;
1498 	struct drm_display_mode *mode;
1499 
1500 	mode = drm_mode_duplicate(connector->dev, m);
1501 	if (!mode) {
1502 		dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
1503 			m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
1504 		return -ENOMEM;
1505 	}
1506 
1507 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1508 	drm_mode_set_name(mode);
1509 	drm_mode_probed_add(connector, mode);
1510 
1511 	connector->display_info.width_mm = boe->desc->size.width_mm;
1512 	connector->display_info.height_mm = boe->desc->size.height_mm;
1513 	connector->display_info.bpc = boe->desc->bpc;
1514 	/*
1515 	 * TODO: Remove once all drm drivers call
1516 	 * drm_connector_set_orientation_from_panel()
1517 	 */
1518 	drm_connector_set_panel_orientation(connector, boe->orientation);
1519 
1520 	return 1;
1521 }
1522 
1523 static enum drm_panel_orientation boe_panel_get_orientation(struct drm_panel *panel)
1524 {
1525 	struct boe_panel *boe = to_boe_panel(panel);
1526 
1527 	return boe->orientation;
1528 }
1529 
1530 static const struct drm_panel_funcs boe_panel_funcs = {
1531 	.unprepare = boe_panel_unprepare,
1532 	.prepare = boe_panel_prepare,
1533 	.enable = boe_panel_enable,
1534 	.get_modes = boe_panel_get_modes,
1535 	.get_orientation = boe_panel_get_orientation,
1536 };
1537 
1538 static int boe_panel_add(struct boe_panel *boe)
1539 {
1540 	struct device *dev = &boe->dsi->dev;
1541 	int err;
1542 
1543 	boe->avdd = devm_regulator_get(dev, "avdd");
1544 	if (IS_ERR(boe->avdd))
1545 		return PTR_ERR(boe->avdd);
1546 
1547 	boe->avee = devm_regulator_get(dev, "avee");
1548 	if (IS_ERR(boe->avee))
1549 		return PTR_ERR(boe->avee);
1550 
1551 	boe->pp3300 = devm_regulator_get(dev, "pp3300");
1552 	if (IS_ERR(boe->pp3300))
1553 		return PTR_ERR(boe->pp3300);
1554 
1555 	boe->pp1800 = devm_regulator_get(dev, "pp1800");
1556 	if (IS_ERR(boe->pp1800))
1557 		return PTR_ERR(boe->pp1800);
1558 
1559 	boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
1560 	if (IS_ERR(boe->enable_gpio)) {
1561 		dev_err(dev, "cannot get reset-gpios %ld\n",
1562 			PTR_ERR(boe->enable_gpio));
1563 		return PTR_ERR(boe->enable_gpio);
1564 	}
1565 
1566 	gpiod_set_value(boe->enable_gpio, 0);
1567 
1568 	drm_panel_init(&boe->base, dev, &boe_panel_funcs,
1569 		       DRM_MODE_CONNECTOR_DSI);
1570 	err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation);
1571 	if (err < 0) {
1572 		dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
1573 		return err;
1574 	}
1575 
1576 	err = drm_panel_of_backlight(&boe->base);
1577 	if (err)
1578 		return err;
1579 
1580 	boe->base.funcs = &boe_panel_funcs;
1581 	boe->base.dev = &boe->dsi->dev;
1582 
1583 	drm_panel_add(&boe->base);
1584 
1585 	return 0;
1586 }
1587 
1588 static int boe_panel_probe(struct mipi_dsi_device *dsi)
1589 {
1590 	struct boe_panel *boe;
1591 	int ret;
1592 	const struct panel_desc *desc;
1593 
1594 	boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL);
1595 	if (!boe)
1596 		return -ENOMEM;
1597 
1598 	desc = of_device_get_match_data(&dsi->dev);
1599 	dsi->lanes = desc->lanes;
1600 	dsi->format = desc->format;
1601 	dsi->mode_flags = desc->mode_flags;
1602 	boe->desc = desc;
1603 	boe->dsi = dsi;
1604 	ret = boe_panel_add(boe);
1605 	if (ret < 0)
1606 		return ret;
1607 
1608 	mipi_dsi_set_drvdata(dsi, boe);
1609 
1610 	ret = mipi_dsi_attach(dsi);
1611 	if (ret)
1612 		drm_panel_remove(&boe->base);
1613 
1614 	return ret;
1615 }
1616 
1617 static void boe_panel_shutdown(struct mipi_dsi_device *dsi)
1618 {
1619 	struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
1620 
1621 	drm_panel_disable(&boe->base);
1622 	drm_panel_unprepare(&boe->base);
1623 }
1624 
1625 static void boe_panel_remove(struct mipi_dsi_device *dsi)
1626 {
1627 	struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
1628 	int ret;
1629 
1630 	boe_panel_shutdown(dsi);
1631 
1632 	ret = mipi_dsi_detach(dsi);
1633 	if (ret < 0)
1634 		dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
1635 
1636 	if (boe->base.dev)
1637 		drm_panel_remove(&boe->base);
1638 }
1639 
1640 static const struct of_device_id boe_of_match[] = {
1641 	{ .compatible = "boe,tv101wum-nl6",
1642 	  .data = &boe_tv101wum_nl6_desc
1643 	},
1644 	{ .compatible = "auo,kd101n80-45na",
1645 	  .data = &auo_kd101n80_45na_desc
1646 	},
1647 	{ .compatible = "boe,tv101wum-n53",
1648 	  .data = &boe_tv101wum_n53_desc
1649 	},
1650 	{ .compatible = "auo,b101uan08.3",
1651 	  .data = &auo_b101uan08_3_desc
1652 	},
1653 	{ .compatible = "boe,tv105wum-nw0",
1654 	  .data = &boe_tv105wum_nw0_desc
1655 	},
1656 	{ .compatible = "boe,tv110c9m-ll3",
1657 	  .data = &boe_tv110c9m_desc
1658 	},
1659 	{ .compatible = "innolux,hj110iz-01a",
1660 	  .data = &inx_hj110iz_desc
1661 	},
1662 	{ /* sentinel */ }
1663 };
1664 MODULE_DEVICE_TABLE(of, boe_of_match);
1665 
1666 static struct mipi_dsi_driver boe_panel_driver = {
1667 	.driver = {
1668 		.name = "panel-boe-tv101wum-nl6",
1669 		.of_match_table = boe_of_match,
1670 	},
1671 	.probe = boe_panel_probe,
1672 	.remove = boe_panel_remove,
1673 	.shutdown = boe_panel_shutdown,
1674 };
1675 module_mipi_dsi_driver(boe_panel_driver);
1676 
1677 MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>");
1678 MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver");
1679 MODULE_LICENSE("GPL v2");
1680