xref: /openbmc/linux/drivers/gpu/drm/omapdrm/omap_drv.c (revision bbecb07f)
1 /*
2  * drivers/gpu/drm/omapdrm/omap_drv.c
3  *
4  * Copyright (C) 2011 Texas Instruments
5  * Author: Rob Clark <rob@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include <linux/sys_soc.h>
21 
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
26 
27 #include "omap_dmm_tiler.h"
28 #include "omap_drv.h"
29 
30 #define DRIVER_NAME		MODULE_NAME
31 #define DRIVER_DESC		"OMAP DRM"
32 #define DRIVER_DATE		"20110917"
33 #define DRIVER_MAJOR		1
34 #define DRIVER_MINOR		0
35 #define DRIVER_PATCHLEVEL	0
36 
37 /*
38  * mode config funcs
39  */
40 
41 /* Notes about mapping DSS and DRM entities:
42  *    CRTC:        overlay
43  *    encoder:     manager.. with some extension to allow one primary CRTC
44  *                 and zero or more video CRTC's to be mapped to one encoder?
45  *    connector:   dssdev.. manager can be attached/detached from different
46  *                 devices
47  */
48 
49 static void omap_fb_output_poll_changed(struct drm_device *dev)
50 {
51 	struct omap_drm_private *priv = dev->dev_private;
52 	DBG("dev=%p", dev);
53 	if (priv->fbdev)
54 		drm_fb_helper_hotplug_event(priv->fbdev);
55 }
56 
57 static void omap_atomic_wait_for_completion(struct drm_device *dev,
58 					    struct drm_atomic_state *old_state)
59 {
60 	struct drm_crtc_state *new_crtc_state;
61 	struct drm_crtc *crtc;
62 	unsigned int i;
63 	int ret;
64 
65 	for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
66 		if (!new_crtc_state->active)
67 			continue;
68 
69 		ret = omap_crtc_wait_pending(crtc);
70 
71 		if (!ret)
72 			dev_warn(dev->dev,
73 				 "atomic complete timeout (pipe %u)!\n", i);
74 	}
75 }
76 
77 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
78 {
79 	struct drm_device *dev = old_state->dev;
80 	struct omap_drm_private *priv = dev->dev_private;
81 
82 	priv->dispc_ops->runtime_get();
83 
84 	/* Apply the atomic update. */
85 	drm_atomic_helper_commit_modeset_disables(dev, old_state);
86 
87 	if (priv->omaprev != 0x3430) {
88 		/* With the current dss dispc implementation we have to enable
89 		 * the new modeset before we can commit planes. The dispc ovl
90 		 * configuration relies on the video mode configuration been
91 		 * written into the HW when the ovl configuration is
92 		 * calculated.
93 		 *
94 		 * This approach is not ideal because after a mode change the
95 		 * plane update is executed only after the first vblank
96 		 * interrupt. The dispc implementation should be fixed so that
97 		 * it is able use uncommitted drm state information.
98 		 */
99 		drm_atomic_helper_commit_modeset_enables(dev, old_state);
100 		omap_atomic_wait_for_completion(dev, old_state);
101 
102 		drm_atomic_helper_commit_planes(dev, old_state, 0);
103 
104 		drm_atomic_helper_commit_hw_done(old_state);
105 	} else {
106 		/*
107 		 * OMAP3 DSS seems to have issues with the work-around above,
108 		 * resulting in endless sync losts if a crtc is enabled without
109 		 * a plane. For now, skip the WA for OMAP3.
110 		 */
111 		drm_atomic_helper_commit_planes(dev, old_state, 0);
112 
113 		drm_atomic_helper_commit_modeset_enables(dev, old_state);
114 
115 		drm_atomic_helper_commit_hw_done(old_state);
116 	}
117 
118 	/*
119 	 * Wait for completion of the page flips to ensure that old buffers
120 	 * can't be touched by the hardware anymore before cleaning up planes.
121 	 */
122 	omap_atomic_wait_for_completion(dev, old_state);
123 
124 	drm_atomic_helper_cleanup_planes(dev, old_state);
125 
126 	priv->dispc_ops->runtime_put();
127 }
128 
129 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
130 	.atomic_commit_tail = omap_atomic_commit_tail,
131 };
132 
133 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
134 	.fb_create = omap_framebuffer_create,
135 	.output_poll_changed = omap_fb_output_poll_changed,
136 	.atomic_check = drm_atomic_helper_check,
137 	.atomic_commit = drm_atomic_helper_commit,
138 };
139 
140 static int get_connector_type(struct omap_dss_device *dssdev)
141 {
142 	switch (dssdev->type) {
143 	case OMAP_DISPLAY_TYPE_HDMI:
144 		return DRM_MODE_CONNECTOR_HDMIA;
145 	case OMAP_DISPLAY_TYPE_DVI:
146 		return DRM_MODE_CONNECTOR_DVID;
147 	case OMAP_DISPLAY_TYPE_DSI:
148 		return DRM_MODE_CONNECTOR_DSI;
149 	case OMAP_DISPLAY_TYPE_DPI:
150 	case OMAP_DISPLAY_TYPE_DBI:
151 		return DRM_MODE_CONNECTOR_DPI;
152 	case OMAP_DISPLAY_TYPE_VENC:
153 		/* TODO: This could also be composite */
154 		return DRM_MODE_CONNECTOR_SVIDEO;
155 	case OMAP_DISPLAY_TYPE_SDI:
156 		return DRM_MODE_CONNECTOR_LVDS;
157 	default:
158 		return DRM_MODE_CONNECTOR_Unknown;
159 	}
160 }
161 
162 static void omap_disconnect_dssdevs(void)
163 {
164 	struct omap_dss_device *dssdev = NULL;
165 
166 	for_each_dss_dev(dssdev)
167 		dssdev->driver->disconnect(dssdev);
168 }
169 
170 static int omap_connect_dssdevs(void)
171 {
172 	int r;
173 	struct omap_dss_device *dssdev = NULL;
174 
175 	if (!omapdss_stack_is_ready())
176 		return -EPROBE_DEFER;
177 
178 	for_each_dss_dev(dssdev) {
179 		r = dssdev->driver->connect(dssdev);
180 		if (r == -EPROBE_DEFER) {
181 			omap_dss_put_device(dssdev);
182 			goto cleanup;
183 		} else if (r) {
184 			dev_warn(dssdev->dev, "could not connect display: %s\n",
185 				dssdev->name);
186 		}
187 	}
188 
189 	return 0;
190 
191 cleanup:
192 	/*
193 	 * if we are deferring probe, we disconnect the devices we previously
194 	 * connected
195 	 */
196 	omap_disconnect_dssdevs();
197 
198 	return r;
199 }
200 
201 static int omap_modeset_init_properties(struct drm_device *dev)
202 {
203 	struct omap_drm_private *priv = dev->dev_private;
204 	unsigned int num_planes = priv->dispc_ops->get_num_ovls();
205 
206 	priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
207 						      num_planes - 1);
208 	if (!priv->zorder_prop)
209 		return -ENOMEM;
210 
211 	return 0;
212 }
213 
214 static int omap_modeset_init(struct drm_device *dev)
215 {
216 	struct omap_drm_private *priv = dev->dev_private;
217 	struct omap_dss_device *dssdev = NULL;
218 	int num_ovls = priv->dispc_ops->get_num_ovls();
219 	int num_mgrs = priv->dispc_ops->get_num_mgrs();
220 	int num_crtcs, crtc_idx, plane_idx;
221 	int ret;
222 	u32 plane_crtc_mask;
223 
224 	drm_mode_config_init(dev);
225 
226 	ret = omap_modeset_init_properties(dev);
227 	if (ret < 0)
228 		return ret;
229 
230 	/*
231 	 * This function creates exactly one connector, encoder, crtc,
232 	 * and primary plane per each connected dss-device. Each
233 	 * connector->encoder->crtc chain is expected to be separate
234 	 * and each crtc is connect to a single dss-channel. If the
235 	 * configuration does not match the expectations or exceeds
236 	 * the available resources, the configuration is rejected.
237 	 */
238 	num_crtcs = 0;
239 	for_each_dss_dev(dssdev)
240 		if (omapdss_device_is_connected(dssdev))
241 			num_crtcs++;
242 
243 	if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
244 	    num_crtcs > ARRAY_SIZE(priv->crtcs) ||
245 	    num_crtcs > ARRAY_SIZE(priv->planes) ||
246 	    num_crtcs > ARRAY_SIZE(priv->encoders) ||
247 	    num_crtcs > ARRAY_SIZE(priv->connectors)) {
248 		dev_err(dev->dev, "%s(): Too many connected displays\n",
249 			__func__);
250 		return -EINVAL;
251 	}
252 
253 	/* All planes can be put to any CRTC */
254 	plane_crtc_mask = (1 << num_crtcs) - 1;
255 
256 	dssdev = NULL;
257 
258 	crtc_idx = 0;
259 	plane_idx = 0;
260 	for_each_dss_dev(dssdev) {
261 		struct drm_connector *connector;
262 		struct drm_encoder *encoder;
263 		struct drm_plane *plane;
264 		struct drm_crtc *crtc;
265 
266 		if (!omapdss_device_is_connected(dssdev))
267 			continue;
268 
269 		encoder = omap_encoder_init(dev, dssdev);
270 		if (!encoder)
271 			return -ENOMEM;
272 
273 		connector = omap_connector_init(dev,
274 				get_connector_type(dssdev), dssdev, encoder);
275 		if (!connector)
276 			return -ENOMEM;
277 
278 		plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_PRIMARY,
279 					plane_crtc_mask);
280 		if (IS_ERR(plane))
281 			return PTR_ERR(plane);
282 
283 		crtc = omap_crtc_init(dev, plane, dssdev);
284 		if (IS_ERR(crtc))
285 			return PTR_ERR(crtc);
286 
287 		drm_mode_connector_attach_encoder(connector, encoder);
288 		encoder->possible_crtcs = (1 << crtc_idx);
289 
290 		priv->crtcs[priv->num_crtcs++] = crtc;
291 		priv->planes[priv->num_planes++] = plane;
292 		priv->encoders[priv->num_encoders++] = encoder;
293 		priv->connectors[priv->num_connectors++] = connector;
294 
295 		plane_idx++;
296 		crtc_idx++;
297 	}
298 
299 	/*
300 	 * Create normal planes for the remaining overlays:
301 	 */
302 	for (; plane_idx < num_ovls; plane_idx++) {
303 		struct drm_plane *plane;
304 
305 		if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
306 			return -EINVAL;
307 
308 		plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_OVERLAY,
309 			plane_crtc_mask);
310 		if (IS_ERR(plane))
311 			return PTR_ERR(plane);
312 
313 		priv->planes[priv->num_planes++] = plane;
314 	}
315 
316 	DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
317 		priv->num_planes, priv->num_crtcs, priv->num_encoders,
318 		priv->num_connectors);
319 
320 	dev->mode_config.min_width = 8;
321 	dev->mode_config.min_height = 2;
322 
323 	/* note: eventually will need some cpu_is_omapXYZ() type stuff here
324 	 * to fill in these limits properly on different OMAP generations..
325 	 */
326 	dev->mode_config.max_width = 2048;
327 	dev->mode_config.max_height = 2048;
328 
329 	dev->mode_config.funcs = &omap_mode_config_funcs;
330 	dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
331 
332 	drm_mode_config_reset(dev);
333 
334 	omap_drm_irq_install(dev);
335 
336 	return 0;
337 }
338 
339 /*
340  * Enable the HPD in external components if supported
341  */
342 static void omap_modeset_enable_external_hpd(void)
343 {
344 	struct omap_dss_device *dssdev = NULL;
345 
346 	for_each_dss_dev(dssdev) {
347 		if (dssdev->driver->enable_hpd)
348 			dssdev->driver->enable_hpd(dssdev);
349 	}
350 }
351 
352 /*
353  * Disable the HPD in external components if supported
354  */
355 static void omap_modeset_disable_external_hpd(void)
356 {
357 	struct omap_dss_device *dssdev = NULL;
358 
359 	for_each_dss_dev(dssdev) {
360 		if (dssdev->driver->disable_hpd)
361 			dssdev->driver->disable_hpd(dssdev);
362 	}
363 }
364 
365 /*
366  * drm ioctl funcs
367  */
368 
369 
370 static int ioctl_get_param(struct drm_device *dev, void *data,
371 		struct drm_file *file_priv)
372 {
373 	struct omap_drm_private *priv = dev->dev_private;
374 	struct drm_omap_param *args = data;
375 
376 	DBG("%p: param=%llu", dev, args->param);
377 
378 	switch (args->param) {
379 	case OMAP_PARAM_CHIPSET_ID:
380 		args->value = priv->omaprev;
381 		break;
382 	default:
383 		DBG("unknown parameter %lld", args->param);
384 		return -EINVAL;
385 	}
386 
387 	return 0;
388 }
389 
390 static int ioctl_set_param(struct drm_device *dev, void *data,
391 		struct drm_file *file_priv)
392 {
393 	struct drm_omap_param *args = data;
394 
395 	switch (args->param) {
396 	default:
397 		DBG("unknown parameter %lld", args->param);
398 		return -EINVAL;
399 	}
400 
401 	return 0;
402 }
403 
404 #define OMAP_BO_USER_MASK	0x00ffffff	/* flags settable by userspace */
405 
406 static int ioctl_gem_new(struct drm_device *dev, void *data,
407 		struct drm_file *file_priv)
408 {
409 	struct drm_omap_gem_new *args = data;
410 	u32 flags = args->flags & OMAP_BO_USER_MASK;
411 
412 	VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
413 	     args->size.bytes, flags);
414 
415 	return omap_gem_new_handle(dev, file_priv, args->size, flags,
416 				   &args->handle);
417 }
418 
419 static int ioctl_gem_info(struct drm_device *dev, void *data,
420 		struct drm_file *file_priv)
421 {
422 	struct drm_omap_gem_info *args = data;
423 	struct drm_gem_object *obj;
424 	int ret = 0;
425 
426 	VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
427 
428 	obj = drm_gem_object_lookup(file_priv, args->handle);
429 	if (!obj)
430 		return -ENOENT;
431 
432 	args->size = omap_gem_mmap_size(obj);
433 	args->offset = omap_gem_mmap_offset(obj);
434 
435 	drm_gem_object_unreference_unlocked(obj);
436 
437 	return ret;
438 }
439 
440 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
441 	DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
442 			  DRM_AUTH | DRM_RENDER_ALLOW),
443 	DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
444 			  DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
445 	DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
446 			  DRM_AUTH | DRM_RENDER_ALLOW),
447 	/* Deprecated, to be removed. */
448 	DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
449 			  DRM_AUTH | DRM_RENDER_ALLOW),
450 	/* Deprecated, to be removed. */
451 	DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
452 			  DRM_AUTH | DRM_RENDER_ALLOW),
453 	DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
454 			  DRM_AUTH | DRM_RENDER_ALLOW),
455 };
456 
457 /*
458  * drm driver funcs
459  */
460 
461 static int dev_open(struct drm_device *dev, struct drm_file *file)
462 {
463 	file->driver_priv = NULL;
464 
465 	DBG("open: dev=%p, file=%p", dev, file);
466 
467 	return 0;
468 }
469 
470 /**
471  * lastclose - clean up after all DRM clients have exited
472  * @dev: DRM device
473  *
474  * Take care of cleaning up after all DRM clients have exited.  In the
475  * mode setting case, we want to restore the kernel's initial mode (just
476  * in case the last client left us in a bad state).
477  */
478 static void dev_lastclose(struct drm_device *dev)
479 {
480 	struct omap_drm_private *priv = dev->dev_private;
481 	int ret;
482 
483 	DBG("lastclose: dev=%p", dev);
484 
485 	if (priv->fbdev) {
486 		ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
487 		if (ret)
488 			DBG("failed to restore crtc mode");
489 	}
490 }
491 
492 static const struct vm_operations_struct omap_gem_vm_ops = {
493 	.fault = omap_gem_fault,
494 	.open = drm_gem_vm_open,
495 	.close = drm_gem_vm_close,
496 };
497 
498 static const struct file_operations omapdriver_fops = {
499 	.owner = THIS_MODULE,
500 	.open = drm_open,
501 	.unlocked_ioctl = drm_ioctl,
502 	.compat_ioctl = drm_compat_ioctl,
503 	.release = drm_release,
504 	.mmap = omap_gem_mmap,
505 	.poll = drm_poll,
506 	.read = drm_read,
507 	.llseek = noop_llseek,
508 };
509 
510 static struct drm_driver omap_drm_driver = {
511 	.driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
512 		DRIVER_ATOMIC | DRIVER_RENDER,
513 	.open = dev_open,
514 	.lastclose = dev_lastclose,
515 #ifdef CONFIG_DEBUG_FS
516 	.debugfs_init = omap_debugfs_init,
517 #endif
518 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
519 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
520 	.gem_prime_export = omap_gem_prime_export,
521 	.gem_prime_import = omap_gem_prime_import,
522 	.gem_free_object = omap_gem_free_object,
523 	.gem_vm_ops = &omap_gem_vm_ops,
524 	.dumb_create = omap_gem_dumb_create,
525 	.dumb_map_offset = omap_gem_dumb_map_offset,
526 	.ioctls = ioctls,
527 	.num_ioctls = DRM_OMAP_NUM_IOCTLS,
528 	.fops = &omapdriver_fops,
529 	.name = DRIVER_NAME,
530 	.desc = DRIVER_DESC,
531 	.date = DRIVER_DATE,
532 	.major = DRIVER_MAJOR,
533 	.minor = DRIVER_MINOR,
534 	.patchlevel = DRIVER_PATCHLEVEL,
535 };
536 
537 static const struct soc_device_attribute omapdrm_soc_devices[] = {
538 	{ .family = "OMAP3", .data = (void *)0x3430 },
539 	{ .family = "OMAP4", .data = (void *)0x4430 },
540 	{ .family = "OMAP5", .data = (void *)0x5430 },
541 	{ .family = "DRA7",  .data = (void *)0x0752 },
542 	{ /* sentinel */ }
543 };
544 
545 static int pdev_probe(struct platform_device *pdev)
546 {
547 	const struct soc_device_attribute *soc;
548 	struct omap_drm_private *priv;
549 	struct drm_device *ddev;
550 	unsigned int i;
551 	int ret;
552 
553 	DBG("%s", pdev->name);
554 
555 	if (omapdss_is_initialized() == false)
556 		return -EPROBE_DEFER;
557 
558 	ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
559 	if (ret) {
560 		dev_err(&pdev->dev, "Failed to set the DMA mask\n");
561 		return ret;
562 	}
563 
564 	omap_crtc_pre_init();
565 
566 	ret = omap_connect_dssdevs();
567 	if (ret)
568 		goto err_crtc_uninit;
569 
570 	/* Allocate and initialize the driver private structure. */
571 	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
572 	if (!priv) {
573 		ret = -ENOMEM;
574 		goto err_disconnect_dssdevs;
575 	}
576 
577 	priv->dispc_ops = dispc_get_ops();
578 
579 	soc = soc_device_match(omapdrm_soc_devices);
580 	priv->omaprev = soc ? (unsigned int)soc->data : 0;
581 	priv->wq = alloc_ordered_workqueue("omapdrm", 0);
582 
583 	spin_lock_init(&priv->list_lock);
584 	INIT_LIST_HEAD(&priv->obj_list);
585 
586 	/* Allocate and initialize the DRM device. */
587 	ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
588 	if (IS_ERR(ddev)) {
589 		ret = PTR_ERR(ddev);
590 		goto err_free_priv;
591 	}
592 
593 	ddev->dev_private = priv;
594 	platform_set_drvdata(pdev, ddev);
595 
596 	omap_gem_init(ddev);
597 
598 	ret = omap_modeset_init(ddev);
599 	if (ret) {
600 		dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
601 		goto err_free_drm_dev;
602 	}
603 
604 	/* Initialize vblank handling, start with all CRTCs disabled. */
605 	ret = drm_vblank_init(ddev, priv->num_crtcs);
606 	if (ret) {
607 		dev_err(&pdev->dev, "could not init vblank\n");
608 		goto err_cleanup_modeset;
609 	}
610 
611 	for (i = 0; i < priv->num_crtcs; i++)
612 		drm_crtc_vblank_off(priv->crtcs[i]);
613 
614 	priv->fbdev = omap_fbdev_init(ddev);
615 
616 	drm_kms_helper_poll_init(ddev);
617 	omap_modeset_enable_external_hpd();
618 
619 	/*
620 	 * Register the DRM device with the core and the connectors with
621 	 * sysfs.
622 	 */
623 	ret = drm_dev_register(ddev, 0);
624 	if (ret)
625 		goto err_cleanup_helpers;
626 
627 	return 0;
628 
629 err_cleanup_helpers:
630 	omap_modeset_disable_external_hpd();
631 	drm_kms_helper_poll_fini(ddev);
632 	if (priv->fbdev)
633 		omap_fbdev_free(ddev);
634 err_cleanup_modeset:
635 	drm_mode_config_cleanup(ddev);
636 	omap_drm_irq_uninstall(ddev);
637 err_free_drm_dev:
638 	omap_gem_deinit(ddev);
639 	drm_dev_unref(ddev);
640 err_free_priv:
641 	destroy_workqueue(priv->wq);
642 	kfree(priv);
643 err_disconnect_dssdevs:
644 	omap_disconnect_dssdevs();
645 err_crtc_uninit:
646 	omap_crtc_pre_uninit();
647 	return ret;
648 }
649 
650 static int pdev_remove(struct platform_device *pdev)
651 {
652 	struct drm_device *ddev = platform_get_drvdata(pdev);
653 	struct omap_drm_private *priv = ddev->dev_private;
654 
655 	DBG("");
656 
657 	drm_dev_unregister(ddev);
658 
659 	omap_modeset_disable_external_hpd();
660 	drm_kms_helper_poll_fini(ddev);
661 
662 	if (priv->fbdev)
663 		omap_fbdev_free(ddev);
664 
665 	drm_atomic_helper_shutdown(ddev);
666 
667 	drm_mode_config_cleanup(ddev);
668 
669 	omap_drm_irq_uninstall(ddev);
670 	omap_gem_deinit(ddev);
671 
672 	drm_dev_unref(ddev);
673 
674 	destroy_workqueue(priv->wq);
675 	kfree(priv);
676 
677 	omap_disconnect_dssdevs();
678 	omap_crtc_pre_uninit();
679 
680 	return 0;
681 }
682 
683 #ifdef CONFIG_PM_SLEEP
684 static int omap_drm_suspend_all_displays(void)
685 {
686 	struct omap_dss_device *dssdev = NULL;
687 
688 	for_each_dss_dev(dssdev) {
689 		if (!dssdev->driver)
690 			continue;
691 
692 		if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
693 			dssdev->driver->disable(dssdev);
694 			dssdev->activate_after_resume = true;
695 		} else {
696 			dssdev->activate_after_resume = false;
697 		}
698 	}
699 
700 	return 0;
701 }
702 
703 static int omap_drm_resume_all_displays(void)
704 {
705 	struct omap_dss_device *dssdev = NULL;
706 
707 	for_each_dss_dev(dssdev) {
708 		if (!dssdev->driver)
709 			continue;
710 
711 		if (dssdev->activate_after_resume) {
712 			dssdev->driver->enable(dssdev);
713 			dssdev->activate_after_resume = false;
714 		}
715 	}
716 
717 	return 0;
718 }
719 
720 static int omap_drm_suspend(struct device *dev)
721 {
722 	struct drm_device *drm_dev = dev_get_drvdata(dev);
723 
724 	drm_kms_helper_poll_disable(drm_dev);
725 
726 	drm_modeset_lock_all(drm_dev);
727 	omap_drm_suspend_all_displays();
728 	drm_modeset_unlock_all(drm_dev);
729 
730 	return 0;
731 }
732 
733 static int omap_drm_resume(struct device *dev)
734 {
735 	struct drm_device *drm_dev = dev_get_drvdata(dev);
736 
737 	drm_modeset_lock_all(drm_dev);
738 	omap_drm_resume_all_displays();
739 	drm_modeset_unlock_all(drm_dev);
740 
741 	drm_kms_helper_poll_enable(drm_dev);
742 
743 	return omap_gem_resume(dev);
744 }
745 #endif
746 
747 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
748 
749 static struct platform_driver pdev = {
750 	.driver = {
751 		.name = "omapdrm",
752 		.pm = &omapdrm_pm_ops,
753 	},
754 	.probe = pdev_probe,
755 	.remove = pdev_remove,
756 };
757 
758 static struct platform_driver * const drivers[] = {
759 	&omap_dmm_driver,
760 	&pdev,
761 };
762 
763 static int __init omap_drm_init(void)
764 {
765 	DBG("init");
766 
767 	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
768 }
769 
770 static void __exit omap_drm_fini(void)
771 {
772 	DBG("fini");
773 
774 	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
775 }
776 
777 /* need late_initcall() so we load after dss_driver's are loaded */
778 late_initcall(omap_drm_init);
779 module_exit(omap_drm_fini);
780 
781 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
782 MODULE_DESCRIPTION("OMAP DRM Display Driver");
783 MODULE_ALIAS("platform:" DRIVER_NAME);
784 MODULE_LICENSE("GPL v2");
785