xref: /openbmc/linux/drivers/gpu/drm/omapdrm/omap_drv.c (revision a34a3ed7)
1 /*
2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3  * Author: Rob Clark <rob@ti.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #include <linux/sys_soc.h>
19 
20 #include <drm/drm_atomic.h>
21 #include <drm/drm_atomic_helper.h>
22 #include <drm/drm_crtc_helper.h>
23 #include <drm/drm_fb_helper.h>
24 
25 #include "omap_dmm_tiler.h"
26 #include "omap_drv.h"
27 
28 #define DRIVER_NAME		MODULE_NAME
29 #define DRIVER_DESC		"OMAP DRM"
30 #define DRIVER_DATE		"20110917"
31 #define DRIVER_MAJOR		1
32 #define DRIVER_MINOR		0
33 #define DRIVER_PATCHLEVEL	0
34 
35 /*
36  * mode config funcs
37  */
38 
39 /* Notes about mapping DSS and DRM entities:
40  *    CRTC:        overlay
41  *    encoder:     manager.. with some extension to allow one primary CRTC
42  *                 and zero or more video CRTC's to be mapped to one encoder?
43  *    connector:   dssdev.. manager can be attached/detached from different
44  *                 devices
45  */
46 
47 static void omap_atomic_wait_for_completion(struct drm_device *dev,
48 					    struct drm_atomic_state *old_state)
49 {
50 	struct drm_crtc_state *new_crtc_state;
51 	struct drm_crtc *crtc;
52 	unsigned int i;
53 	int ret;
54 
55 	for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
56 		if (!new_crtc_state->active)
57 			continue;
58 
59 		ret = omap_crtc_wait_pending(crtc);
60 
61 		if (!ret)
62 			dev_warn(dev->dev,
63 				 "atomic complete timeout (pipe %u)!\n", i);
64 	}
65 }
66 
67 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
68 {
69 	struct drm_device *dev = old_state->dev;
70 	struct omap_drm_private *priv = dev->dev_private;
71 
72 	priv->dispc_ops->runtime_get();
73 
74 	/* Apply the atomic update. */
75 	drm_atomic_helper_commit_modeset_disables(dev, old_state);
76 
77 	if (priv->omaprev != 0x3430) {
78 		/* With the current dss dispc implementation we have to enable
79 		 * the new modeset before we can commit planes. The dispc ovl
80 		 * configuration relies on the video mode configuration been
81 		 * written into the HW when the ovl configuration is
82 		 * calculated.
83 		 *
84 		 * This approach is not ideal because after a mode change the
85 		 * plane update is executed only after the first vblank
86 		 * interrupt. The dispc implementation should be fixed so that
87 		 * it is able use uncommitted drm state information.
88 		 */
89 		drm_atomic_helper_commit_modeset_enables(dev, old_state);
90 		omap_atomic_wait_for_completion(dev, old_state);
91 
92 		drm_atomic_helper_commit_planes(dev, old_state, 0);
93 
94 		drm_atomic_helper_commit_hw_done(old_state);
95 	} else {
96 		/*
97 		 * OMAP3 DSS seems to have issues with the work-around above,
98 		 * resulting in endless sync losts if a crtc is enabled without
99 		 * a plane. For now, skip the WA for OMAP3.
100 		 */
101 		drm_atomic_helper_commit_planes(dev, old_state, 0);
102 
103 		drm_atomic_helper_commit_modeset_enables(dev, old_state);
104 
105 		drm_atomic_helper_commit_hw_done(old_state);
106 	}
107 
108 	/*
109 	 * Wait for completion of the page flips to ensure that old buffers
110 	 * can't be touched by the hardware anymore before cleaning up planes.
111 	 */
112 	omap_atomic_wait_for_completion(dev, old_state);
113 
114 	drm_atomic_helper_cleanup_planes(dev, old_state);
115 
116 	priv->dispc_ops->runtime_put();
117 }
118 
119 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
120 	.atomic_commit_tail = omap_atomic_commit_tail,
121 };
122 
123 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
124 	.fb_create = omap_framebuffer_create,
125 	.output_poll_changed = drm_fb_helper_output_poll_changed,
126 	.atomic_check = drm_atomic_helper_check,
127 	.atomic_commit = drm_atomic_helper_commit,
128 };
129 
130 static int get_connector_type(struct omap_dss_device *dssdev)
131 {
132 	switch (dssdev->type) {
133 	case OMAP_DISPLAY_TYPE_HDMI:
134 		return DRM_MODE_CONNECTOR_HDMIA;
135 	case OMAP_DISPLAY_TYPE_DVI:
136 		return DRM_MODE_CONNECTOR_DVID;
137 	case OMAP_DISPLAY_TYPE_DSI:
138 		return DRM_MODE_CONNECTOR_DSI;
139 	case OMAP_DISPLAY_TYPE_DPI:
140 	case OMAP_DISPLAY_TYPE_DBI:
141 		return DRM_MODE_CONNECTOR_DPI;
142 	case OMAP_DISPLAY_TYPE_VENC:
143 		/* TODO: This could also be composite */
144 		return DRM_MODE_CONNECTOR_SVIDEO;
145 	case OMAP_DISPLAY_TYPE_SDI:
146 		return DRM_MODE_CONNECTOR_LVDS;
147 	default:
148 		return DRM_MODE_CONNECTOR_Unknown;
149 	}
150 }
151 
152 static void omap_disconnect_dssdevs(void)
153 {
154 	struct omap_dss_device *dssdev = NULL;
155 
156 	for_each_dss_dev(dssdev)
157 		dssdev->driver->disconnect(dssdev);
158 }
159 
160 static int omap_connect_dssdevs(void)
161 {
162 	int r;
163 	struct omap_dss_device *dssdev = NULL;
164 
165 	if (!omapdss_stack_is_ready())
166 		return -EPROBE_DEFER;
167 
168 	for_each_dss_dev(dssdev) {
169 		r = dssdev->driver->connect(dssdev);
170 		if (r == -EPROBE_DEFER) {
171 			omap_dss_put_device(dssdev);
172 			goto cleanup;
173 		} else if (r) {
174 			dev_warn(dssdev->dev, "could not connect display: %s\n",
175 				dssdev->name);
176 		}
177 	}
178 
179 	return 0;
180 
181 cleanup:
182 	/*
183 	 * if we are deferring probe, we disconnect the devices we previously
184 	 * connected
185 	 */
186 	omap_disconnect_dssdevs();
187 
188 	return r;
189 }
190 
191 static int omap_modeset_init_properties(struct drm_device *dev)
192 {
193 	struct omap_drm_private *priv = dev->dev_private;
194 	unsigned int num_planes = priv->dispc_ops->get_num_ovls();
195 
196 	priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
197 						      num_planes - 1);
198 	if (!priv->zorder_prop)
199 		return -ENOMEM;
200 
201 	return 0;
202 }
203 
204 static int omap_modeset_init(struct drm_device *dev)
205 {
206 	struct omap_drm_private *priv = dev->dev_private;
207 	struct omap_dss_device *dssdev = NULL;
208 	int num_ovls = priv->dispc_ops->get_num_ovls();
209 	int num_mgrs = priv->dispc_ops->get_num_mgrs();
210 	int num_crtcs, crtc_idx, plane_idx;
211 	int ret;
212 	u32 plane_crtc_mask;
213 
214 	drm_mode_config_init(dev);
215 
216 	ret = omap_modeset_init_properties(dev);
217 	if (ret < 0)
218 		return ret;
219 
220 	/*
221 	 * This function creates exactly one connector, encoder, crtc,
222 	 * and primary plane per each connected dss-device. Each
223 	 * connector->encoder->crtc chain is expected to be separate
224 	 * and each crtc is connect to a single dss-channel. If the
225 	 * configuration does not match the expectations or exceeds
226 	 * the available resources, the configuration is rejected.
227 	 */
228 	num_crtcs = 0;
229 	for_each_dss_dev(dssdev)
230 		if (omapdss_device_is_connected(dssdev))
231 			num_crtcs++;
232 
233 	if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
234 	    num_crtcs > ARRAY_SIZE(priv->crtcs) ||
235 	    num_crtcs > ARRAY_SIZE(priv->planes) ||
236 	    num_crtcs > ARRAY_SIZE(priv->encoders) ||
237 	    num_crtcs > ARRAY_SIZE(priv->connectors)) {
238 		dev_err(dev->dev, "%s(): Too many connected displays\n",
239 			__func__);
240 		return -EINVAL;
241 	}
242 
243 	/* All planes can be put to any CRTC */
244 	plane_crtc_mask = (1 << num_crtcs) - 1;
245 
246 	dssdev = NULL;
247 
248 	crtc_idx = 0;
249 	plane_idx = 0;
250 	for_each_dss_dev(dssdev) {
251 		struct drm_connector *connector;
252 		struct drm_encoder *encoder;
253 		struct drm_plane *plane;
254 		struct drm_crtc *crtc;
255 
256 		if (!omapdss_device_is_connected(dssdev))
257 			continue;
258 
259 		encoder = omap_encoder_init(dev, dssdev);
260 		if (!encoder)
261 			return -ENOMEM;
262 
263 		connector = omap_connector_init(dev,
264 				get_connector_type(dssdev), dssdev, encoder);
265 		if (!connector)
266 			return -ENOMEM;
267 
268 		plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_PRIMARY,
269 					plane_crtc_mask);
270 		if (IS_ERR(plane))
271 			return PTR_ERR(plane);
272 
273 		crtc = omap_crtc_init(dev, plane, dssdev);
274 		if (IS_ERR(crtc))
275 			return PTR_ERR(crtc);
276 
277 		drm_mode_connector_attach_encoder(connector, encoder);
278 		encoder->possible_crtcs = (1 << crtc_idx);
279 
280 		priv->crtcs[priv->num_crtcs++] = crtc;
281 		priv->planes[priv->num_planes++] = plane;
282 		priv->encoders[priv->num_encoders++] = encoder;
283 		priv->connectors[priv->num_connectors++] = connector;
284 
285 		plane_idx++;
286 		crtc_idx++;
287 	}
288 
289 	/*
290 	 * Create normal planes for the remaining overlays:
291 	 */
292 	for (; plane_idx < num_ovls; plane_idx++) {
293 		struct drm_plane *plane;
294 
295 		if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
296 			return -EINVAL;
297 
298 		plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_OVERLAY,
299 			plane_crtc_mask);
300 		if (IS_ERR(plane))
301 			return PTR_ERR(plane);
302 
303 		priv->planes[priv->num_planes++] = plane;
304 	}
305 
306 	DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
307 		priv->num_planes, priv->num_crtcs, priv->num_encoders,
308 		priv->num_connectors);
309 
310 	dev->mode_config.min_width = 8;
311 	dev->mode_config.min_height = 2;
312 
313 	/* note: eventually will need some cpu_is_omapXYZ() type stuff here
314 	 * to fill in these limits properly on different OMAP generations..
315 	 */
316 	dev->mode_config.max_width = 2048;
317 	dev->mode_config.max_height = 2048;
318 
319 	dev->mode_config.funcs = &omap_mode_config_funcs;
320 	dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
321 
322 	drm_mode_config_reset(dev);
323 
324 	omap_drm_irq_install(dev);
325 
326 	return 0;
327 }
328 
329 /*
330  * Enable the HPD in external components if supported
331  */
332 static void omap_modeset_enable_external_hpd(void)
333 {
334 	struct omap_dss_device *dssdev = NULL;
335 
336 	for_each_dss_dev(dssdev) {
337 		if (dssdev->driver->enable_hpd)
338 			dssdev->driver->enable_hpd(dssdev);
339 	}
340 }
341 
342 /*
343  * Disable the HPD in external components if supported
344  */
345 static void omap_modeset_disable_external_hpd(void)
346 {
347 	struct omap_dss_device *dssdev = NULL;
348 
349 	for_each_dss_dev(dssdev) {
350 		if (dssdev->driver->disable_hpd)
351 			dssdev->driver->disable_hpd(dssdev);
352 	}
353 }
354 
355 /*
356  * drm ioctl funcs
357  */
358 
359 
360 static int ioctl_get_param(struct drm_device *dev, void *data,
361 		struct drm_file *file_priv)
362 {
363 	struct omap_drm_private *priv = dev->dev_private;
364 	struct drm_omap_param *args = data;
365 
366 	DBG("%p: param=%llu", dev, args->param);
367 
368 	switch (args->param) {
369 	case OMAP_PARAM_CHIPSET_ID:
370 		args->value = priv->omaprev;
371 		break;
372 	default:
373 		DBG("unknown parameter %lld", args->param);
374 		return -EINVAL;
375 	}
376 
377 	return 0;
378 }
379 
380 static int ioctl_set_param(struct drm_device *dev, void *data,
381 		struct drm_file *file_priv)
382 {
383 	struct drm_omap_param *args = data;
384 
385 	switch (args->param) {
386 	default:
387 		DBG("unknown parameter %lld", args->param);
388 		return -EINVAL;
389 	}
390 
391 	return 0;
392 }
393 
394 #define OMAP_BO_USER_MASK	0x00ffffff	/* flags settable by userspace */
395 
396 static int ioctl_gem_new(struct drm_device *dev, void *data,
397 		struct drm_file *file_priv)
398 {
399 	struct drm_omap_gem_new *args = data;
400 	u32 flags = args->flags & OMAP_BO_USER_MASK;
401 
402 	VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
403 	     args->size.bytes, flags);
404 
405 	return omap_gem_new_handle(dev, file_priv, args->size, flags,
406 				   &args->handle);
407 }
408 
409 static int ioctl_gem_info(struct drm_device *dev, void *data,
410 		struct drm_file *file_priv)
411 {
412 	struct drm_omap_gem_info *args = data;
413 	struct drm_gem_object *obj;
414 	int ret = 0;
415 
416 	VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
417 
418 	obj = drm_gem_object_lookup(file_priv, args->handle);
419 	if (!obj)
420 		return -ENOENT;
421 
422 	args->size = omap_gem_mmap_size(obj);
423 	args->offset = omap_gem_mmap_offset(obj);
424 
425 	drm_gem_object_unreference_unlocked(obj);
426 
427 	return ret;
428 }
429 
430 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
431 	DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
432 			  DRM_AUTH | DRM_RENDER_ALLOW),
433 	DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
434 			  DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
435 	DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
436 			  DRM_AUTH | DRM_RENDER_ALLOW),
437 	/* Deprecated, to be removed. */
438 	DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
439 			  DRM_AUTH | DRM_RENDER_ALLOW),
440 	/* Deprecated, to be removed. */
441 	DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
442 			  DRM_AUTH | DRM_RENDER_ALLOW),
443 	DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
444 			  DRM_AUTH | DRM_RENDER_ALLOW),
445 };
446 
447 /*
448  * drm driver funcs
449  */
450 
451 static int dev_open(struct drm_device *dev, struct drm_file *file)
452 {
453 	file->driver_priv = NULL;
454 
455 	DBG("open: dev=%p, file=%p", dev, file);
456 
457 	return 0;
458 }
459 
460 static const struct vm_operations_struct omap_gem_vm_ops = {
461 	.fault = omap_gem_fault,
462 	.open = drm_gem_vm_open,
463 	.close = drm_gem_vm_close,
464 };
465 
466 static const struct file_operations omapdriver_fops = {
467 	.owner = THIS_MODULE,
468 	.open = drm_open,
469 	.unlocked_ioctl = drm_ioctl,
470 	.compat_ioctl = drm_compat_ioctl,
471 	.release = drm_release,
472 	.mmap = omap_gem_mmap,
473 	.poll = drm_poll,
474 	.read = drm_read,
475 	.llseek = noop_llseek,
476 };
477 
478 static struct drm_driver omap_drm_driver = {
479 	.driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
480 		DRIVER_ATOMIC | DRIVER_RENDER,
481 	.open = dev_open,
482 	.lastclose = drm_fb_helper_lastclose,
483 #ifdef CONFIG_DEBUG_FS
484 	.debugfs_init = omap_debugfs_init,
485 #endif
486 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
487 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
488 	.gem_prime_export = omap_gem_prime_export,
489 	.gem_prime_import = omap_gem_prime_import,
490 	.gem_free_object = omap_gem_free_object,
491 	.gem_vm_ops = &omap_gem_vm_ops,
492 	.dumb_create = omap_gem_dumb_create,
493 	.dumb_map_offset = omap_gem_dumb_map_offset,
494 	.ioctls = ioctls,
495 	.num_ioctls = DRM_OMAP_NUM_IOCTLS,
496 	.fops = &omapdriver_fops,
497 	.name = DRIVER_NAME,
498 	.desc = DRIVER_DESC,
499 	.date = DRIVER_DATE,
500 	.major = DRIVER_MAJOR,
501 	.minor = DRIVER_MINOR,
502 	.patchlevel = DRIVER_PATCHLEVEL,
503 };
504 
505 static const struct soc_device_attribute omapdrm_soc_devices[] = {
506 	{ .family = "OMAP3", .data = (void *)0x3430 },
507 	{ .family = "OMAP4", .data = (void *)0x4430 },
508 	{ .family = "OMAP5", .data = (void *)0x5430 },
509 	{ .family = "DRA7",  .data = (void *)0x0752 },
510 	{ /* sentinel */ }
511 };
512 
513 static int pdev_probe(struct platform_device *pdev)
514 {
515 	const struct soc_device_attribute *soc;
516 	struct omap_drm_private *priv;
517 	struct drm_device *ddev;
518 	unsigned int i;
519 	int ret;
520 
521 	DBG("%s", pdev->name);
522 
523 	if (omapdss_is_initialized() == false)
524 		return -EPROBE_DEFER;
525 
526 	ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
527 	if (ret) {
528 		dev_err(&pdev->dev, "Failed to set the DMA mask\n");
529 		return ret;
530 	}
531 
532 	omap_crtc_pre_init();
533 
534 	ret = omap_connect_dssdevs();
535 	if (ret)
536 		goto err_crtc_uninit;
537 
538 	/* Allocate and initialize the driver private structure. */
539 	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
540 	if (!priv) {
541 		ret = -ENOMEM;
542 		goto err_disconnect_dssdevs;
543 	}
544 
545 	priv->dispc_ops = dispc_get_ops();
546 
547 	soc = soc_device_match(omapdrm_soc_devices);
548 	priv->omaprev = soc ? (unsigned int)soc->data : 0;
549 	priv->wq = alloc_ordered_workqueue("omapdrm", 0);
550 
551 	spin_lock_init(&priv->list_lock);
552 	INIT_LIST_HEAD(&priv->obj_list);
553 
554 	/* Allocate and initialize the DRM device. */
555 	ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
556 	if (IS_ERR(ddev)) {
557 		ret = PTR_ERR(ddev);
558 		goto err_free_priv;
559 	}
560 
561 	ddev->dev_private = priv;
562 	platform_set_drvdata(pdev, ddev);
563 
564 	/* Get memory bandwidth limits */
565 	if (priv->dispc_ops->get_memory_bandwidth_limit)
566 		priv->max_bandwidth =
567 				priv->dispc_ops->get_memory_bandwidth_limit();
568 
569 	omap_gem_init(ddev);
570 
571 	ret = omap_modeset_init(ddev);
572 	if (ret) {
573 		dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
574 		goto err_free_drm_dev;
575 	}
576 
577 	/* Initialize vblank handling, start with all CRTCs disabled. */
578 	ret = drm_vblank_init(ddev, priv->num_crtcs);
579 	if (ret) {
580 		dev_err(&pdev->dev, "could not init vblank\n");
581 		goto err_cleanup_modeset;
582 	}
583 
584 	for (i = 0; i < priv->num_crtcs; i++)
585 		drm_crtc_vblank_off(priv->crtcs[i]);
586 
587 	priv->fbdev = omap_fbdev_init(ddev);
588 
589 	drm_kms_helper_poll_init(ddev);
590 	omap_modeset_enable_external_hpd();
591 
592 	/*
593 	 * Register the DRM device with the core and the connectors with
594 	 * sysfs.
595 	 */
596 	ret = drm_dev_register(ddev, 0);
597 	if (ret)
598 		goto err_cleanup_helpers;
599 
600 	return 0;
601 
602 err_cleanup_helpers:
603 	omap_modeset_disable_external_hpd();
604 	drm_kms_helper_poll_fini(ddev);
605 	if (priv->fbdev)
606 		omap_fbdev_free(ddev);
607 err_cleanup_modeset:
608 	drm_mode_config_cleanup(ddev);
609 	omap_drm_irq_uninstall(ddev);
610 err_free_drm_dev:
611 	omap_gem_deinit(ddev);
612 	drm_dev_unref(ddev);
613 err_free_priv:
614 	destroy_workqueue(priv->wq);
615 	kfree(priv);
616 err_disconnect_dssdevs:
617 	omap_disconnect_dssdevs();
618 err_crtc_uninit:
619 	omap_crtc_pre_uninit();
620 	return ret;
621 }
622 
623 static int pdev_remove(struct platform_device *pdev)
624 {
625 	struct drm_device *ddev = platform_get_drvdata(pdev);
626 	struct omap_drm_private *priv = ddev->dev_private;
627 
628 	DBG("");
629 
630 	drm_dev_unregister(ddev);
631 
632 	omap_modeset_disable_external_hpd();
633 	drm_kms_helper_poll_fini(ddev);
634 
635 	if (priv->fbdev)
636 		omap_fbdev_free(ddev);
637 
638 	drm_atomic_helper_shutdown(ddev);
639 
640 	drm_mode_config_cleanup(ddev);
641 
642 	omap_drm_irq_uninstall(ddev);
643 	omap_gem_deinit(ddev);
644 
645 	drm_dev_unref(ddev);
646 
647 	destroy_workqueue(priv->wq);
648 	kfree(priv);
649 
650 	omap_disconnect_dssdevs();
651 	omap_crtc_pre_uninit();
652 
653 	return 0;
654 }
655 
656 #ifdef CONFIG_PM_SLEEP
657 static int omap_drm_suspend_all_displays(void)
658 {
659 	struct omap_dss_device *dssdev = NULL;
660 
661 	for_each_dss_dev(dssdev) {
662 		if (!dssdev->driver)
663 			continue;
664 
665 		if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
666 			dssdev->driver->disable(dssdev);
667 			dssdev->activate_after_resume = true;
668 		} else {
669 			dssdev->activate_after_resume = false;
670 		}
671 	}
672 
673 	return 0;
674 }
675 
676 static int omap_drm_resume_all_displays(void)
677 {
678 	struct omap_dss_device *dssdev = NULL;
679 
680 	for_each_dss_dev(dssdev) {
681 		if (!dssdev->driver)
682 			continue;
683 
684 		if (dssdev->activate_after_resume) {
685 			dssdev->driver->enable(dssdev);
686 			dssdev->activate_after_resume = false;
687 		}
688 	}
689 
690 	return 0;
691 }
692 
693 static int omap_drm_suspend(struct device *dev)
694 {
695 	struct drm_device *drm_dev = dev_get_drvdata(dev);
696 
697 	drm_kms_helper_poll_disable(drm_dev);
698 
699 	drm_modeset_lock_all(drm_dev);
700 	omap_drm_suspend_all_displays();
701 	drm_modeset_unlock_all(drm_dev);
702 
703 	return 0;
704 }
705 
706 static int omap_drm_resume(struct device *dev)
707 {
708 	struct drm_device *drm_dev = dev_get_drvdata(dev);
709 
710 	drm_modeset_lock_all(drm_dev);
711 	omap_drm_resume_all_displays();
712 	drm_modeset_unlock_all(drm_dev);
713 
714 	drm_kms_helper_poll_enable(drm_dev);
715 
716 	return omap_gem_resume(drm_dev);
717 }
718 #endif
719 
720 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
721 
722 static struct platform_driver pdev = {
723 	.driver = {
724 		.name = "omapdrm",
725 		.pm = &omapdrm_pm_ops,
726 	},
727 	.probe = pdev_probe,
728 	.remove = pdev_remove,
729 };
730 
731 static struct platform_driver * const drivers[] = {
732 	&omap_dmm_driver,
733 	&pdev,
734 };
735 
736 static int __init omap_drm_init(void)
737 {
738 	DBG("init");
739 
740 	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
741 }
742 
743 static void __exit omap_drm_fini(void)
744 {
745 	DBG("fini");
746 
747 	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
748 }
749 
750 /* need late_initcall() so we load after dss_driver's are loaded */
751 late_initcall(omap_drm_init);
752 module_exit(omap_drm_fini);
753 
754 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
755 MODULE_DESCRIPTION("OMAP DRM Display Driver");
756 MODULE_ALIAS("platform:" DRIVER_NAME);
757 MODULE_LICENSE("GPL v2");
758