xref: /openbmc/linux/drivers/gpu/drm/omapdrm/omap_drv.c (revision 4da722ca)
1 /*
2  * drivers/gpu/drm/omapdrm/omap_drv.c
3  *
4  * Copyright (C) 2011 Texas Instruments
5  * Author: Rob Clark <rob@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include <linux/sys_soc.h>
21 
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
26 
27 #include "omap_dmm_tiler.h"
28 #include "omap_drv.h"
29 
30 #define DRIVER_NAME		MODULE_NAME
31 #define DRIVER_DESC		"OMAP DRM"
32 #define DRIVER_DATE		"20110917"
33 #define DRIVER_MAJOR		1
34 #define DRIVER_MINOR		0
35 #define DRIVER_PATCHLEVEL	0
36 
37 /*
38  * mode config funcs
39  */
40 
41 /* Notes about mapping DSS and DRM entities:
42  *    CRTC:        overlay
43  *    encoder:     manager.. with some extension to allow one primary CRTC
44  *                 and zero or more video CRTC's to be mapped to one encoder?
45  *    connector:   dssdev.. manager can be attached/detached from different
46  *                 devices
47  */
48 
49 static void omap_fb_output_poll_changed(struct drm_device *dev)
50 {
51 	struct omap_drm_private *priv = dev->dev_private;
52 	DBG("dev=%p", dev);
53 	if (priv->fbdev)
54 		drm_fb_helper_hotplug_event(priv->fbdev);
55 }
56 
57 static void omap_atomic_wait_for_completion(struct drm_device *dev,
58 					    struct drm_atomic_state *old_state)
59 {
60 	struct drm_crtc_state *old_crtc_state;
61 	struct drm_crtc *crtc;
62 	unsigned int i;
63 	int ret;
64 
65 	for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
66 		if (!crtc->state->enable)
67 			continue;
68 
69 		ret = omap_crtc_wait_pending(crtc);
70 
71 		if (!ret)
72 			dev_warn(dev->dev,
73 				 "atomic complete timeout (pipe %u)!\n", i);
74 	}
75 }
76 
77 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
78 {
79 	struct drm_device *dev = old_state->dev;
80 	struct omap_drm_private *priv = dev->dev_private;
81 
82 	priv->dispc_ops->runtime_get();
83 
84 	/* Apply the atomic update. */
85 	drm_atomic_helper_commit_modeset_disables(dev, old_state);
86 
87 	/* With the current dss dispc implementation we have to enable
88 	 * the new modeset before we can commit planes. The dispc ovl
89 	 * configuration relies on the video mode configuration been
90 	 * written into the HW when the ovl configuration is
91 	 * calculated.
92 	 *
93 	 * This approach is not ideal because after a mode change the
94 	 * plane update is executed only after the first vblank
95 	 * interrupt. The dispc implementation should be fixed so that
96 	 * it is able use uncommitted drm state information.
97 	 */
98 	drm_atomic_helper_commit_modeset_enables(dev, old_state);
99 	omap_atomic_wait_for_completion(dev, old_state);
100 
101 	drm_atomic_helper_commit_planes(dev, old_state, 0);
102 
103 	drm_atomic_helper_commit_hw_done(old_state);
104 
105 	/*
106 	 * Wait for completion of the page flips to ensure that old buffers
107 	 * can't be touched by the hardware anymore before cleaning up planes.
108 	 */
109 	omap_atomic_wait_for_completion(dev, old_state);
110 
111 	drm_atomic_helper_cleanup_planes(dev, old_state);
112 
113 	priv->dispc_ops->runtime_put();
114 }
115 
116 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
117 	.atomic_commit_tail = omap_atomic_commit_tail,
118 };
119 
120 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
121 	.fb_create = omap_framebuffer_create,
122 	.output_poll_changed = omap_fb_output_poll_changed,
123 	.atomic_check = drm_atomic_helper_check,
124 	.atomic_commit = drm_atomic_helper_commit,
125 };
126 
127 static int get_connector_type(struct omap_dss_device *dssdev)
128 {
129 	switch (dssdev->type) {
130 	case OMAP_DISPLAY_TYPE_HDMI:
131 		return DRM_MODE_CONNECTOR_HDMIA;
132 	case OMAP_DISPLAY_TYPE_DVI:
133 		return DRM_MODE_CONNECTOR_DVID;
134 	case OMAP_DISPLAY_TYPE_DSI:
135 		return DRM_MODE_CONNECTOR_DSI;
136 	case OMAP_DISPLAY_TYPE_DPI:
137 	case OMAP_DISPLAY_TYPE_DBI:
138 		return DRM_MODE_CONNECTOR_DPI;
139 	case OMAP_DISPLAY_TYPE_VENC:
140 		/* TODO: This could also be composite */
141 		return DRM_MODE_CONNECTOR_SVIDEO;
142 	case OMAP_DISPLAY_TYPE_SDI:
143 		return DRM_MODE_CONNECTOR_LVDS;
144 	default:
145 		return DRM_MODE_CONNECTOR_Unknown;
146 	}
147 }
148 
149 static void omap_disconnect_dssdevs(void)
150 {
151 	struct omap_dss_device *dssdev = NULL;
152 
153 	for_each_dss_dev(dssdev)
154 		dssdev->driver->disconnect(dssdev);
155 }
156 
157 static int omap_connect_dssdevs(void)
158 {
159 	int r;
160 	struct omap_dss_device *dssdev = NULL;
161 
162 	if (!omapdss_stack_is_ready())
163 		return -EPROBE_DEFER;
164 
165 	for_each_dss_dev(dssdev) {
166 		r = dssdev->driver->connect(dssdev);
167 		if (r == -EPROBE_DEFER) {
168 			omap_dss_put_device(dssdev);
169 			goto cleanup;
170 		} else if (r) {
171 			dev_warn(dssdev->dev, "could not connect display: %s\n",
172 				dssdev->name);
173 		}
174 	}
175 
176 	return 0;
177 
178 cleanup:
179 	/*
180 	 * if we are deferring probe, we disconnect the devices we previously
181 	 * connected
182 	 */
183 	omap_disconnect_dssdevs();
184 
185 	return r;
186 }
187 
188 static int omap_modeset_init_properties(struct drm_device *dev)
189 {
190 	struct omap_drm_private *priv = dev->dev_private;
191 	unsigned int num_planes = priv->dispc_ops->get_num_ovls();
192 
193 	priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
194 						      num_planes - 1);
195 	if (!priv->zorder_prop)
196 		return -ENOMEM;
197 
198 	return 0;
199 }
200 
201 static int omap_modeset_init(struct drm_device *dev)
202 {
203 	struct omap_drm_private *priv = dev->dev_private;
204 	struct omap_dss_device *dssdev = NULL;
205 	int num_ovls = priv->dispc_ops->get_num_ovls();
206 	int num_mgrs = priv->dispc_ops->get_num_mgrs();
207 	int num_crtcs, crtc_idx, plane_idx;
208 	int ret;
209 	u32 plane_crtc_mask;
210 
211 	drm_mode_config_init(dev);
212 
213 	ret = omap_modeset_init_properties(dev);
214 	if (ret < 0)
215 		return ret;
216 
217 	/*
218 	 * This function creates exactly one connector, encoder, crtc,
219 	 * and primary plane per each connected dss-device. Each
220 	 * connector->encoder->crtc chain is expected to be separate
221 	 * and each crtc is connect to a single dss-channel. If the
222 	 * configuration does not match the expectations or exceeds
223 	 * the available resources, the configuration is rejected.
224 	 */
225 	num_crtcs = 0;
226 	for_each_dss_dev(dssdev)
227 		if (omapdss_device_is_connected(dssdev))
228 			num_crtcs++;
229 
230 	if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
231 	    num_crtcs > ARRAY_SIZE(priv->crtcs) ||
232 	    num_crtcs > ARRAY_SIZE(priv->planes) ||
233 	    num_crtcs > ARRAY_SIZE(priv->encoders) ||
234 	    num_crtcs > ARRAY_SIZE(priv->connectors)) {
235 		dev_err(dev->dev, "%s(): Too many connected displays\n",
236 			__func__);
237 		return -EINVAL;
238 	}
239 
240 	/* All planes can be put to any CRTC */
241 	plane_crtc_mask = (1 << num_crtcs) - 1;
242 
243 	dssdev = NULL;
244 
245 	crtc_idx = 0;
246 	plane_idx = 0;
247 	for_each_dss_dev(dssdev) {
248 		struct drm_connector *connector;
249 		struct drm_encoder *encoder;
250 		struct drm_plane *plane;
251 		struct drm_crtc *crtc;
252 
253 		if (!omapdss_device_is_connected(dssdev))
254 			continue;
255 
256 		encoder = omap_encoder_init(dev, dssdev);
257 		if (!encoder)
258 			return -ENOMEM;
259 
260 		connector = omap_connector_init(dev,
261 				get_connector_type(dssdev), dssdev, encoder);
262 		if (!connector)
263 			return -ENOMEM;
264 
265 		plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_PRIMARY,
266 					plane_crtc_mask);
267 		if (IS_ERR(plane))
268 			return PTR_ERR(plane);
269 
270 		crtc = omap_crtc_init(dev, plane, dssdev);
271 		if (IS_ERR(crtc))
272 			return PTR_ERR(crtc);
273 
274 		drm_mode_connector_attach_encoder(connector, encoder);
275 		encoder->possible_crtcs = (1 << crtc_idx);
276 
277 		priv->crtcs[priv->num_crtcs++] = crtc;
278 		priv->planes[priv->num_planes++] = plane;
279 		priv->encoders[priv->num_encoders++] = encoder;
280 		priv->connectors[priv->num_connectors++] = connector;
281 
282 		plane_idx++;
283 		crtc_idx++;
284 	}
285 
286 	/*
287 	 * Create normal planes for the remaining overlays:
288 	 */
289 	for (; plane_idx < num_ovls; plane_idx++) {
290 		struct drm_plane *plane;
291 
292 		if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
293 			return -EINVAL;
294 
295 		plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_OVERLAY,
296 			plane_crtc_mask);
297 		if (IS_ERR(plane))
298 			return PTR_ERR(plane);
299 
300 		priv->planes[priv->num_planes++] = plane;
301 	}
302 
303 	DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
304 		priv->num_planes, priv->num_crtcs, priv->num_encoders,
305 		priv->num_connectors);
306 
307 	dev->mode_config.min_width = 8;
308 	dev->mode_config.min_height = 2;
309 
310 	/* note: eventually will need some cpu_is_omapXYZ() type stuff here
311 	 * to fill in these limits properly on different OMAP generations..
312 	 */
313 	dev->mode_config.max_width = 2048;
314 	dev->mode_config.max_height = 2048;
315 
316 	dev->mode_config.funcs = &omap_mode_config_funcs;
317 	dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
318 
319 	drm_mode_config_reset(dev);
320 
321 	omap_drm_irq_install(dev);
322 
323 	return 0;
324 }
325 
326 /*
327  * drm ioctl funcs
328  */
329 
330 
331 static int ioctl_get_param(struct drm_device *dev, void *data,
332 		struct drm_file *file_priv)
333 {
334 	struct omap_drm_private *priv = dev->dev_private;
335 	struct drm_omap_param *args = data;
336 
337 	DBG("%p: param=%llu", dev, args->param);
338 
339 	switch (args->param) {
340 	case OMAP_PARAM_CHIPSET_ID:
341 		args->value = priv->omaprev;
342 		break;
343 	default:
344 		DBG("unknown parameter %lld", args->param);
345 		return -EINVAL;
346 	}
347 
348 	return 0;
349 }
350 
351 static int ioctl_set_param(struct drm_device *dev, void *data,
352 		struct drm_file *file_priv)
353 {
354 	struct drm_omap_param *args = data;
355 
356 	switch (args->param) {
357 	default:
358 		DBG("unknown parameter %lld", args->param);
359 		return -EINVAL;
360 	}
361 
362 	return 0;
363 }
364 
365 #define OMAP_BO_USER_MASK	0x00ffffff	/* flags settable by userspace */
366 
367 static int ioctl_gem_new(struct drm_device *dev, void *data,
368 		struct drm_file *file_priv)
369 {
370 	struct drm_omap_gem_new *args = data;
371 	u32 flags = args->flags & OMAP_BO_USER_MASK;
372 
373 	VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
374 	     args->size.bytes, flags);
375 
376 	return omap_gem_new_handle(dev, file_priv, args->size, flags,
377 				   &args->handle);
378 }
379 
380 static int ioctl_gem_info(struct drm_device *dev, void *data,
381 		struct drm_file *file_priv)
382 {
383 	struct drm_omap_gem_info *args = data;
384 	struct drm_gem_object *obj;
385 	int ret = 0;
386 
387 	VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
388 
389 	obj = drm_gem_object_lookup(file_priv, args->handle);
390 	if (!obj)
391 		return -ENOENT;
392 
393 	args->size = omap_gem_mmap_size(obj);
394 	args->offset = omap_gem_mmap_offset(obj);
395 
396 	drm_gem_object_unreference_unlocked(obj);
397 
398 	return ret;
399 }
400 
401 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
402 	DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
403 			  DRM_AUTH | DRM_RENDER_ALLOW),
404 	DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
405 			  DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
406 	DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
407 			  DRM_AUTH | DRM_RENDER_ALLOW),
408 	/* Deprecated, to be removed. */
409 	DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
410 			  DRM_AUTH | DRM_RENDER_ALLOW),
411 	/* Deprecated, to be removed. */
412 	DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
413 			  DRM_AUTH | DRM_RENDER_ALLOW),
414 	DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
415 			  DRM_AUTH | DRM_RENDER_ALLOW),
416 };
417 
418 /*
419  * drm driver funcs
420  */
421 
422 static int dev_open(struct drm_device *dev, struct drm_file *file)
423 {
424 	file->driver_priv = NULL;
425 
426 	DBG("open: dev=%p, file=%p", dev, file);
427 
428 	return 0;
429 }
430 
431 /**
432  * lastclose - clean up after all DRM clients have exited
433  * @dev: DRM device
434  *
435  * Take care of cleaning up after all DRM clients have exited.  In the
436  * mode setting case, we want to restore the kernel's initial mode (just
437  * in case the last client left us in a bad state).
438  */
439 static void dev_lastclose(struct drm_device *dev)
440 {
441 	int i;
442 
443 	/* we don't support vga_switcheroo.. so just make sure the fbdev
444 	 * mode is active
445 	 */
446 	struct omap_drm_private *priv = dev->dev_private;
447 	int ret;
448 
449 	DBG("lastclose: dev=%p", dev);
450 
451 	/* need to restore default rotation state.. not sure
452 	 * if there is a cleaner way to restore properties to
453 	 * default state?  Maybe a flag that properties should
454 	 * automatically be restored to default state on
455 	 * lastclose?
456 	 */
457 	for (i = 0; i < priv->num_crtcs; i++) {
458 		struct drm_crtc *crtc = priv->crtcs[i];
459 
460 		if (!crtc->primary->rotation_property)
461 			continue;
462 
463 		drm_object_property_set_value(&crtc->base,
464 					      crtc->primary->rotation_property,
465 					      DRM_MODE_ROTATE_0);
466 	}
467 
468 	for (i = 0; i < priv->num_planes; i++) {
469 		struct drm_plane *plane = priv->planes[i];
470 
471 		if (!plane->rotation_property)
472 			continue;
473 
474 		drm_object_property_set_value(&plane->base,
475 					      plane->rotation_property,
476 					      DRM_MODE_ROTATE_0);
477 	}
478 
479 	if (priv->fbdev) {
480 		ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
481 		if (ret)
482 			DBG("failed to restore crtc mode");
483 	}
484 }
485 
486 static const struct vm_operations_struct omap_gem_vm_ops = {
487 	.fault = omap_gem_fault,
488 	.open = drm_gem_vm_open,
489 	.close = drm_gem_vm_close,
490 };
491 
492 static const struct file_operations omapdriver_fops = {
493 	.owner = THIS_MODULE,
494 	.open = drm_open,
495 	.unlocked_ioctl = drm_ioctl,
496 	.compat_ioctl = drm_compat_ioctl,
497 	.release = drm_release,
498 	.mmap = omap_gem_mmap,
499 	.poll = drm_poll,
500 	.read = drm_read,
501 	.llseek = noop_llseek,
502 };
503 
504 static struct drm_driver omap_drm_driver = {
505 	.driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
506 		DRIVER_ATOMIC | DRIVER_RENDER,
507 	.open = dev_open,
508 	.lastclose = dev_lastclose,
509 #ifdef CONFIG_DEBUG_FS
510 	.debugfs_init = omap_debugfs_init,
511 #endif
512 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
513 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
514 	.gem_prime_export = omap_gem_prime_export,
515 	.gem_prime_import = omap_gem_prime_import,
516 	.gem_free_object = omap_gem_free_object,
517 	.gem_vm_ops = &omap_gem_vm_ops,
518 	.dumb_create = omap_gem_dumb_create,
519 	.dumb_map_offset = omap_gem_dumb_map_offset,
520 	.dumb_destroy = drm_gem_dumb_destroy,
521 	.ioctls = ioctls,
522 	.num_ioctls = DRM_OMAP_NUM_IOCTLS,
523 	.fops = &omapdriver_fops,
524 	.name = DRIVER_NAME,
525 	.desc = DRIVER_DESC,
526 	.date = DRIVER_DATE,
527 	.major = DRIVER_MAJOR,
528 	.minor = DRIVER_MINOR,
529 	.patchlevel = DRIVER_PATCHLEVEL,
530 };
531 
532 static const struct soc_device_attribute omapdrm_soc_devices[] = {
533 	{ .family = "OMAP3", .data = (void *)0x3430 },
534 	{ .family = "OMAP4", .data = (void *)0x4430 },
535 	{ .family = "OMAP5", .data = (void *)0x5430 },
536 	{ .family = "DRA7",  .data = (void *)0x0752 },
537 	{ /* sentinel */ }
538 };
539 
540 static int pdev_probe(struct platform_device *pdev)
541 {
542 	const struct soc_device_attribute *soc;
543 	struct omap_drm_private *priv;
544 	struct drm_device *ddev;
545 	unsigned int i;
546 	int ret;
547 
548 	DBG("%s", pdev->name);
549 
550 	if (omapdss_is_initialized() == false)
551 		return -EPROBE_DEFER;
552 
553 	omap_crtc_pre_init();
554 
555 	ret = omap_connect_dssdevs();
556 	if (ret)
557 		goto err_crtc_uninit;
558 
559 	/* Allocate and initialize the driver private structure. */
560 	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
561 	if (!priv) {
562 		ret = -ENOMEM;
563 		goto err_disconnect_dssdevs;
564 	}
565 
566 	priv->dispc_ops = dispc_get_ops();
567 
568 	soc = soc_device_match(omapdrm_soc_devices);
569 	priv->omaprev = soc ? (unsigned int)soc->data : 0;
570 	priv->wq = alloc_ordered_workqueue("omapdrm", 0);
571 
572 	spin_lock_init(&priv->list_lock);
573 	INIT_LIST_HEAD(&priv->obj_list);
574 
575 	/* Allocate and initialize the DRM device. */
576 	ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
577 	if (IS_ERR(ddev)) {
578 		ret = PTR_ERR(ddev);
579 		goto err_free_priv;
580 	}
581 
582 	ddev->dev_private = priv;
583 	platform_set_drvdata(pdev, ddev);
584 
585 	omap_gem_init(ddev);
586 
587 	ret = omap_modeset_init(ddev);
588 	if (ret) {
589 		dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
590 		goto err_free_drm_dev;
591 	}
592 
593 	/* Initialize vblank handling, start with all CRTCs disabled. */
594 	ret = drm_vblank_init(ddev, priv->num_crtcs);
595 	if (ret) {
596 		dev_err(&pdev->dev, "could not init vblank\n");
597 		goto err_cleanup_modeset;
598 	}
599 
600 	for (i = 0; i < priv->num_crtcs; i++)
601 		drm_crtc_vblank_off(priv->crtcs[i]);
602 
603 	priv->fbdev = omap_fbdev_init(ddev);
604 
605 	drm_kms_helper_poll_init(ddev);
606 
607 	/*
608 	 * Register the DRM device with the core and the connectors with
609 	 * sysfs.
610 	 */
611 	ret = drm_dev_register(ddev, 0);
612 	if (ret)
613 		goto err_cleanup_helpers;
614 
615 	return 0;
616 
617 err_cleanup_helpers:
618 	drm_kms_helper_poll_fini(ddev);
619 	if (priv->fbdev)
620 		omap_fbdev_free(ddev);
621 err_cleanup_modeset:
622 	drm_mode_config_cleanup(ddev);
623 	omap_drm_irq_uninstall(ddev);
624 err_free_drm_dev:
625 	omap_gem_deinit(ddev);
626 	drm_dev_unref(ddev);
627 err_free_priv:
628 	destroy_workqueue(priv->wq);
629 	kfree(priv);
630 err_disconnect_dssdevs:
631 	omap_disconnect_dssdevs();
632 err_crtc_uninit:
633 	omap_crtc_pre_uninit();
634 	return ret;
635 }
636 
637 static int pdev_remove(struct platform_device *pdev)
638 {
639 	struct drm_device *ddev = platform_get_drvdata(pdev);
640 	struct omap_drm_private *priv = ddev->dev_private;
641 
642 	DBG("");
643 
644 	drm_dev_unregister(ddev);
645 
646 	drm_kms_helper_poll_fini(ddev);
647 
648 	if (priv->fbdev)
649 		omap_fbdev_free(ddev);
650 
651 	drm_atomic_helper_shutdown(ddev);
652 
653 	drm_mode_config_cleanup(ddev);
654 
655 	omap_drm_irq_uninstall(ddev);
656 	omap_gem_deinit(ddev);
657 
658 	drm_dev_unref(ddev);
659 
660 	destroy_workqueue(priv->wq);
661 	kfree(priv);
662 
663 	omap_disconnect_dssdevs();
664 	omap_crtc_pre_uninit();
665 
666 	return 0;
667 }
668 
669 #ifdef CONFIG_PM_SLEEP
670 static int omap_drm_suspend_all_displays(void)
671 {
672 	struct omap_dss_device *dssdev = NULL;
673 
674 	for_each_dss_dev(dssdev) {
675 		if (!dssdev->driver)
676 			continue;
677 
678 		if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
679 			dssdev->driver->disable(dssdev);
680 			dssdev->activate_after_resume = true;
681 		} else {
682 			dssdev->activate_after_resume = false;
683 		}
684 	}
685 
686 	return 0;
687 }
688 
689 static int omap_drm_resume_all_displays(void)
690 {
691 	struct omap_dss_device *dssdev = NULL;
692 
693 	for_each_dss_dev(dssdev) {
694 		if (!dssdev->driver)
695 			continue;
696 
697 		if (dssdev->activate_after_resume) {
698 			dssdev->driver->enable(dssdev);
699 			dssdev->activate_after_resume = false;
700 		}
701 	}
702 
703 	return 0;
704 }
705 
706 static int omap_drm_suspend(struct device *dev)
707 {
708 	struct drm_device *drm_dev = dev_get_drvdata(dev);
709 
710 	drm_kms_helper_poll_disable(drm_dev);
711 
712 	drm_modeset_lock_all(drm_dev);
713 	omap_drm_suspend_all_displays();
714 	drm_modeset_unlock_all(drm_dev);
715 
716 	return 0;
717 }
718 
719 static int omap_drm_resume(struct device *dev)
720 {
721 	struct drm_device *drm_dev = dev_get_drvdata(dev);
722 
723 	drm_modeset_lock_all(drm_dev);
724 	omap_drm_resume_all_displays();
725 	drm_modeset_unlock_all(drm_dev);
726 
727 	drm_kms_helper_poll_enable(drm_dev);
728 
729 	return omap_gem_resume(dev);
730 }
731 #endif
732 
733 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
734 
735 static struct platform_driver pdev = {
736 	.driver = {
737 		.name = DRIVER_NAME,
738 		.pm = &omapdrm_pm_ops,
739 	},
740 	.probe = pdev_probe,
741 	.remove = pdev_remove,
742 };
743 
744 static struct platform_driver * const drivers[] = {
745 	&omap_dmm_driver,
746 	&pdev,
747 };
748 
749 static int __init omap_drm_init(void)
750 {
751 	DBG("init");
752 
753 	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
754 }
755 
756 static void __exit omap_drm_fini(void)
757 {
758 	DBG("fini");
759 
760 	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
761 }
762 
763 /* need late_initcall() so we load after dss_driver's are loaded */
764 late_initcall(omap_drm_init);
765 module_exit(omap_drm_fini);
766 
767 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
768 MODULE_DESCRIPTION("OMAP DRM Display Driver");
769 MODULE_ALIAS("platform:" DRIVER_NAME);
770 MODULE_LICENSE("GPL v2");
771