1 /* 2 * HDMI driver for OMAP5 3 * 4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Authors: 7 * Yong Zhi 8 * Mythri pk 9 * Archit Taneja <archit@ti.com> 10 * Tomi Valkeinen <tomi.valkeinen@ti.com> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License version 2 as published by 14 * the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but WITHOUT 17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 19 * more details. 20 * 21 * You should have received a copy of the GNU General Public License along with 22 * this program. If not, see <http://www.gnu.org/licenses/>. 23 */ 24 25 #define DSS_SUBSYS_NAME "HDMI" 26 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/err.h> 30 #include <linux/io.h> 31 #include <linux/interrupt.h> 32 #include <linux/mutex.h> 33 #include <linux/delay.h> 34 #include <linux/string.h> 35 #include <linux/platform_device.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/clk.h> 38 #include <linux/gpio.h> 39 #include <linux/regulator/consumer.h> 40 #include <linux/component.h> 41 #include <linux/of.h> 42 #include <linux/of_graph.h> 43 #include <sound/omap-hdmi-audio.h> 44 45 #include "omapdss.h" 46 #include "hdmi5_core.h" 47 #include "dss.h" 48 49 static int hdmi_runtime_get(struct omap_hdmi *hdmi) 50 { 51 int r; 52 53 DSSDBG("hdmi_runtime_get\n"); 54 55 r = pm_runtime_get_sync(&hdmi->pdev->dev); 56 WARN_ON(r < 0); 57 if (r < 0) 58 return r; 59 60 return 0; 61 } 62 63 static void hdmi_runtime_put(struct omap_hdmi *hdmi) 64 { 65 int r; 66 67 DSSDBG("hdmi_runtime_put\n"); 68 69 r = pm_runtime_put_sync(&hdmi->pdev->dev); 70 WARN_ON(r < 0 && r != -ENOSYS); 71 } 72 73 static irqreturn_t hdmi_irq_handler(int irq, void *data) 74 { 75 struct omap_hdmi *hdmi = data; 76 struct hdmi_wp_data *wp = &hdmi->wp; 77 u32 irqstatus; 78 79 irqstatus = hdmi_wp_get_irqstatus(wp); 80 hdmi_wp_set_irqstatus(wp, irqstatus); 81 82 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) && 83 irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 84 u32 v; 85 /* 86 * If we get both connect and disconnect interrupts at the same 87 * time, turn off the PHY, clear interrupts, and restart, which 88 * raises connect interrupt if a cable is connected, or nothing 89 * if cable is not connected. 90 */ 91 92 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); 93 94 /* 95 * We always get bogus CONNECT & DISCONNECT interrupts when 96 * setting the PHY to LDOON. To ignore those, we force the RXDET 97 * line to 0 until the PHY power state has been changed. 98 */ 99 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL); 100 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ 101 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ 102 hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); 103 104 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | 105 HDMI_IRQ_LINK_DISCONNECT); 106 107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 108 109 REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); 110 111 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) { 112 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); 113 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 114 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 115 } 116 117 return IRQ_HANDLED; 118 } 119 120 static int hdmi_init_regulator(struct omap_hdmi *hdmi) 121 { 122 struct regulator *reg; 123 124 if (hdmi->vdda_reg != NULL) 125 return 0; 126 127 reg = devm_regulator_get(&hdmi->pdev->dev, "vdda"); 128 if (IS_ERR(reg)) { 129 DSSERR("can't get VDDA regulator\n"); 130 return PTR_ERR(reg); 131 } 132 133 hdmi->vdda_reg = reg; 134 135 return 0; 136 } 137 138 static int hdmi_power_on_core(struct omap_hdmi *hdmi) 139 { 140 int r; 141 142 r = regulator_enable(hdmi->vdda_reg); 143 if (r) 144 return r; 145 146 r = hdmi_runtime_get(hdmi); 147 if (r) 148 goto err_runtime_get; 149 150 /* Make selection of HDMI in DSS */ 151 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK); 152 153 hdmi->core_enabled = true; 154 155 return 0; 156 157 err_runtime_get: 158 regulator_disable(hdmi->vdda_reg); 159 160 return r; 161 } 162 163 static void hdmi_power_off_core(struct omap_hdmi *hdmi) 164 { 165 hdmi->core_enabled = false; 166 167 hdmi_runtime_put(hdmi); 168 regulator_disable(hdmi->vdda_reg); 169 } 170 171 static int hdmi_power_on_full(struct omap_hdmi *hdmi) 172 { 173 int r; 174 struct videomode *vm; 175 struct dss_pll_clock_info hdmi_cinfo = { 0 }; 176 unsigned int pc; 177 178 r = hdmi_power_on_core(hdmi); 179 if (r) 180 return r; 181 182 vm = &hdmi->cfg.vm; 183 184 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive, 185 vm->vactive); 186 187 pc = vm->pixelclock; 188 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) 189 pc *= 2; 190 191 /* DSS_HDMI_TCLK is bitclk / 10 */ 192 pc *= 10; 193 194 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin), 195 pc, &hdmi_cinfo); 196 197 /* disable and clear irqs */ 198 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); 199 hdmi_wp_set_irqstatus(&hdmi->wp, 200 hdmi_wp_get_irqstatus(&hdmi->wp)); 201 202 r = dss_pll_enable(&hdmi->pll.pll); 203 if (r) { 204 DSSERR("Failed to enable PLL\n"); 205 goto err_pll_enable; 206 } 207 208 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo); 209 if (r) { 210 DSSERR("Failed to configure PLL\n"); 211 goto err_pll_cfg; 212 } 213 214 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco, 215 hdmi_cinfo.clkout[0]); 216 if (r) { 217 DSSDBG("Failed to start PHY\n"); 218 goto err_phy_cfg; 219 } 220 221 r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON); 222 if (r) 223 goto err_phy_pwr; 224 225 hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg); 226 227 /* tv size */ 228 dss_mgr_set_timings(&hdmi->output, vm); 229 230 r = dss_mgr_enable(&hdmi->output); 231 if (r) 232 goto err_mgr_enable; 233 234 r = hdmi_wp_video_start(&hdmi->wp); 235 if (r) 236 goto err_vid_enable; 237 238 hdmi_wp_set_irqenable(&hdmi->wp, 239 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); 240 241 return 0; 242 243 err_vid_enable: 244 dss_mgr_disable(&hdmi->output); 245 err_mgr_enable: 246 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF); 247 err_phy_pwr: 248 err_phy_cfg: 249 err_pll_cfg: 250 dss_pll_disable(&hdmi->pll.pll); 251 err_pll_enable: 252 hdmi_power_off_core(hdmi); 253 return -EIO; 254 } 255 256 static void hdmi_power_off_full(struct omap_hdmi *hdmi) 257 { 258 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); 259 260 hdmi_wp_video_stop(&hdmi->wp); 261 262 dss_mgr_disable(&hdmi->output); 263 264 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF); 265 266 dss_pll_disable(&hdmi->pll.pll); 267 268 hdmi_power_off_core(hdmi); 269 } 270 271 static int hdmi_display_check_timing(struct omap_dss_device *dssdev, 272 struct videomode *vm) 273 { 274 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 275 276 if (!dispc_mgr_timings_ok(hdmi->dss->dispc, dssdev->dispc_channel, vm)) 277 return -EINVAL; 278 279 return 0; 280 } 281 282 static void hdmi_display_set_timing(struct omap_dss_device *dssdev, 283 struct videomode *vm) 284 { 285 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 286 287 mutex_lock(&hdmi->lock); 288 289 hdmi->cfg.vm = *vm; 290 291 dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock); 292 293 mutex_unlock(&hdmi->lock); 294 } 295 296 static void hdmi_display_get_timings(struct omap_dss_device *dssdev, 297 struct videomode *vm) 298 { 299 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 300 301 *vm = hdmi->cfg.vm; 302 } 303 304 static int hdmi_dump_regs(struct seq_file *s, void *p) 305 { 306 struct omap_hdmi *hdmi = s->private; 307 308 mutex_lock(&hdmi->lock); 309 310 if (hdmi_runtime_get(hdmi)) { 311 mutex_unlock(&hdmi->lock); 312 return 0; 313 } 314 315 hdmi_wp_dump(&hdmi->wp, s); 316 hdmi_pll_dump(&hdmi->pll, s); 317 hdmi_phy_dump(&hdmi->phy, s); 318 hdmi5_core_dump(&hdmi->core, s); 319 320 hdmi_runtime_put(hdmi); 321 mutex_unlock(&hdmi->lock); 322 return 0; 323 } 324 325 static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len) 326 { 327 int r; 328 int idlemode; 329 330 mutex_lock(&hdmi->lock); 331 332 r = hdmi_runtime_get(hdmi); 333 BUG_ON(r); 334 335 idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); 336 /* No-idle mode */ 337 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 338 339 r = hdmi5_read_edid(&hdmi->core, buf, len); 340 341 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); 342 343 hdmi_runtime_put(hdmi); 344 mutex_unlock(&hdmi->lock); 345 346 return r; 347 } 348 349 static void hdmi_start_audio_stream(struct omap_hdmi *hd) 350 { 351 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 352 hdmi_wp_audio_enable(&hd->wp, true); 353 hdmi_wp_audio_core_req_enable(&hd->wp, true); 354 } 355 356 static void hdmi_stop_audio_stream(struct omap_hdmi *hd) 357 { 358 hdmi_wp_audio_core_req_enable(&hd->wp, false); 359 hdmi_wp_audio_enable(&hd->wp, false); 360 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2); 361 } 362 363 static int hdmi_display_enable(struct omap_dss_device *dssdev) 364 { 365 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 366 unsigned long flags; 367 int r = 0; 368 369 DSSDBG("ENTER hdmi_display_enable\n"); 370 371 mutex_lock(&hdmi->lock); 372 373 if (!dssdev->dispc_channel_connected) { 374 DSSERR("failed to enable display: no output/manager\n"); 375 r = -ENODEV; 376 goto err0; 377 } 378 379 r = hdmi_power_on_full(hdmi); 380 if (r) { 381 DSSERR("failed to power on device\n"); 382 goto err0; 383 } 384 385 if (hdmi->audio_configured) { 386 r = hdmi5_audio_config(&hdmi->core, &hdmi->wp, 387 &hdmi->audio_config, 388 hdmi->cfg.vm.pixelclock); 389 if (r) { 390 DSSERR("Error restoring audio configuration: %d", r); 391 hdmi->audio_abort_cb(&hdmi->pdev->dev); 392 hdmi->audio_configured = false; 393 } 394 } 395 396 spin_lock_irqsave(&hdmi->audio_playing_lock, flags); 397 if (hdmi->audio_configured && hdmi->audio_playing) 398 hdmi_start_audio_stream(hdmi); 399 hdmi->display_enabled = true; 400 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags); 401 402 mutex_unlock(&hdmi->lock); 403 return 0; 404 405 err0: 406 mutex_unlock(&hdmi->lock); 407 return r; 408 } 409 410 static void hdmi_display_disable(struct omap_dss_device *dssdev) 411 { 412 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 413 unsigned long flags; 414 415 DSSDBG("Enter hdmi_display_disable\n"); 416 417 mutex_lock(&hdmi->lock); 418 419 spin_lock_irqsave(&hdmi->audio_playing_lock, flags); 420 hdmi_stop_audio_stream(hdmi); 421 hdmi->display_enabled = false; 422 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags); 423 424 hdmi_power_off_full(hdmi); 425 426 mutex_unlock(&hdmi->lock); 427 } 428 429 static int hdmi_core_enable(struct omap_hdmi *hdmi) 430 { 431 int r = 0; 432 433 DSSDBG("ENTER omapdss_hdmi_core_enable\n"); 434 435 mutex_lock(&hdmi->lock); 436 437 r = hdmi_power_on_core(hdmi); 438 if (r) { 439 DSSERR("failed to power on device\n"); 440 goto err0; 441 } 442 443 mutex_unlock(&hdmi->lock); 444 return 0; 445 446 err0: 447 mutex_unlock(&hdmi->lock); 448 return r; 449 } 450 451 static void hdmi_core_disable(struct omap_hdmi *hdmi) 452 { 453 DSSDBG("Enter omapdss_hdmi_core_disable\n"); 454 455 mutex_lock(&hdmi->lock); 456 457 hdmi_power_off_core(hdmi); 458 459 mutex_unlock(&hdmi->lock); 460 } 461 462 static int hdmi_connect(struct omap_dss_device *dssdev, 463 struct omap_dss_device *dst) 464 { 465 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 466 int r; 467 468 r = hdmi_init_regulator(hdmi); 469 if (r) 470 return r; 471 472 r = dss_mgr_connect(&hdmi->output, dssdev); 473 if (r) 474 return r; 475 476 r = omapdss_output_set_device(dssdev, dst); 477 if (r) { 478 DSSERR("failed to connect output to new device: %s\n", 479 dst->name); 480 dss_mgr_disconnect(&hdmi->output, dssdev); 481 return r; 482 } 483 484 return 0; 485 } 486 487 static void hdmi_disconnect(struct omap_dss_device *dssdev, 488 struct omap_dss_device *dst) 489 { 490 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 491 492 WARN_ON(dst != dssdev->dst); 493 494 if (dst != dssdev->dst) 495 return; 496 497 omapdss_output_unset_device(dssdev); 498 499 dss_mgr_disconnect(&hdmi->output, dssdev); 500 } 501 502 static int hdmi_read_edid(struct omap_dss_device *dssdev, 503 u8 *edid, int len) 504 { 505 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 506 bool need_enable; 507 int r; 508 509 need_enable = hdmi->core_enabled == false; 510 511 if (need_enable) { 512 r = hdmi_core_enable(hdmi); 513 if (r) 514 return r; 515 } 516 517 r = read_edid(hdmi, edid, len); 518 519 if (need_enable) 520 hdmi_core_disable(hdmi); 521 522 return r; 523 } 524 525 static int hdmi_set_infoframe(struct omap_dss_device *dssdev, 526 const struct hdmi_avi_infoframe *avi) 527 { 528 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 529 530 hdmi->cfg.infoframe = *avi; 531 return 0; 532 } 533 534 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev, 535 bool hdmi_mode) 536 { 537 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 538 539 hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI; 540 return 0; 541 } 542 543 static const struct omapdss_hdmi_ops hdmi_ops = { 544 .connect = hdmi_connect, 545 .disconnect = hdmi_disconnect, 546 547 .enable = hdmi_display_enable, 548 .disable = hdmi_display_disable, 549 550 .check_timings = hdmi_display_check_timing, 551 .set_timings = hdmi_display_set_timing, 552 .get_timings = hdmi_display_get_timings, 553 554 .read_edid = hdmi_read_edid, 555 .set_infoframe = hdmi_set_infoframe, 556 .set_hdmi_mode = hdmi_set_hdmi_mode, 557 }; 558 559 static void hdmi_init_output(struct omap_hdmi *hdmi) 560 { 561 struct omap_dss_device *out = &hdmi->output; 562 563 out->dev = &hdmi->pdev->dev; 564 out->id = OMAP_DSS_OUTPUT_HDMI; 565 out->output_type = OMAP_DISPLAY_TYPE_HDMI; 566 out->name = "hdmi.0"; 567 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT; 568 out->ops.hdmi = &hdmi_ops; 569 out->owner = THIS_MODULE; 570 571 omapdss_register_output(out); 572 } 573 574 static void hdmi_uninit_output(struct omap_hdmi *hdmi) 575 { 576 struct omap_dss_device *out = &hdmi->output; 577 578 omapdss_unregister_output(out); 579 } 580 581 static int hdmi_probe_of(struct omap_hdmi *hdmi) 582 { 583 struct platform_device *pdev = hdmi->pdev; 584 struct device_node *node = pdev->dev.of_node; 585 struct device_node *ep; 586 int r; 587 588 ep = of_graph_get_endpoint_by_regs(node, 0, 0); 589 if (!ep) 590 return 0; 591 592 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy); 593 if (r) 594 goto err; 595 596 of_node_put(ep); 597 return 0; 598 599 err: 600 of_node_put(ep); 601 return r; 602 } 603 604 /* Audio callbacks */ 605 static int hdmi_audio_startup(struct device *dev, 606 void (*abort_cb)(struct device *dev)) 607 { 608 struct omap_hdmi *hd = dev_get_drvdata(dev); 609 610 mutex_lock(&hd->lock); 611 612 WARN_ON(hd->audio_abort_cb != NULL); 613 614 hd->audio_abort_cb = abort_cb; 615 616 mutex_unlock(&hd->lock); 617 618 return 0; 619 } 620 621 static int hdmi_audio_shutdown(struct device *dev) 622 { 623 struct omap_hdmi *hd = dev_get_drvdata(dev); 624 625 mutex_lock(&hd->lock); 626 hd->audio_abort_cb = NULL; 627 hd->audio_configured = false; 628 hd->audio_playing = false; 629 mutex_unlock(&hd->lock); 630 631 return 0; 632 } 633 634 static int hdmi_audio_start(struct device *dev) 635 { 636 struct omap_hdmi *hd = dev_get_drvdata(dev); 637 unsigned long flags; 638 639 spin_lock_irqsave(&hd->audio_playing_lock, flags); 640 641 if (hd->display_enabled) { 642 if (!hdmi_mode_has_audio(&hd->cfg)) 643 DSSERR("%s: Video mode does not support audio\n", 644 __func__); 645 hdmi_start_audio_stream(hd); 646 } 647 hd->audio_playing = true; 648 649 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 650 return 0; 651 } 652 653 static void hdmi_audio_stop(struct device *dev) 654 { 655 struct omap_hdmi *hd = dev_get_drvdata(dev); 656 unsigned long flags; 657 658 if (!hdmi_mode_has_audio(&hd->cfg)) 659 DSSERR("%s: Video mode does not support audio\n", __func__); 660 661 spin_lock_irqsave(&hd->audio_playing_lock, flags); 662 663 if (hd->display_enabled) 664 hdmi_stop_audio_stream(hd); 665 hd->audio_playing = false; 666 667 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 668 } 669 670 static int hdmi_audio_config(struct device *dev, 671 struct omap_dss_audio *dss_audio) 672 { 673 struct omap_hdmi *hd = dev_get_drvdata(dev); 674 int ret = 0; 675 676 mutex_lock(&hd->lock); 677 678 if (hd->display_enabled) { 679 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio, 680 hd->cfg.vm.pixelclock); 681 if (ret) 682 goto out; 683 } 684 685 hd->audio_configured = true; 686 hd->audio_config = *dss_audio; 687 out: 688 mutex_unlock(&hd->lock); 689 690 return ret; 691 } 692 693 static const struct omap_hdmi_audio_ops hdmi_audio_ops = { 694 .audio_startup = hdmi_audio_startup, 695 .audio_shutdown = hdmi_audio_shutdown, 696 .audio_start = hdmi_audio_start, 697 .audio_stop = hdmi_audio_stop, 698 .audio_config = hdmi_audio_config, 699 }; 700 701 static int hdmi_audio_register(struct omap_hdmi *hdmi) 702 { 703 struct omap_hdmi_audio_pdata pdata = { 704 .dev = &hdmi->pdev->dev, 705 .version = 5, 706 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp), 707 .ops = &hdmi_audio_ops, 708 }; 709 710 hdmi->audio_pdev = platform_device_register_data( 711 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO, 712 &pdata, sizeof(pdata)); 713 714 if (IS_ERR(hdmi->audio_pdev)) 715 return PTR_ERR(hdmi->audio_pdev); 716 717 hdmi_runtime_get(hdmi); 718 hdmi->wp_idlemode = 719 REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); 720 hdmi_runtime_put(hdmi); 721 722 return 0; 723 } 724 725 /* HDMI HW IP initialisation */ 726 static int hdmi5_bind(struct device *dev, struct device *master, void *data) 727 { 728 struct platform_device *pdev = to_platform_device(dev); 729 struct dss_device *dss = dss_get_device(master); 730 struct omap_hdmi *hdmi; 731 int r; 732 int irq; 733 734 hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL); 735 if (!hdmi) 736 return -ENOMEM; 737 738 hdmi->pdev = pdev; 739 hdmi->dss = dss; 740 dev_set_drvdata(&pdev->dev, hdmi); 741 742 mutex_init(&hdmi->lock); 743 spin_lock_init(&hdmi->audio_playing_lock); 744 745 r = hdmi_probe_of(hdmi); 746 if (r) 747 goto err_free; 748 749 r = hdmi_wp_init(pdev, &hdmi->wp, 5); 750 if (r) 751 goto err_free; 752 753 r = hdmi_pll_init(dss, pdev, &hdmi->pll, &hdmi->wp); 754 if (r) 755 goto err_free; 756 757 r = hdmi_phy_init(pdev, &hdmi->phy, 5); 758 if (r) 759 goto err_pll; 760 761 r = hdmi5_core_init(pdev, &hdmi->core); 762 if (r) 763 goto err_pll; 764 765 irq = platform_get_irq(pdev, 0); 766 if (irq < 0) { 767 DSSERR("platform_get_irq failed\n"); 768 r = -ENODEV; 769 goto err_pll; 770 } 771 772 r = devm_request_threaded_irq(&pdev->dev, irq, 773 NULL, hdmi_irq_handler, 774 IRQF_ONESHOT, "OMAP HDMI", hdmi); 775 if (r) { 776 DSSERR("HDMI IRQ request failed\n"); 777 goto err_pll; 778 } 779 780 pm_runtime_enable(&pdev->dev); 781 782 hdmi_init_output(hdmi); 783 784 r = hdmi_audio_register(hdmi); 785 if (r) { 786 DSSERR("Registering HDMI audio failed %d\n", r); 787 hdmi_uninit_output(hdmi); 788 pm_runtime_disable(&pdev->dev); 789 return r; 790 } 791 792 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs, 793 hdmi); 794 795 return 0; 796 797 err_pll: 798 hdmi_pll_uninit(&hdmi->pll); 799 err_free: 800 kfree(hdmi); 801 return r; 802 } 803 804 static void hdmi5_unbind(struct device *dev, struct device *master, void *data) 805 { 806 struct omap_hdmi *hdmi = dev_get_drvdata(dev); 807 808 dss_debugfs_remove_file(hdmi->debugfs); 809 810 if (hdmi->audio_pdev) 811 platform_device_unregister(hdmi->audio_pdev); 812 813 hdmi_uninit_output(hdmi); 814 815 hdmi_pll_uninit(&hdmi->pll); 816 817 pm_runtime_disable(dev); 818 819 kfree(hdmi); 820 } 821 822 static const struct component_ops hdmi5_component_ops = { 823 .bind = hdmi5_bind, 824 .unbind = hdmi5_unbind, 825 }; 826 827 static int hdmi5_probe(struct platform_device *pdev) 828 { 829 return component_add(&pdev->dev, &hdmi5_component_ops); 830 } 831 832 static int hdmi5_remove(struct platform_device *pdev) 833 { 834 component_del(&pdev->dev, &hdmi5_component_ops); 835 return 0; 836 } 837 838 static int hdmi_runtime_suspend(struct device *dev) 839 { 840 struct omap_hdmi *hdmi = dev_get_drvdata(dev); 841 842 dispc_runtime_put(hdmi->dss->dispc); 843 844 return 0; 845 } 846 847 static int hdmi_runtime_resume(struct device *dev) 848 { 849 struct omap_hdmi *hdmi = dev_get_drvdata(dev); 850 int r; 851 852 r = dispc_runtime_get(hdmi->dss->dispc); 853 if (r < 0) 854 return r; 855 856 return 0; 857 } 858 859 static const struct dev_pm_ops hdmi_pm_ops = { 860 .runtime_suspend = hdmi_runtime_suspend, 861 .runtime_resume = hdmi_runtime_resume, 862 }; 863 864 static const struct of_device_id hdmi_of_match[] = { 865 { .compatible = "ti,omap5-hdmi", }, 866 { .compatible = "ti,dra7-hdmi", }, 867 {}, 868 }; 869 870 struct platform_driver omapdss_hdmi5hw_driver = { 871 .probe = hdmi5_probe, 872 .remove = hdmi5_remove, 873 .driver = { 874 .name = "omapdss_hdmi5", 875 .pm = &hdmi_pm_ops, 876 .of_match_table = hdmi_of_match, 877 .suppress_bind_attrs = true, 878 }, 879 }; 880