1 /* 2 * HDMI driver for OMAP5 3 * 4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Authors: 7 * Yong Zhi 8 * Mythri pk 9 * Archit Taneja <archit@ti.com> 10 * Tomi Valkeinen <tomi.valkeinen@ti.com> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License version 2 as published by 14 * the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but WITHOUT 17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 19 * more details. 20 * 21 * You should have received a copy of the GNU General Public License along with 22 * this program. If not, see <http://www.gnu.org/licenses/>. 23 */ 24 25 #define DSS_SUBSYS_NAME "HDMI" 26 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/err.h> 30 #include <linux/io.h> 31 #include <linux/interrupt.h> 32 #include <linux/mutex.h> 33 #include <linux/delay.h> 34 #include <linux/string.h> 35 #include <linux/platform_device.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/clk.h> 38 #include <linux/gpio.h> 39 #include <linux/regulator/consumer.h> 40 #include <linux/component.h> 41 #include <linux/of.h> 42 #include <linux/of_graph.h> 43 #include <sound/omap-hdmi-audio.h> 44 45 #include "omapdss.h" 46 #include "hdmi5_core.h" 47 #include "dss.h" 48 49 static int hdmi_runtime_get(struct omap_hdmi *hdmi) 50 { 51 int r; 52 53 DSSDBG("hdmi_runtime_get\n"); 54 55 r = pm_runtime_get_sync(&hdmi->pdev->dev); 56 WARN_ON(r < 0); 57 if (r < 0) 58 return r; 59 60 return 0; 61 } 62 63 static void hdmi_runtime_put(struct omap_hdmi *hdmi) 64 { 65 int r; 66 67 DSSDBG("hdmi_runtime_put\n"); 68 69 r = pm_runtime_put_sync(&hdmi->pdev->dev); 70 WARN_ON(r < 0 && r != -ENOSYS); 71 } 72 73 static irqreturn_t hdmi_irq_handler(int irq, void *data) 74 { 75 struct omap_hdmi *hdmi = data; 76 struct hdmi_wp_data *wp = &hdmi->wp; 77 u32 irqstatus; 78 79 irqstatus = hdmi_wp_get_irqstatus(wp); 80 hdmi_wp_set_irqstatus(wp, irqstatus); 81 82 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) && 83 irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 84 u32 v; 85 /* 86 * If we get both connect and disconnect interrupts at the same 87 * time, turn off the PHY, clear interrupts, and restart, which 88 * raises connect interrupt if a cable is connected, or nothing 89 * if cable is not connected. 90 */ 91 92 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); 93 94 /* 95 * We always get bogus CONNECT & DISCONNECT interrupts when 96 * setting the PHY to LDOON. To ignore those, we force the RXDET 97 * line to 0 until the PHY power state has been changed. 98 */ 99 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL); 100 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ 101 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ 102 hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); 103 104 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | 105 HDMI_IRQ_LINK_DISCONNECT); 106 107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 108 109 REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); 110 111 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) { 112 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); 113 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 114 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 115 } 116 117 return IRQ_HANDLED; 118 } 119 120 static int hdmi_power_on_core(struct omap_hdmi *hdmi) 121 { 122 int r; 123 124 r = regulator_enable(hdmi->vdda_reg); 125 if (r) 126 return r; 127 128 r = hdmi_runtime_get(hdmi); 129 if (r) 130 goto err_runtime_get; 131 132 /* Make selection of HDMI in DSS */ 133 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK); 134 135 hdmi->core_enabled = true; 136 137 return 0; 138 139 err_runtime_get: 140 regulator_disable(hdmi->vdda_reg); 141 142 return r; 143 } 144 145 static void hdmi_power_off_core(struct omap_hdmi *hdmi) 146 { 147 hdmi->core_enabled = false; 148 149 hdmi_runtime_put(hdmi); 150 regulator_disable(hdmi->vdda_reg); 151 } 152 153 static int hdmi_power_on_full(struct omap_hdmi *hdmi) 154 { 155 int r; 156 const struct videomode *vm; 157 struct dss_pll_clock_info hdmi_cinfo = { 0 }; 158 unsigned int pc; 159 160 r = hdmi_power_on_core(hdmi); 161 if (r) 162 return r; 163 164 vm = &hdmi->cfg.vm; 165 166 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive, 167 vm->vactive); 168 169 pc = vm->pixelclock; 170 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) 171 pc *= 2; 172 173 /* DSS_HDMI_TCLK is bitclk / 10 */ 174 pc *= 10; 175 176 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin), 177 pc, &hdmi_cinfo); 178 179 /* disable and clear irqs */ 180 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); 181 hdmi_wp_set_irqstatus(&hdmi->wp, 182 hdmi_wp_get_irqstatus(&hdmi->wp)); 183 184 r = dss_pll_enable(&hdmi->pll.pll); 185 if (r) { 186 DSSERR("Failed to enable PLL\n"); 187 goto err_pll_enable; 188 } 189 190 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo); 191 if (r) { 192 DSSERR("Failed to configure PLL\n"); 193 goto err_pll_cfg; 194 } 195 196 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco, 197 hdmi_cinfo.clkout[0]); 198 if (r) { 199 DSSDBG("Failed to start PHY\n"); 200 goto err_phy_cfg; 201 } 202 203 r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON); 204 if (r) 205 goto err_phy_pwr; 206 207 hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg); 208 209 r = dss_mgr_enable(&hdmi->output); 210 if (r) 211 goto err_mgr_enable; 212 213 r = hdmi_wp_video_start(&hdmi->wp); 214 if (r) 215 goto err_vid_enable; 216 217 hdmi_wp_set_irqenable(&hdmi->wp, 218 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); 219 220 return 0; 221 222 err_vid_enable: 223 dss_mgr_disable(&hdmi->output); 224 err_mgr_enable: 225 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF); 226 err_phy_pwr: 227 err_phy_cfg: 228 err_pll_cfg: 229 dss_pll_disable(&hdmi->pll.pll); 230 err_pll_enable: 231 hdmi_power_off_core(hdmi); 232 return -EIO; 233 } 234 235 static void hdmi_power_off_full(struct omap_hdmi *hdmi) 236 { 237 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); 238 239 hdmi_wp_video_stop(&hdmi->wp); 240 241 dss_mgr_disable(&hdmi->output); 242 243 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF); 244 245 dss_pll_disable(&hdmi->pll.pll); 246 247 hdmi_power_off_core(hdmi); 248 } 249 250 static void hdmi_display_set_timings(struct omap_dss_device *dssdev, 251 const struct videomode *vm) 252 { 253 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 254 255 mutex_lock(&hdmi->lock); 256 257 hdmi->cfg.vm = *vm; 258 259 dispc_set_tv_pclk(hdmi->dss->dispc, vm->pixelclock); 260 261 mutex_unlock(&hdmi->lock); 262 } 263 264 static int hdmi_dump_regs(struct seq_file *s, void *p) 265 { 266 struct omap_hdmi *hdmi = s->private; 267 268 mutex_lock(&hdmi->lock); 269 270 if (hdmi_runtime_get(hdmi)) { 271 mutex_unlock(&hdmi->lock); 272 return 0; 273 } 274 275 hdmi_wp_dump(&hdmi->wp, s); 276 hdmi_pll_dump(&hdmi->pll, s); 277 hdmi_phy_dump(&hdmi->phy, s); 278 hdmi5_core_dump(&hdmi->core, s); 279 280 hdmi_runtime_put(hdmi); 281 mutex_unlock(&hdmi->lock); 282 return 0; 283 } 284 285 static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len) 286 { 287 int r; 288 int idlemode; 289 290 mutex_lock(&hdmi->lock); 291 292 r = hdmi_runtime_get(hdmi); 293 BUG_ON(r); 294 295 idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); 296 /* No-idle mode */ 297 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 298 299 r = hdmi5_read_edid(&hdmi->core, buf, len); 300 301 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); 302 303 hdmi_runtime_put(hdmi); 304 mutex_unlock(&hdmi->lock); 305 306 return r; 307 } 308 309 static void hdmi_start_audio_stream(struct omap_hdmi *hd) 310 { 311 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 312 hdmi_wp_audio_enable(&hd->wp, true); 313 hdmi_wp_audio_core_req_enable(&hd->wp, true); 314 } 315 316 static void hdmi_stop_audio_stream(struct omap_hdmi *hd) 317 { 318 hdmi_wp_audio_core_req_enable(&hd->wp, false); 319 hdmi_wp_audio_enable(&hd->wp, false); 320 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2); 321 } 322 323 static int hdmi_display_enable(struct omap_dss_device *dssdev) 324 { 325 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 326 unsigned long flags; 327 int r = 0; 328 329 DSSDBG("ENTER hdmi_display_enable\n"); 330 331 mutex_lock(&hdmi->lock); 332 333 if (!dssdev->dispc_channel_connected) { 334 DSSERR("failed to enable display: no output/manager\n"); 335 r = -ENODEV; 336 goto err0; 337 } 338 339 r = hdmi_power_on_full(hdmi); 340 if (r) { 341 DSSERR("failed to power on device\n"); 342 goto err0; 343 } 344 345 if (hdmi->audio_configured) { 346 r = hdmi5_audio_config(&hdmi->core, &hdmi->wp, 347 &hdmi->audio_config, 348 hdmi->cfg.vm.pixelclock); 349 if (r) { 350 DSSERR("Error restoring audio configuration: %d", r); 351 hdmi->audio_abort_cb(&hdmi->pdev->dev); 352 hdmi->audio_configured = false; 353 } 354 } 355 356 spin_lock_irqsave(&hdmi->audio_playing_lock, flags); 357 if (hdmi->audio_configured && hdmi->audio_playing) 358 hdmi_start_audio_stream(hdmi); 359 hdmi->display_enabled = true; 360 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags); 361 362 mutex_unlock(&hdmi->lock); 363 return 0; 364 365 err0: 366 mutex_unlock(&hdmi->lock); 367 return r; 368 } 369 370 static void hdmi_display_disable(struct omap_dss_device *dssdev) 371 { 372 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 373 unsigned long flags; 374 375 DSSDBG("Enter hdmi_display_disable\n"); 376 377 mutex_lock(&hdmi->lock); 378 379 spin_lock_irqsave(&hdmi->audio_playing_lock, flags); 380 hdmi_stop_audio_stream(hdmi); 381 hdmi->display_enabled = false; 382 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags); 383 384 hdmi_power_off_full(hdmi); 385 386 mutex_unlock(&hdmi->lock); 387 } 388 389 static int hdmi_core_enable(struct omap_hdmi *hdmi) 390 { 391 int r = 0; 392 393 DSSDBG("ENTER omapdss_hdmi_core_enable\n"); 394 395 mutex_lock(&hdmi->lock); 396 397 r = hdmi_power_on_core(hdmi); 398 if (r) { 399 DSSERR("failed to power on device\n"); 400 goto err0; 401 } 402 403 mutex_unlock(&hdmi->lock); 404 return 0; 405 406 err0: 407 mutex_unlock(&hdmi->lock); 408 return r; 409 } 410 411 static void hdmi_core_disable(struct omap_hdmi *hdmi) 412 { 413 DSSDBG("Enter omapdss_hdmi_core_disable\n"); 414 415 mutex_lock(&hdmi->lock); 416 417 hdmi_power_off_core(hdmi); 418 419 mutex_unlock(&hdmi->lock); 420 } 421 422 static int hdmi_connect(struct omap_dss_device *src, 423 struct omap_dss_device *dst) 424 { 425 int r; 426 427 r = omapdss_device_connect(dst->dss, dst, dst->next); 428 if (r) 429 return r; 430 431 dst->dispc_channel_connected = true; 432 return 0; 433 } 434 435 static void hdmi_disconnect(struct omap_dss_device *src, 436 struct omap_dss_device *dst) 437 { 438 dst->dispc_channel_connected = false; 439 440 omapdss_device_disconnect(dst, dst->next); 441 } 442 443 static int hdmi_read_edid(struct omap_dss_device *dssdev, 444 u8 *edid, int len) 445 { 446 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 447 bool need_enable; 448 int r; 449 450 need_enable = hdmi->core_enabled == false; 451 452 if (need_enable) { 453 r = hdmi_core_enable(hdmi); 454 if (r) 455 return r; 456 } 457 458 r = read_edid(hdmi, edid, len); 459 460 if (need_enable) 461 hdmi_core_disable(hdmi); 462 463 return r; 464 } 465 466 static int hdmi_set_infoframe(struct omap_dss_device *dssdev, 467 const struct hdmi_avi_infoframe *avi) 468 { 469 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 470 471 hdmi->cfg.infoframe = *avi; 472 return 0; 473 } 474 475 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev, 476 bool hdmi_mode) 477 { 478 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 479 480 hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI; 481 return 0; 482 } 483 484 static const struct omap_dss_device_ops hdmi_ops = { 485 .connect = hdmi_connect, 486 .disconnect = hdmi_disconnect, 487 488 .enable = hdmi_display_enable, 489 .disable = hdmi_display_disable, 490 491 .set_timings = hdmi_display_set_timings, 492 493 .read_edid = hdmi_read_edid, 494 495 .hdmi = { 496 .set_infoframe = hdmi_set_infoframe, 497 .set_hdmi_mode = hdmi_set_hdmi_mode, 498 }, 499 }; 500 501 /* ----------------------------------------------------------------------------- 502 * Audio Callbacks 503 */ 504 505 static int hdmi_audio_startup(struct device *dev, 506 void (*abort_cb)(struct device *dev)) 507 { 508 struct omap_hdmi *hd = dev_get_drvdata(dev); 509 510 mutex_lock(&hd->lock); 511 512 WARN_ON(hd->audio_abort_cb != NULL); 513 514 hd->audio_abort_cb = abort_cb; 515 516 mutex_unlock(&hd->lock); 517 518 return 0; 519 } 520 521 static int hdmi_audio_shutdown(struct device *dev) 522 { 523 struct omap_hdmi *hd = dev_get_drvdata(dev); 524 525 mutex_lock(&hd->lock); 526 hd->audio_abort_cb = NULL; 527 hd->audio_configured = false; 528 hd->audio_playing = false; 529 mutex_unlock(&hd->lock); 530 531 return 0; 532 } 533 534 static int hdmi_audio_start(struct device *dev) 535 { 536 struct omap_hdmi *hd = dev_get_drvdata(dev); 537 unsigned long flags; 538 539 spin_lock_irqsave(&hd->audio_playing_lock, flags); 540 541 if (hd->display_enabled) { 542 if (!hdmi_mode_has_audio(&hd->cfg)) 543 DSSERR("%s: Video mode does not support audio\n", 544 __func__); 545 hdmi_start_audio_stream(hd); 546 } 547 hd->audio_playing = true; 548 549 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 550 return 0; 551 } 552 553 static void hdmi_audio_stop(struct device *dev) 554 { 555 struct omap_hdmi *hd = dev_get_drvdata(dev); 556 unsigned long flags; 557 558 if (!hdmi_mode_has_audio(&hd->cfg)) 559 DSSERR("%s: Video mode does not support audio\n", __func__); 560 561 spin_lock_irqsave(&hd->audio_playing_lock, flags); 562 563 if (hd->display_enabled) 564 hdmi_stop_audio_stream(hd); 565 hd->audio_playing = false; 566 567 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 568 } 569 570 static int hdmi_audio_config(struct device *dev, 571 struct omap_dss_audio *dss_audio) 572 { 573 struct omap_hdmi *hd = dev_get_drvdata(dev); 574 int ret = 0; 575 576 mutex_lock(&hd->lock); 577 578 if (hd->display_enabled) { 579 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio, 580 hd->cfg.vm.pixelclock); 581 if (ret) 582 goto out; 583 } 584 585 hd->audio_configured = true; 586 hd->audio_config = *dss_audio; 587 out: 588 mutex_unlock(&hd->lock); 589 590 return ret; 591 } 592 593 static const struct omap_hdmi_audio_ops hdmi_audio_ops = { 594 .audio_startup = hdmi_audio_startup, 595 .audio_shutdown = hdmi_audio_shutdown, 596 .audio_start = hdmi_audio_start, 597 .audio_stop = hdmi_audio_stop, 598 .audio_config = hdmi_audio_config, 599 }; 600 601 static int hdmi_audio_register(struct omap_hdmi *hdmi) 602 { 603 struct omap_hdmi_audio_pdata pdata = { 604 .dev = &hdmi->pdev->dev, 605 .version = 5, 606 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp), 607 .ops = &hdmi_audio_ops, 608 }; 609 610 hdmi->audio_pdev = platform_device_register_data( 611 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO, 612 &pdata, sizeof(pdata)); 613 614 if (IS_ERR(hdmi->audio_pdev)) 615 return PTR_ERR(hdmi->audio_pdev); 616 617 hdmi_runtime_get(hdmi); 618 hdmi->wp_idlemode = 619 REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); 620 hdmi_runtime_put(hdmi); 621 622 return 0; 623 } 624 625 /* ----------------------------------------------------------------------------- 626 * Component Bind & Unbind 627 */ 628 629 static int hdmi5_bind(struct device *dev, struct device *master, void *data) 630 { 631 struct dss_device *dss = dss_get_device(master); 632 struct omap_hdmi *hdmi = dev_get_drvdata(dev); 633 int r; 634 635 hdmi->dss = dss; 636 637 r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp); 638 if (r) 639 return r; 640 641 r = hdmi_audio_register(hdmi); 642 if (r) { 643 DSSERR("Registering HDMI audio failed %d\n", r); 644 goto err_pll_uninit; 645 } 646 647 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs, 648 hdmi); 649 650 return 0; 651 652 err_pll_uninit: 653 hdmi_pll_uninit(&hdmi->pll); 654 return r; 655 } 656 657 static void hdmi5_unbind(struct device *dev, struct device *master, void *data) 658 { 659 struct omap_hdmi *hdmi = dev_get_drvdata(dev); 660 661 dss_debugfs_remove_file(hdmi->debugfs); 662 663 if (hdmi->audio_pdev) 664 platform_device_unregister(hdmi->audio_pdev); 665 666 hdmi_pll_uninit(&hdmi->pll); 667 } 668 669 static const struct component_ops hdmi5_component_ops = { 670 .bind = hdmi5_bind, 671 .unbind = hdmi5_unbind, 672 }; 673 674 /* ----------------------------------------------------------------------------- 675 * Probe & Remove, Suspend & Resume 676 */ 677 678 static int hdmi5_init_output(struct omap_hdmi *hdmi) 679 { 680 struct omap_dss_device *out = &hdmi->output; 681 int r; 682 683 out->dev = &hdmi->pdev->dev; 684 out->id = OMAP_DSS_OUTPUT_HDMI; 685 out->output_type = OMAP_DISPLAY_TYPE_HDMI; 686 out->name = "hdmi.0"; 687 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT; 688 out->ops = &hdmi_ops; 689 out->owner = THIS_MODULE; 690 out->of_ports = BIT(0); 691 out->ops_flags = OMAP_DSS_DEVICE_OP_EDID; 692 693 out->next = omapdss_of_find_connected_device(out->dev->of_node, 0); 694 if (IS_ERR(out->next)) { 695 if (PTR_ERR(out->next) != -EPROBE_DEFER) 696 dev_err(out->dev, "failed to find video sink\n"); 697 return PTR_ERR(out->next); 698 } 699 700 r = omapdss_output_validate(out); 701 if (r) { 702 omapdss_device_put(out->next); 703 out->next = NULL; 704 return r; 705 } 706 707 omapdss_device_register(out); 708 709 return 0; 710 } 711 712 static void hdmi5_uninit_output(struct omap_hdmi *hdmi) 713 { 714 struct omap_dss_device *out = &hdmi->output; 715 716 if (out->next) 717 omapdss_device_put(out->next); 718 omapdss_device_unregister(out); 719 } 720 721 static int hdmi5_probe_of(struct omap_hdmi *hdmi) 722 { 723 struct platform_device *pdev = hdmi->pdev; 724 struct device_node *node = pdev->dev.of_node; 725 struct device_node *ep; 726 int r; 727 728 ep = of_graph_get_endpoint_by_regs(node, 0, 0); 729 if (!ep) 730 return 0; 731 732 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy); 733 of_node_put(ep); 734 return r; 735 } 736 737 static int hdmi5_probe(struct platform_device *pdev) 738 { 739 struct omap_hdmi *hdmi; 740 int irq; 741 int r; 742 743 hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL); 744 if (!hdmi) 745 return -ENOMEM; 746 747 hdmi->pdev = pdev; 748 749 dev_set_drvdata(&pdev->dev, hdmi); 750 751 mutex_init(&hdmi->lock); 752 spin_lock_init(&hdmi->audio_playing_lock); 753 754 r = hdmi5_probe_of(hdmi); 755 if (r) 756 goto err_free; 757 758 r = hdmi_wp_init(pdev, &hdmi->wp, 5); 759 if (r) 760 goto err_free; 761 762 r = hdmi_phy_init(pdev, &hdmi->phy, 5); 763 if (r) 764 goto err_free; 765 766 r = hdmi5_core_init(pdev, &hdmi->core); 767 if (r) 768 goto err_free; 769 770 irq = platform_get_irq(pdev, 0); 771 if (irq < 0) { 772 DSSERR("platform_get_irq failed\n"); 773 r = -ENODEV; 774 goto err_free; 775 } 776 777 r = devm_request_threaded_irq(&pdev->dev, irq, 778 NULL, hdmi_irq_handler, 779 IRQF_ONESHOT, "OMAP HDMI", hdmi); 780 if (r) { 781 DSSERR("HDMI IRQ request failed\n"); 782 goto err_free; 783 } 784 785 hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda"); 786 if (IS_ERR(hdmi->vdda_reg)) { 787 r = PTR_ERR(hdmi->vdda_reg); 788 if (r != -EPROBE_DEFER) 789 DSSERR("can't get VDDA regulator\n"); 790 goto err_free; 791 } 792 793 pm_runtime_enable(&pdev->dev); 794 795 r = hdmi5_init_output(hdmi); 796 if (r) 797 goto err_pm_disable; 798 799 r = component_add(&pdev->dev, &hdmi5_component_ops); 800 if (r) 801 goto err_uninit_output; 802 803 return 0; 804 805 err_uninit_output: 806 hdmi5_uninit_output(hdmi); 807 err_pm_disable: 808 pm_runtime_disable(&pdev->dev); 809 err_free: 810 kfree(hdmi); 811 return r; 812 } 813 814 static int hdmi5_remove(struct platform_device *pdev) 815 { 816 struct omap_hdmi *hdmi = platform_get_drvdata(pdev); 817 818 component_del(&pdev->dev, &hdmi5_component_ops); 819 820 hdmi5_uninit_output(hdmi); 821 822 pm_runtime_disable(&pdev->dev); 823 824 kfree(hdmi); 825 return 0; 826 } 827 828 static const struct of_device_id hdmi_of_match[] = { 829 { .compatible = "ti,omap5-hdmi", }, 830 { .compatible = "ti,dra7-hdmi", }, 831 {}, 832 }; 833 834 struct platform_driver omapdss_hdmi5hw_driver = { 835 .probe = hdmi5_probe, 836 .remove = hdmi5_remove, 837 .driver = { 838 .name = "omapdss_hdmi5", 839 .of_match_table = hdmi_of_match, 840 .suppress_bind_attrs = true, 841 }, 842 }; 843