1 /* 2 * HDMI driver for OMAP5 3 * 4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Authors: 7 * Yong Zhi 8 * Mythri pk 9 * Archit Taneja <archit@ti.com> 10 * Tomi Valkeinen <tomi.valkeinen@ti.com> 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License version 2 as published by 14 * the Free Software Foundation. 15 * 16 * This program is distributed in the hope that it will be useful, but WITHOUT 17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 19 * more details. 20 * 21 * You should have received a copy of the GNU General Public License along with 22 * this program. If not, see <http://www.gnu.org/licenses/>. 23 */ 24 25 #define DSS_SUBSYS_NAME "HDMI" 26 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/err.h> 30 #include <linux/io.h> 31 #include <linux/interrupt.h> 32 #include <linux/mutex.h> 33 #include <linux/delay.h> 34 #include <linux/string.h> 35 #include <linux/platform_device.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/clk.h> 38 #include <linux/gpio.h> 39 #include <linux/regulator/consumer.h> 40 #include <linux/component.h> 41 #include <linux/of.h> 42 #include <linux/of_graph.h> 43 #include <sound/omap-hdmi-audio.h> 44 45 #include "omapdss.h" 46 #include "hdmi5_core.h" 47 #include "dss.h" 48 49 static int hdmi_runtime_get(struct omap_hdmi *hdmi) 50 { 51 int r; 52 53 DSSDBG("hdmi_runtime_get\n"); 54 55 r = pm_runtime_get_sync(&hdmi->pdev->dev); 56 WARN_ON(r < 0); 57 if (r < 0) 58 return r; 59 60 return 0; 61 } 62 63 static void hdmi_runtime_put(struct omap_hdmi *hdmi) 64 { 65 int r; 66 67 DSSDBG("hdmi_runtime_put\n"); 68 69 r = pm_runtime_put_sync(&hdmi->pdev->dev); 70 WARN_ON(r < 0 && r != -ENOSYS); 71 } 72 73 static irqreturn_t hdmi_irq_handler(int irq, void *data) 74 { 75 struct omap_hdmi *hdmi = data; 76 struct hdmi_wp_data *wp = &hdmi->wp; 77 u32 irqstatus; 78 79 irqstatus = hdmi_wp_get_irqstatus(wp); 80 hdmi_wp_set_irqstatus(wp, irqstatus); 81 82 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) && 83 irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 84 u32 v; 85 /* 86 * If we get both connect and disconnect interrupts at the same 87 * time, turn off the PHY, clear interrupts, and restart, which 88 * raises connect interrupt if a cable is connected, or nothing 89 * if cable is not connected. 90 */ 91 92 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); 93 94 /* 95 * We always get bogus CONNECT & DISCONNECT interrupts when 96 * setting the PHY to LDOON. To ignore those, we force the RXDET 97 * line to 0 until the PHY power state has been changed. 98 */ 99 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL); 100 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ 101 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ 102 hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); 103 104 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | 105 HDMI_IRQ_LINK_DISCONNECT); 106 107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 108 109 REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); 110 111 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) { 112 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); 113 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) { 114 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); 115 } 116 117 return IRQ_HANDLED; 118 } 119 120 static int hdmi_power_on_core(struct omap_hdmi *hdmi) 121 { 122 int r; 123 124 r = regulator_enable(hdmi->vdda_reg); 125 if (r) 126 return r; 127 128 r = hdmi_runtime_get(hdmi); 129 if (r) 130 goto err_runtime_get; 131 132 /* Make selection of HDMI in DSS */ 133 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK); 134 135 hdmi->core_enabled = true; 136 137 return 0; 138 139 err_runtime_get: 140 regulator_disable(hdmi->vdda_reg); 141 142 return r; 143 } 144 145 static void hdmi_power_off_core(struct omap_hdmi *hdmi) 146 { 147 hdmi->core_enabled = false; 148 149 hdmi_runtime_put(hdmi); 150 regulator_disable(hdmi->vdda_reg); 151 } 152 153 static int hdmi_power_on_full(struct omap_hdmi *hdmi) 154 { 155 int r; 156 const struct videomode *vm; 157 struct dss_pll_clock_info hdmi_cinfo = { 0 }; 158 unsigned int pc; 159 160 r = hdmi_power_on_core(hdmi); 161 if (r) 162 return r; 163 164 vm = &hdmi->cfg.vm; 165 166 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive, 167 vm->vactive); 168 169 pc = vm->pixelclock; 170 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) 171 pc *= 2; 172 173 /* DSS_HDMI_TCLK is bitclk / 10 */ 174 pc *= 10; 175 176 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin), 177 pc, &hdmi_cinfo); 178 179 /* disable and clear irqs */ 180 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); 181 hdmi_wp_set_irqstatus(&hdmi->wp, 182 hdmi_wp_get_irqstatus(&hdmi->wp)); 183 184 r = dss_pll_enable(&hdmi->pll.pll); 185 if (r) { 186 DSSERR("Failed to enable PLL\n"); 187 goto err_pll_enable; 188 } 189 190 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo); 191 if (r) { 192 DSSERR("Failed to configure PLL\n"); 193 goto err_pll_cfg; 194 } 195 196 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco, 197 hdmi_cinfo.clkout[0]); 198 if (r) { 199 DSSDBG("Failed to start PHY\n"); 200 goto err_phy_cfg; 201 } 202 203 r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON); 204 if (r) 205 goto err_phy_pwr; 206 207 hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg); 208 209 r = dss_mgr_enable(&hdmi->output); 210 if (r) 211 goto err_mgr_enable; 212 213 r = hdmi_wp_video_start(&hdmi->wp); 214 if (r) 215 goto err_vid_enable; 216 217 hdmi_wp_set_irqenable(&hdmi->wp, 218 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT); 219 220 return 0; 221 222 err_vid_enable: 223 dss_mgr_disable(&hdmi->output); 224 err_mgr_enable: 225 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF); 226 err_phy_pwr: 227 err_phy_cfg: 228 err_pll_cfg: 229 dss_pll_disable(&hdmi->pll.pll); 230 err_pll_enable: 231 hdmi_power_off_core(hdmi); 232 return -EIO; 233 } 234 235 static void hdmi_power_off_full(struct omap_hdmi *hdmi) 236 { 237 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); 238 239 hdmi_wp_video_stop(&hdmi->wp); 240 241 dss_mgr_disable(&hdmi->output); 242 243 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF); 244 245 dss_pll_disable(&hdmi->pll.pll); 246 247 hdmi_power_off_core(hdmi); 248 } 249 250 static void hdmi_display_set_timings(struct omap_dss_device *dssdev, 251 const struct drm_display_mode *mode) 252 { 253 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 254 255 mutex_lock(&hdmi->lock); 256 257 drm_display_mode_to_videomode(mode, &hdmi->cfg.vm); 258 259 dispc_set_tv_pclk(hdmi->dss->dispc, mode->clock * 1000); 260 261 mutex_unlock(&hdmi->lock); 262 } 263 264 static int hdmi_dump_regs(struct seq_file *s, void *p) 265 { 266 struct omap_hdmi *hdmi = s->private; 267 268 mutex_lock(&hdmi->lock); 269 270 if (hdmi_runtime_get(hdmi)) { 271 mutex_unlock(&hdmi->lock); 272 return 0; 273 } 274 275 hdmi_wp_dump(&hdmi->wp, s); 276 hdmi_pll_dump(&hdmi->pll, s); 277 hdmi_phy_dump(&hdmi->phy, s); 278 hdmi5_core_dump(&hdmi->core, s); 279 280 hdmi_runtime_put(hdmi); 281 mutex_unlock(&hdmi->lock); 282 return 0; 283 } 284 285 static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len) 286 { 287 int r; 288 int idlemode; 289 290 mutex_lock(&hdmi->lock); 291 292 r = hdmi_runtime_get(hdmi); 293 BUG_ON(r); 294 295 idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); 296 /* No-idle mode */ 297 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 298 299 r = hdmi5_read_edid(&hdmi->core, buf, len); 300 301 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); 302 303 hdmi_runtime_put(hdmi); 304 mutex_unlock(&hdmi->lock); 305 306 return r; 307 } 308 309 static void hdmi_start_audio_stream(struct omap_hdmi *hd) 310 { 311 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); 312 hdmi_wp_audio_enable(&hd->wp, true); 313 hdmi_wp_audio_core_req_enable(&hd->wp, true); 314 } 315 316 static void hdmi_stop_audio_stream(struct omap_hdmi *hd) 317 { 318 hdmi_wp_audio_core_req_enable(&hd->wp, false); 319 hdmi_wp_audio_enable(&hd->wp, false); 320 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2); 321 } 322 323 static void hdmi_display_enable(struct omap_dss_device *dssdev) 324 { 325 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 326 unsigned long flags; 327 int r; 328 329 DSSDBG("ENTER hdmi_display_enable\n"); 330 331 mutex_lock(&hdmi->lock); 332 333 r = hdmi_power_on_full(hdmi); 334 if (r) { 335 DSSERR("failed to power on device\n"); 336 goto done; 337 } 338 339 if (hdmi->audio_configured) { 340 r = hdmi5_audio_config(&hdmi->core, &hdmi->wp, 341 &hdmi->audio_config, 342 hdmi->cfg.vm.pixelclock); 343 if (r) { 344 DSSERR("Error restoring audio configuration: %d", r); 345 hdmi->audio_abort_cb(&hdmi->pdev->dev); 346 hdmi->audio_configured = false; 347 } 348 } 349 350 spin_lock_irqsave(&hdmi->audio_playing_lock, flags); 351 if (hdmi->audio_configured && hdmi->audio_playing) 352 hdmi_start_audio_stream(hdmi); 353 hdmi->display_enabled = true; 354 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags); 355 356 done: 357 mutex_unlock(&hdmi->lock); 358 } 359 360 static void hdmi_display_disable(struct omap_dss_device *dssdev) 361 { 362 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 363 unsigned long flags; 364 365 DSSDBG("Enter hdmi_display_disable\n"); 366 367 mutex_lock(&hdmi->lock); 368 369 spin_lock_irqsave(&hdmi->audio_playing_lock, flags); 370 hdmi_stop_audio_stream(hdmi); 371 hdmi->display_enabled = false; 372 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags); 373 374 hdmi_power_off_full(hdmi); 375 376 mutex_unlock(&hdmi->lock); 377 } 378 379 static int hdmi_core_enable(struct omap_hdmi *hdmi) 380 { 381 int r = 0; 382 383 DSSDBG("ENTER omapdss_hdmi_core_enable\n"); 384 385 mutex_lock(&hdmi->lock); 386 387 r = hdmi_power_on_core(hdmi); 388 if (r) { 389 DSSERR("failed to power on device\n"); 390 goto err0; 391 } 392 393 mutex_unlock(&hdmi->lock); 394 return 0; 395 396 err0: 397 mutex_unlock(&hdmi->lock); 398 return r; 399 } 400 401 static void hdmi_core_disable(struct omap_hdmi *hdmi) 402 { 403 DSSDBG("Enter omapdss_hdmi_core_disable\n"); 404 405 mutex_lock(&hdmi->lock); 406 407 hdmi_power_off_core(hdmi); 408 409 mutex_unlock(&hdmi->lock); 410 } 411 412 static int hdmi_connect(struct omap_dss_device *src, 413 struct omap_dss_device *dst) 414 { 415 return omapdss_device_connect(dst->dss, dst, dst->next); 416 } 417 418 static void hdmi_disconnect(struct omap_dss_device *src, 419 struct omap_dss_device *dst) 420 { 421 omapdss_device_disconnect(dst, dst->next); 422 } 423 424 static int hdmi_read_edid(struct omap_dss_device *dssdev, 425 u8 *edid, int len) 426 { 427 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 428 bool need_enable; 429 int r; 430 431 need_enable = hdmi->core_enabled == false; 432 433 if (need_enable) { 434 r = hdmi_core_enable(hdmi); 435 if (r) 436 return r; 437 } 438 439 r = read_edid(hdmi, edid, len); 440 441 if (need_enable) 442 hdmi_core_disable(hdmi); 443 444 return r; 445 } 446 447 static int hdmi_set_infoframe(struct omap_dss_device *dssdev, 448 const struct hdmi_avi_infoframe *avi) 449 { 450 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 451 452 hdmi->cfg.infoframe = *avi; 453 return 0; 454 } 455 456 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev, 457 bool hdmi_mode) 458 { 459 struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); 460 461 hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI; 462 return 0; 463 } 464 465 static const struct omap_dss_device_ops hdmi_ops = { 466 .connect = hdmi_connect, 467 .disconnect = hdmi_disconnect, 468 469 .enable = hdmi_display_enable, 470 .disable = hdmi_display_disable, 471 472 .set_timings = hdmi_display_set_timings, 473 474 .read_edid = hdmi_read_edid, 475 476 .hdmi = { 477 .set_infoframe = hdmi_set_infoframe, 478 .set_hdmi_mode = hdmi_set_hdmi_mode, 479 }, 480 }; 481 482 /* ----------------------------------------------------------------------------- 483 * Audio Callbacks 484 */ 485 486 static int hdmi_audio_startup(struct device *dev, 487 void (*abort_cb)(struct device *dev)) 488 { 489 struct omap_hdmi *hd = dev_get_drvdata(dev); 490 491 mutex_lock(&hd->lock); 492 493 WARN_ON(hd->audio_abort_cb != NULL); 494 495 hd->audio_abort_cb = abort_cb; 496 497 mutex_unlock(&hd->lock); 498 499 return 0; 500 } 501 502 static int hdmi_audio_shutdown(struct device *dev) 503 { 504 struct omap_hdmi *hd = dev_get_drvdata(dev); 505 506 mutex_lock(&hd->lock); 507 hd->audio_abort_cb = NULL; 508 hd->audio_configured = false; 509 hd->audio_playing = false; 510 mutex_unlock(&hd->lock); 511 512 return 0; 513 } 514 515 static int hdmi_audio_start(struct device *dev) 516 { 517 struct omap_hdmi *hd = dev_get_drvdata(dev); 518 unsigned long flags; 519 520 spin_lock_irqsave(&hd->audio_playing_lock, flags); 521 522 if (hd->display_enabled) { 523 if (!hdmi_mode_has_audio(&hd->cfg)) 524 DSSERR("%s: Video mode does not support audio\n", 525 __func__); 526 hdmi_start_audio_stream(hd); 527 } 528 hd->audio_playing = true; 529 530 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 531 return 0; 532 } 533 534 static void hdmi_audio_stop(struct device *dev) 535 { 536 struct omap_hdmi *hd = dev_get_drvdata(dev); 537 unsigned long flags; 538 539 if (!hdmi_mode_has_audio(&hd->cfg)) 540 DSSERR("%s: Video mode does not support audio\n", __func__); 541 542 spin_lock_irqsave(&hd->audio_playing_lock, flags); 543 544 if (hd->display_enabled) 545 hdmi_stop_audio_stream(hd); 546 hd->audio_playing = false; 547 548 spin_unlock_irqrestore(&hd->audio_playing_lock, flags); 549 } 550 551 static int hdmi_audio_config(struct device *dev, 552 struct omap_dss_audio *dss_audio) 553 { 554 struct omap_hdmi *hd = dev_get_drvdata(dev); 555 int ret = 0; 556 557 mutex_lock(&hd->lock); 558 559 if (hd->display_enabled) { 560 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio, 561 hd->cfg.vm.pixelclock); 562 if (ret) 563 goto out; 564 } 565 566 hd->audio_configured = true; 567 hd->audio_config = *dss_audio; 568 out: 569 mutex_unlock(&hd->lock); 570 571 return ret; 572 } 573 574 static const struct omap_hdmi_audio_ops hdmi_audio_ops = { 575 .audio_startup = hdmi_audio_startup, 576 .audio_shutdown = hdmi_audio_shutdown, 577 .audio_start = hdmi_audio_start, 578 .audio_stop = hdmi_audio_stop, 579 .audio_config = hdmi_audio_config, 580 }; 581 582 static int hdmi_audio_register(struct omap_hdmi *hdmi) 583 { 584 struct omap_hdmi_audio_pdata pdata = { 585 .dev = &hdmi->pdev->dev, 586 .version = 5, 587 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp), 588 .ops = &hdmi_audio_ops, 589 }; 590 591 hdmi->audio_pdev = platform_device_register_data( 592 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO, 593 &pdata, sizeof(pdata)); 594 595 if (IS_ERR(hdmi->audio_pdev)) 596 return PTR_ERR(hdmi->audio_pdev); 597 598 hdmi_runtime_get(hdmi); 599 hdmi->wp_idlemode = 600 REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); 601 hdmi_runtime_put(hdmi); 602 603 return 0; 604 } 605 606 /* ----------------------------------------------------------------------------- 607 * Component Bind & Unbind 608 */ 609 610 static int hdmi5_bind(struct device *dev, struct device *master, void *data) 611 { 612 struct dss_device *dss = dss_get_device(master); 613 struct omap_hdmi *hdmi = dev_get_drvdata(dev); 614 int r; 615 616 hdmi->dss = dss; 617 618 r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp); 619 if (r) 620 return r; 621 622 r = hdmi_audio_register(hdmi); 623 if (r) { 624 DSSERR("Registering HDMI audio failed %d\n", r); 625 goto err_pll_uninit; 626 } 627 628 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs, 629 hdmi); 630 631 return 0; 632 633 err_pll_uninit: 634 hdmi_pll_uninit(&hdmi->pll); 635 return r; 636 } 637 638 static void hdmi5_unbind(struct device *dev, struct device *master, void *data) 639 { 640 struct omap_hdmi *hdmi = dev_get_drvdata(dev); 641 642 dss_debugfs_remove_file(hdmi->debugfs); 643 644 if (hdmi->audio_pdev) 645 platform_device_unregister(hdmi->audio_pdev); 646 647 hdmi_pll_uninit(&hdmi->pll); 648 } 649 650 static const struct component_ops hdmi5_component_ops = { 651 .bind = hdmi5_bind, 652 .unbind = hdmi5_unbind, 653 }; 654 655 /* ----------------------------------------------------------------------------- 656 * Probe & Remove, Suspend & Resume 657 */ 658 659 static int hdmi5_init_output(struct omap_hdmi *hdmi) 660 { 661 struct omap_dss_device *out = &hdmi->output; 662 int r; 663 664 out->dev = &hdmi->pdev->dev; 665 out->id = OMAP_DSS_OUTPUT_HDMI; 666 out->type = OMAP_DISPLAY_TYPE_HDMI; 667 out->name = "hdmi.0"; 668 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT; 669 out->ops = &hdmi_ops; 670 out->owner = THIS_MODULE; 671 out->of_ports = BIT(0); 672 out->ops_flags = OMAP_DSS_DEVICE_OP_EDID; 673 674 r = omapdss_device_init_output(out); 675 if (r < 0) 676 return r; 677 678 omapdss_device_register(out); 679 680 return 0; 681 } 682 683 static void hdmi5_uninit_output(struct omap_hdmi *hdmi) 684 { 685 struct omap_dss_device *out = &hdmi->output; 686 687 omapdss_device_unregister(out); 688 omapdss_device_cleanup_output(out); 689 } 690 691 static int hdmi5_probe_of(struct omap_hdmi *hdmi) 692 { 693 struct platform_device *pdev = hdmi->pdev; 694 struct device_node *node = pdev->dev.of_node; 695 struct device_node *ep; 696 int r; 697 698 ep = of_graph_get_endpoint_by_regs(node, 0, 0); 699 if (!ep) 700 return 0; 701 702 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy); 703 of_node_put(ep); 704 return r; 705 } 706 707 static int hdmi5_probe(struct platform_device *pdev) 708 { 709 struct omap_hdmi *hdmi; 710 int irq; 711 int r; 712 713 hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL); 714 if (!hdmi) 715 return -ENOMEM; 716 717 hdmi->pdev = pdev; 718 719 dev_set_drvdata(&pdev->dev, hdmi); 720 721 mutex_init(&hdmi->lock); 722 spin_lock_init(&hdmi->audio_playing_lock); 723 724 r = hdmi5_probe_of(hdmi); 725 if (r) 726 goto err_free; 727 728 r = hdmi_wp_init(pdev, &hdmi->wp, 5); 729 if (r) 730 goto err_free; 731 732 r = hdmi_phy_init(pdev, &hdmi->phy, 5); 733 if (r) 734 goto err_free; 735 736 r = hdmi5_core_init(pdev, &hdmi->core); 737 if (r) 738 goto err_free; 739 740 irq = platform_get_irq(pdev, 0); 741 if (irq < 0) { 742 DSSERR("platform_get_irq failed\n"); 743 r = -ENODEV; 744 goto err_free; 745 } 746 747 r = devm_request_threaded_irq(&pdev->dev, irq, 748 NULL, hdmi_irq_handler, 749 IRQF_ONESHOT, "OMAP HDMI", hdmi); 750 if (r) { 751 DSSERR("HDMI IRQ request failed\n"); 752 goto err_free; 753 } 754 755 hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda"); 756 if (IS_ERR(hdmi->vdda_reg)) { 757 r = PTR_ERR(hdmi->vdda_reg); 758 if (r != -EPROBE_DEFER) 759 DSSERR("can't get VDDA regulator\n"); 760 goto err_free; 761 } 762 763 pm_runtime_enable(&pdev->dev); 764 765 r = hdmi5_init_output(hdmi); 766 if (r) 767 goto err_pm_disable; 768 769 r = component_add(&pdev->dev, &hdmi5_component_ops); 770 if (r) 771 goto err_uninit_output; 772 773 return 0; 774 775 err_uninit_output: 776 hdmi5_uninit_output(hdmi); 777 err_pm_disable: 778 pm_runtime_disable(&pdev->dev); 779 err_free: 780 kfree(hdmi); 781 return r; 782 } 783 784 static int hdmi5_remove(struct platform_device *pdev) 785 { 786 struct omap_hdmi *hdmi = platform_get_drvdata(pdev); 787 788 component_del(&pdev->dev, &hdmi5_component_ops); 789 790 hdmi5_uninit_output(hdmi); 791 792 pm_runtime_disable(&pdev->dev); 793 794 kfree(hdmi); 795 return 0; 796 } 797 798 static const struct of_device_id hdmi_of_match[] = { 799 { .compatible = "ti,omap5-hdmi", }, 800 { .compatible = "ti,dra7-hdmi", }, 801 {}, 802 }; 803 804 struct platform_driver omapdss_hdmi5hw_driver = { 805 .probe = hdmi5_probe, 806 .remove = hdmi5_remove, 807 .driver = { 808 .name = "omapdss_hdmi5", 809 .of_match_table = hdmi_of_match, 810 .suppress_bind_attrs = true, 811 }, 812 }; 813