xref: /openbmc/linux/drivers/gpu/drm/omapdrm/dss/hdmi4.c (revision 3805e6a1)
1 /*
2  * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
3  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
4  * Authors: Yong Zhi
5  *	Mythri pk <mythripk@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #define DSS_SUBSYS_NAME "HDMI"
21 
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/err.h>
25 #include <linux/io.h>
26 #include <linux/interrupt.h>
27 #include <linux/mutex.h>
28 #include <linux/delay.h>
29 #include <linux/string.h>
30 #include <linux/platform_device.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/clk.h>
33 #include <linux/gpio.h>
34 #include <linux/regulator/consumer.h>
35 #include <linux/component.h>
36 #include <video/omapdss.h>
37 #include <sound/omap-hdmi-audio.h>
38 
39 #include "hdmi4_core.h"
40 #include "dss.h"
41 #include "dss_features.h"
42 #include "hdmi.h"
43 
44 static struct omap_hdmi hdmi;
45 
46 static int hdmi_runtime_get(void)
47 {
48 	int r;
49 
50 	DSSDBG("hdmi_runtime_get\n");
51 
52 	r = pm_runtime_get_sync(&hdmi.pdev->dev);
53 	WARN_ON(r < 0);
54 	if (r < 0)
55 		return r;
56 
57 	return 0;
58 }
59 
60 static void hdmi_runtime_put(void)
61 {
62 	int r;
63 
64 	DSSDBG("hdmi_runtime_put\n");
65 
66 	r = pm_runtime_put_sync(&hdmi.pdev->dev);
67 	WARN_ON(r < 0 && r != -ENOSYS);
68 }
69 
70 static irqreturn_t hdmi_irq_handler(int irq, void *data)
71 {
72 	struct hdmi_wp_data *wp = data;
73 	u32 irqstatus;
74 
75 	irqstatus = hdmi_wp_get_irqstatus(wp);
76 	hdmi_wp_set_irqstatus(wp, irqstatus);
77 
78 	if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
79 			irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
80 		/*
81 		 * If we get both connect and disconnect interrupts at the same
82 		 * time, turn off the PHY, clear interrupts, and restart, which
83 		 * raises connect interrupt if a cable is connected, or nothing
84 		 * if cable is not connected.
85 		 */
86 		hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
87 
88 		hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
89 				HDMI_IRQ_LINK_DISCONNECT);
90 
91 		hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
92 	} else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
93 		hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
94 	} else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
95 		hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
96 	}
97 
98 	return IRQ_HANDLED;
99 }
100 
101 static int hdmi_init_regulator(void)
102 {
103 	int r;
104 	struct regulator *reg;
105 
106 	if (hdmi.vdda_reg != NULL)
107 		return 0;
108 
109 	reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
110 
111 	if (IS_ERR(reg)) {
112 		if (PTR_ERR(reg) != -EPROBE_DEFER)
113 			DSSERR("can't get VDDA regulator\n");
114 		return PTR_ERR(reg);
115 	}
116 
117 	if (regulator_can_change_voltage(reg)) {
118 		r = regulator_set_voltage(reg, 1800000, 1800000);
119 		if (r) {
120 			devm_regulator_put(reg);
121 			DSSWARN("can't set the regulator voltage\n");
122 			return r;
123 		}
124 	}
125 
126 	hdmi.vdda_reg = reg;
127 
128 	return 0;
129 }
130 
131 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
132 {
133 	int r;
134 
135 	r = regulator_enable(hdmi.vdda_reg);
136 	if (r)
137 		return r;
138 
139 	r = hdmi_runtime_get();
140 	if (r)
141 		goto err_runtime_get;
142 
143 	/* Make selection of HDMI in DSS */
144 	dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
145 
146 	hdmi.core_enabled = true;
147 
148 	return 0;
149 
150 err_runtime_get:
151 	regulator_disable(hdmi.vdda_reg);
152 
153 	return r;
154 }
155 
156 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
157 {
158 	hdmi.core_enabled = false;
159 
160 	hdmi_runtime_put();
161 	regulator_disable(hdmi.vdda_reg);
162 }
163 
164 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
165 {
166 	int r;
167 	struct omap_video_timings *p;
168 	enum omap_channel channel = dssdev->dispc_channel;
169 	struct hdmi_wp_data *wp = &hdmi.wp;
170 	struct dss_pll_clock_info hdmi_cinfo = { 0 };
171 	unsigned pc;
172 
173 	r = hdmi_power_on_core(dssdev);
174 	if (r)
175 		return r;
176 
177 	/* disable and clear irqs */
178 	hdmi_wp_clear_irqenable(wp, 0xffffffff);
179 	hdmi_wp_set_irqstatus(wp, 0xffffffff);
180 
181 	p = &hdmi.cfg.timings;
182 
183 	DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
184 
185 	pc = p->pixelclock;
186 	if (p->double_pixel)
187 		pc *= 2;
188 
189 	hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo);
190 
191 	r = dss_pll_enable(&hdmi.pll.pll);
192 	if (r) {
193 		DSSERR("Failed to enable PLL\n");
194 		goto err_pll_enable;
195 	}
196 
197 	r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
198 	if (r) {
199 		DSSERR("Failed to configure PLL\n");
200 		goto err_pll_cfg;
201 	}
202 
203 	r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
204 		hdmi_cinfo.clkout[0]);
205 	if (r) {
206 		DSSDBG("Failed to configure PHY\n");
207 		goto err_phy_cfg;
208 	}
209 
210 	r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
211 	if (r)
212 		goto err_phy_pwr;
213 
214 	hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
215 
216 	/* bypass TV gamma table */
217 	dispc_enable_gamma_table(0);
218 
219 	/* tv size */
220 	dss_mgr_set_timings(channel, p);
221 
222 	r = dss_mgr_enable(channel);
223 	if (r)
224 		goto err_mgr_enable;
225 
226 	r = hdmi_wp_video_start(&hdmi.wp);
227 	if (r)
228 		goto err_vid_enable;
229 
230 	hdmi_wp_set_irqenable(wp,
231 		HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
232 
233 	return 0;
234 
235 err_vid_enable:
236 	dss_mgr_disable(channel);
237 err_mgr_enable:
238 	hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
239 err_phy_pwr:
240 err_phy_cfg:
241 err_pll_cfg:
242 	dss_pll_disable(&hdmi.pll.pll);
243 err_pll_enable:
244 	hdmi_power_off_core(dssdev);
245 	return -EIO;
246 }
247 
248 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
249 {
250 	enum omap_channel channel = dssdev->dispc_channel;
251 
252 	hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
253 
254 	hdmi_wp_video_stop(&hdmi.wp);
255 
256 	dss_mgr_disable(channel);
257 
258 	hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
259 
260 	dss_pll_disable(&hdmi.pll.pll);
261 
262 	hdmi_power_off_core(dssdev);
263 }
264 
265 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
266 					struct omap_video_timings *timings)
267 {
268 	if (!dispc_mgr_timings_ok(dssdev->dispc_channel, timings))
269 		return -EINVAL;
270 
271 	return 0;
272 }
273 
274 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
275 		struct omap_video_timings *timings)
276 {
277 	mutex_lock(&hdmi.lock);
278 
279 	hdmi.cfg.timings = *timings;
280 
281 	dispc_set_tv_pclk(timings->pixelclock);
282 
283 	mutex_unlock(&hdmi.lock);
284 }
285 
286 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
287 		struct omap_video_timings *timings)
288 {
289 	*timings = hdmi.cfg.timings;
290 }
291 
292 static void hdmi_dump_regs(struct seq_file *s)
293 {
294 	mutex_lock(&hdmi.lock);
295 
296 	if (hdmi_runtime_get()) {
297 		mutex_unlock(&hdmi.lock);
298 		return;
299 	}
300 
301 	hdmi_wp_dump(&hdmi.wp, s);
302 	hdmi_pll_dump(&hdmi.pll, s);
303 	hdmi_phy_dump(&hdmi.phy, s);
304 	hdmi4_core_dump(&hdmi.core, s);
305 
306 	hdmi_runtime_put();
307 	mutex_unlock(&hdmi.lock);
308 }
309 
310 static int read_edid(u8 *buf, int len)
311 {
312 	int r;
313 
314 	mutex_lock(&hdmi.lock);
315 
316 	r = hdmi_runtime_get();
317 	BUG_ON(r);
318 
319 	r = hdmi4_read_edid(&hdmi.core,  buf, len);
320 
321 	hdmi_runtime_put();
322 	mutex_unlock(&hdmi.lock);
323 
324 	return r;
325 }
326 
327 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
328 {
329 	hdmi_wp_audio_enable(&hd->wp, true);
330 	hdmi4_audio_start(&hd->core, &hd->wp);
331 }
332 
333 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
334 {
335 	hdmi4_audio_stop(&hd->core, &hd->wp);
336 	hdmi_wp_audio_enable(&hd->wp, false);
337 }
338 
339 static int hdmi_display_enable(struct omap_dss_device *dssdev)
340 {
341 	struct omap_dss_device *out = &hdmi.output;
342 	unsigned long flags;
343 	int r = 0;
344 
345 	DSSDBG("ENTER hdmi_display_enable\n");
346 
347 	mutex_lock(&hdmi.lock);
348 
349 	if (!out->dispc_channel_connected) {
350 		DSSERR("failed to enable display: no output/manager\n");
351 		r = -ENODEV;
352 		goto err0;
353 	}
354 
355 	r = hdmi_power_on_full(dssdev);
356 	if (r) {
357 		DSSERR("failed to power on device\n");
358 		goto err0;
359 	}
360 
361 	if (hdmi.audio_configured) {
362 		r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
363 				       hdmi.cfg.timings.pixelclock);
364 		if (r) {
365 			DSSERR("Error restoring audio configuration: %d", r);
366 			hdmi.audio_abort_cb(&hdmi.pdev->dev);
367 			hdmi.audio_configured = false;
368 		}
369 	}
370 
371 	spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
372 	if (hdmi.audio_configured && hdmi.audio_playing)
373 		hdmi_start_audio_stream(&hdmi);
374 	hdmi.display_enabled = true;
375 	spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
376 
377 	mutex_unlock(&hdmi.lock);
378 	return 0;
379 
380 err0:
381 	mutex_unlock(&hdmi.lock);
382 	return r;
383 }
384 
385 static void hdmi_display_disable(struct omap_dss_device *dssdev)
386 {
387 	unsigned long flags;
388 
389 	DSSDBG("Enter hdmi_display_disable\n");
390 
391 	mutex_lock(&hdmi.lock);
392 
393 	spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
394 	hdmi_stop_audio_stream(&hdmi);
395 	hdmi.display_enabled = false;
396 	spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
397 
398 	hdmi_power_off_full(dssdev);
399 
400 	mutex_unlock(&hdmi.lock);
401 }
402 
403 static int hdmi_core_enable(struct omap_dss_device *dssdev)
404 {
405 	int r = 0;
406 
407 	DSSDBG("ENTER omapdss_hdmi_core_enable\n");
408 
409 	mutex_lock(&hdmi.lock);
410 
411 	r = hdmi_power_on_core(dssdev);
412 	if (r) {
413 		DSSERR("failed to power on device\n");
414 		goto err0;
415 	}
416 
417 	mutex_unlock(&hdmi.lock);
418 	return 0;
419 
420 err0:
421 	mutex_unlock(&hdmi.lock);
422 	return r;
423 }
424 
425 static void hdmi_core_disable(struct omap_dss_device *dssdev)
426 {
427 	DSSDBG("Enter omapdss_hdmi_core_disable\n");
428 
429 	mutex_lock(&hdmi.lock);
430 
431 	hdmi_power_off_core(dssdev);
432 
433 	mutex_unlock(&hdmi.lock);
434 }
435 
436 static int hdmi_connect(struct omap_dss_device *dssdev,
437 		struct omap_dss_device *dst)
438 {
439 	enum omap_channel channel = dssdev->dispc_channel;
440 	int r;
441 
442 	r = hdmi_init_regulator();
443 	if (r)
444 		return r;
445 
446 	r = dss_mgr_connect(channel, dssdev);
447 	if (r)
448 		return r;
449 
450 	r = omapdss_output_set_device(dssdev, dst);
451 	if (r) {
452 		DSSERR("failed to connect output to new device: %s\n",
453 				dst->name);
454 		dss_mgr_disconnect(channel, dssdev);
455 		return r;
456 	}
457 
458 	return 0;
459 }
460 
461 static void hdmi_disconnect(struct omap_dss_device *dssdev,
462 		struct omap_dss_device *dst)
463 {
464 	enum omap_channel channel = dssdev->dispc_channel;
465 
466 	WARN_ON(dst != dssdev->dst);
467 
468 	if (dst != dssdev->dst)
469 		return;
470 
471 	omapdss_output_unset_device(dssdev);
472 
473 	dss_mgr_disconnect(channel, dssdev);
474 }
475 
476 static int hdmi_read_edid(struct omap_dss_device *dssdev,
477 		u8 *edid, int len)
478 {
479 	bool need_enable;
480 	int r;
481 
482 	need_enable = hdmi.core_enabled == false;
483 
484 	if (need_enable) {
485 		r = hdmi_core_enable(dssdev);
486 		if (r)
487 			return r;
488 	}
489 
490 	r = read_edid(edid, len);
491 
492 	if (need_enable)
493 		hdmi_core_disable(dssdev);
494 
495 	return r;
496 }
497 
498 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
499 		const struct hdmi_avi_infoframe *avi)
500 {
501 	hdmi.cfg.infoframe = *avi;
502 	return 0;
503 }
504 
505 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
506 		bool hdmi_mode)
507 {
508 	hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
509 	return 0;
510 }
511 
512 static const struct omapdss_hdmi_ops hdmi_ops = {
513 	.connect		= hdmi_connect,
514 	.disconnect		= hdmi_disconnect,
515 
516 	.enable			= hdmi_display_enable,
517 	.disable		= hdmi_display_disable,
518 
519 	.check_timings		= hdmi_display_check_timing,
520 	.set_timings		= hdmi_display_set_timing,
521 	.get_timings		= hdmi_display_get_timings,
522 
523 	.read_edid		= hdmi_read_edid,
524 	.set_infoframe		= hdmi_set_infoframe,
525 	.set_hdmi_mode		= hdmi_set_hdmi_mode,
526 };
527 
528 static void hdmi_init_output(struct platform_device *pdev)
529 {
530 	struct omap_dss_device *out = &hdmi.output;
531 
532 	out->dev = &pdev->dev;
533 	out->id = OMAP_DSS_OUTPUT_HDMI;
534 	out->output_type = OMAP_DISPLAY_TYPE_HDMI;
535 	out->name = "hdmi.0";
536 	out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
537 	out->ops.hdmi = &hdmi_ops;
538 	out->owner = THIS_MODULE;
539 
540 	omapdss_register_output(out);
541 }
542 
543 static void hdmi_uninit_output(struct platform_device *pdev)
544 {
545 	struct omap_dss_device *out = &hdmi.output;
546 
547 	omapdss_unregister_output(out);
548 }
549 
550 static int hdmi_probe_of(struct platform_device *pdev)
551 {
552 	struct device_node *node = pdev->dev.of_node;
553 	struct device_node *ep;
554 	int r;
555 
556 	ep = omapdss_of_get_first_endpoint(node);
557 	if (!ep)
558 		return 0;
559 
560 	r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
561 	if (r)
562 		goto err;
563 
564 	of_node_put(ep);
565 	return 0;
566 
567 err:
568 	of_node_put(ep);
569 	return r;
570 }
571 
572 /* Audio callbacks */
573 static int hdmi_audio_startup(struct device *dev,
574 			      void (*abort_cb)(struct device *dev))
575 {
576 	struct omap_hdmi *hd = dev_get_drvdata(dev);
577 	int ret = 0;
578 
579 	mutex_lock(&hd->lock);
580 
581 	if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
582 		ret = -EPERM;
583 		goto out;
584 	}
585 
586 	hd->audio_abort_cb = abort_cb;
587 
588 out:
589 	mutex_unlock(&hd->lock);
590 
591 	return ret;
592 }
593 
594 static int hdmi_audio_shutdown(struct device *dev)
595 {
596 	struct omap_hdmi *hd = dev_get_drvdata(dev);
597 
598 	mutex_lock(&hd->lock);
599 	hd->audio_abort_cb = NULL;
600 	hd->audio_configured = false;
601 	hd->audio_playing = false;
602 	mutex_unlock(&hd->lock);
603 
604 	return 0;
605 }
606 
607 static int hdmi_audio_start(struct device *dev)
608 {
609 	struct omap_hdmi *hd = dev_get_drvdata(dev);
610 	unsigned long flags;
611 
612 	WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
613 
614 	spin_lock_irqsave(&hd->audio_playing_lock, flags);
615 
616 	if (hd->display_enabled)
617 		hdmi_start_audio_stream(hd);
618 	hd->audio_playing = true;
619 
620 	spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
621 	return 0;
622 }
623 
624 static void hdmi_audio_stop(struct device *dev)
625 {
626 	struct omap_hdmi *hd = dev_get_drvdata(dev);
627 	unsigned long flags;
628 
629 	WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
630 
631 	spin_lock_irqsave(&hd->audio_playing_lock, flags);
632 
633 	if (hd->display_enabled)
634 		hdmi_stop_audio_stream(hd);
635 	hd->audio_playing = false;
636 
637 	spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
638 }
639 
640 static int hdmi_audio_config(struct device *dev,
641 			     struct omap_dss_audio *dss_audio)
642 {
643 	struct omap_hdmi *hd = dev_get_drvdata(dev);
644 	int ret;
645 
646 	mutex_lock(&hd->lock);
647 
648 	if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
649 		ret = -EPERM;
650 		goto out;
651 	}
652 
653 	ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
654 				 hd->cfg.timings.pixelclock);
655 	if (!ret) {
656 		hd->audio_configured = true;
657 		hd->audio_config = *dss_audio;
658 	}
659 out:
660 	mutex_unlock(&hd->lock);
661 
662 	return ret;
663 }
664 
665 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
666 	.audio_startup = hdmi_audio_startup,
667 	.audio_shutdown = hdmi_audio_shutdown,
668 	.audio_start = hdmi_audio_start,
669 	.audio_stop = hdmi_audio_stop,
670 	.audio_config = hdmi_audio_config,
671 };
672 
673 static int hdmi_audio_register(struct device *dev)
674 {
675 	struct omap_hdmi_audio_pdata pdata = {
676 		.dev = dev,
677 		.dss_version = omapdss_get_version(),
678 		.audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
679 		.ops = &hdmi_audio_ops,
680 	};
681 
682 	hdmi.audio_pdev = platform_device_register_data(
683 		dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
684 		&pdata, sizeof(pdata));
685 
686 	if (IS_ERR(hdmi.audio_pdev))
687 		return PTR_ERR(hdmi.audio_pdev);
688 
689 	return 0;
690 }
691 
692 /* HDMI HW IP initialisation */
693 static int hdmi4_bind(struct device *dev, struct device *master, void *data)
694 {
695 	struct platform_device *pdev = to_platform_device(dev);
696 	int r;
697 	int irq;
698 
699 	hdmi.pdev = pdev;
700 	dev_set_drvdata(&pdev->dev, &hdmi);
701 
702 	mutex_init(&hdmi.lock);
703 	spin_lock_init(&hdmi.audio_playing_lock);
704 
705 	if (pdev->dev.of_node) {
706 		r = hdmi_probe_of(pdev);
707 		if (r)
708 			return r;
709 	}
710 
711 	r = hdmi_wp_init(pdev, &hdmi.wp);
712 	if (r)
713 		return r;
714 
715 	r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
716 	if (r)
717 		return r;
718 
719 	r = hdmi_phy_init(pdev, &hdmi.phy);
720 	if (r)
721 		goto err;
722 
723 	r = hdmi4_core_init(pdev, &hdmi.core);
724 	if (r)
725 		goto err;
726 
727 	irq = platform_get_irq(pdev, 0);
728 	if (irq < 0) {
729 		DSSERR("platform_get_irq failed\n");
730 		r = -ENODEV;
731 		goto err;
732 	}
733 
734 	r = devm_request_threaded_irq(&pdev->dev, irq,
735 			NULL, hdmi_irq_handler,
736 			IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
737 	if (r) {
738 		DSSERR("HDMI IRQ request failed\n");
739 		goto err;
740 	}
741 
742 	pm_runtime_enable(&pdev->dev);
743 
744 	hdmi_init_output(pdev);
745 
746 	r = hdmi_audio_register(&pdev->dev);
747 	if (r) {
748 		DSSERR("Registering HDMI audio failed\n");
749 		hdmi_uninit_output(pdev);
750 		pm_runtime_disable(&pdev->dev);
751 		return r;
752 	}
753 
754 	dss_debugfs_create_file("hdmi", hdmi_dump_regs);
755 
756 	return 0;
757 err:
758 	hdmi_pll_uninit(&hdmi.pll);
759 	return r;
760 }
761 
762 static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
763 {
764 	struct platform_device *pdev = to_platform_device(dev);
765 
766 	if (hdmi.audio_pdev)
767 		platform_device_unregister(hdmi.audio_pdev);
768 
769 	hdmi_uninit_output(pdev);
770 
771 	hdmi_pll_uninit(&hdmi.pll);
772 
773 	pm_runtime_disable(&pdev->dev);
774 }
775 
776 static const struct component_ops hdmi4_component_ops = {
777 	.bind	= hdmi4_bind,
778 	.unbind	= hdmi4_unbind,
779 };
780 
781 static int hdmi4_probe(struct platform_device *pdev)
782 {
783 	return component_add(&pdev->dev, &hdmi4_component_ops);
784 }
785 
786 static int hdmi4_remove(struct platform_device *pdev)
787 {
788 	component_del(&pdev->dev, &hdmi4_component_ops);
789 	return 0;
790 }
791 
792 static int hdmi_runtime_suspend(struct device *dev)
793 {
794 	dispc_runtime_put();
795 
796 	return 0;
797 }
798 
799 static int hdmi_runtime_resume(struct device *dev)
800 {
801 	int r;
802 
803 	r = dispc_runtime_get();
804 	if (r < 0)
805 		return r;
806 
807 	return 0;
808 }
809 
810 static const struct dev_pm_ops hdmi_pm_ops = {
811 	.runtime_suspend = hdmi_runtime_suspend,
812 	.runtime_resume = hdmi_runtime_resume,
813 };
814 
815 static const struct of_device_id hdmi_of_match[] = {
816 	{ .compatible = "ti,omap4-hdmi", },
817 	{},
818 };
819 
820 static struct platform_driver omapdss_hdmihw_driver = {
821 	.probe		= hdmi4_probe,
822 	.remove		= hdmi4_remove,
823 	.driver         = {
824 		.name   = "omapdss_hdmi",
825 		.pm	= &hdmi_pm_ops,
826 		.of_match_table = hdmi_of_match,
827 		.suppress_bind_attrs = true,
828 	},
829 };
830 
831 int __init hdmi4_init_platform_driver(void)
832 {
833 	return platform_driver_register(&omapdss_hdmihw_driver);
834 }
835 
836 void hdmi4_uninit_platform_driver(void)
837 {
838 	platform_driver_unregister(&omapdss_hdmihw_driver);
839 }
840