1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 * Martin Peres 24 */ 25 #include "priv.h" 26 27 static int 28 pwm_info(struct nvkm_therm *therm, int *line, int *ctrl, int *indx) 29 { 30 if (*line == 0x04) { 31 *ctrl = 0x00e100; 32 *line = 4; 33 *indx = 0; 34 } else 35 if (*line == 0x09) { 36 *ctrl = 0x00e100; 37 *line = 9; 38 *indx = 1; 39 } else 40 if (*line == 0x10) { 41 *ctrl = 0x00e28c; 42 *line = 0; 43 *indx = 0; 44 } else { 45 nv_error(therm, "unknown pwm ctrl for gpio %d\n", *line); 46 return -ENODEV; 47 } 48 49 return 0; 50 } 51 52 int 53 nv50_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable) 54 { 55 u32 data = enable ? 0x00000001 : 0x00000000; 56 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); 57 if (ret == 0) 58 nv_mask(therm, ctrl, 0x00010001 << line, data << line); 59 return ret; 60 } 61 62 int 63 nv50_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) 64 { 65 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); 66 if (ret) 67 return ret; 68 69 if (nv_rd32(therm, ctrl) & (1 << line)) { 70 *divs = nv_rd32(therm, 0x00e114 + (id * 8)); 71 *duty = nv_rd32(therm, 0x00e118 + (id * 8)); 72 return 0; 73 } 74 75 return -EINVAL; 76 } 77 78 int 79 nv50_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) 80 { 81 int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id); 82 if (ret) 83 return ret; 84 85 nv_wr32(therm, 0x00e114 + (id * 8), divs); 86 nv_wr32(therm, 0x00e118 + (id * 8), duty | 0x80000000); 87 return 0; 88 } 89 90 int 91 nv50_fan_pwm_clock(struct nvkm_therm *therm, int line) 92 { 93 int chipset = nv_device(therm)->chipset; 94 int crystal = nv_device(therm)->crystal; 95 int pwm_clock; 96 97 /* determine the PWM source clock */ 98 if (chipset > 0x50 && chipset < 0x94) { 99 u8 pwm_div = nv_rd32(therm, 0x410c); 100 if (nv_rd32(therm, 0xc040) & 0x800000) { 101 /* Use the HOST clock (100 MHz) 102 * Where does this constant(2.4) comes from? */ 103 pwm_clock = (100000000 >> pwm_div) * 10 / 24; 104 } else { 105 /* Where does this constant(20) comes from? */ 106 pwm_clock = (crystal * 1000) >> pwm_div; 107 pwm_clock /= 20; 108 } 109 } else { 110 pwm_clock = (crystal * 1000) / 20; 111 } 112 113 return pwm_clock; 114 } 115 116 static void 117 nv50_sensor_setup(struct nvkm_therm *therm) 118 { 119 nv_mask(therm, 0x20010, 0x40000000, 0x0); 120 mdelay(20); /* wait for the temperature to stabilize */ 121 } 122 123 static int 124 nv50_temp_get(struct nvkm_therm *obj) 125 { 126 struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base); 127 struct nvbios_therm_sensor *sensor = &therm->bios_sensor; 128 int core_temp; 129 130 core_temp = nv_rd32(therm, 0x20014) & 0x3fff; 131 132 /* if the slope or the offset is unset, do no use the sensor */ 133 if (!sensor->slope_div || !sensor->slope_mult || 134 !sensor->offset_num || !sensor->offset_den) 135 return -ENODEV; 136 137 core_temp = core_temp * sensor->slope_mult / sensor->slope_div; 138 core_temp = core_temp + sensor->offset_num / sensor->offset_den; 139 core_temp = core_temp + sensor->offset_constant - 8; 140 141 /* reserve negative temperatures for errors */ 142 if (core_temp < 0) 143 core_temp = 0; 144 145 return core_temp; 146 } 147 148 static int 149 nv50_therm_ctor(struct nvkm_object *parent, 150 struct nvkm_object *engine, 151 struct nvkm_oclass *oclass, void *data, u32 size, 152 struct nvkm_object **pobject) 153 { 154 struct nvkm_therm_priv *therm; 155 int ret; 156 157 ret = nvkm_therm_create(parent, engine, oclass, &therm); 158 *pobject = nv_object(therm); 159 if (ret) 160 return ret; 161 162 therm->base.pwm_ctrl = nv50_fan_pwm_ctrl; 163 therm->base.pwm_get = nv50_fan_pwm_get; 164 therm->base.pwm_set = nv50_fan_pwm_set; 165 therm->base.pwm_clock = nv50_fan_pwm_clock; 166 therm->base.temp_get = nv50_temp_get; 167 therm->sensor.program_alarms = nvkm_therm_program_alarms_polling; 168 nv_subdev(therm)->intr = nv40_therm_intr; 169 170 return nvkm_therm_preinit(&therm->base); 171 } 172 173 static int 174 nv50_therm_init(struct nvkm_object *object) 175 { 176 struct nvkm_therm *therm = (void *)object; 177 178 nv50_sensor_setup(therm); 179 180 return _nvkm_therm_init(object); 181 } 182 183 struct nvkm_oclass 184 nv50_therm_oclass = { 185 .handle = NV_SUBDEV(THERM, 0x50), 186 .ofuncs = &(struct nvkm_ofuncs) { 187 .ctor = nv50_therm_ctor, 188 .dtor = _nvkm_therm_dtor, 189 .init = nv50_therm_init, 190 .fini = _nvkm_therm_fini, 191 }, 192 }; 193