1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 static int
27 pwm_info(struct nvkm_therm *therm, int line)
28 {
29 	struct nvkm_subdev *subdev = &therm->subdev;
30 	struct nvkm_device *device = subdev->device;
31 	u32 gpio = nvkm_rd32(device, 0x00d610 + (line * 0x04));
32 
33 	switch (gpio & 0x000000c0) {
34 	case 0x00000000: /* normal mode, possibly pwm forced off by us */
35 	case 0x00000040: /* nvio special */
36 		switch (gpio & 0x0000001f) {
37 		case 0x00: return 2;
38 		case 0x19: return 1;
39 		case 0x1c: return 0;
40 		case 0x1e: return 2;
41 		default:
42 			break;
43 		}
44 	default:
45 		break;
46 	}
47 
48 	nvkm_error(subdev, "GPIO %d unknown PWM: %08x\n", line, gpio);
49 	return -ENODEV;
50 }
51 
52 static int
53 gf119_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
54 {
55 	struct nvkm_device *device = therm->subdev.device;
56 	u32 data = enable ? 0x00000040 : 0x00000000;
57 	int indx = pwm_info(therm, line);
58 	if (indx < 0)
59 		return indx;
60 	else if (indx < 2)
61 		nvkm_mask(device, 0x00d610 + (line * 0x04), 0x000000c0, data);
62 	/* nothing to do for indx == 2, it seems hardwired to PTHERM */
63 	return 0;
64 }
65 
66 static int
67 gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
68 {
69 	struct nvkm_device *device = therm->subdev.device;
70 	int indx = pwm_info(therm, line);
71 	if (indx < 0)
72 		return indx;
73 	else if (indx < 2) {
74 		if (nvkm_rd32(device, 0x00d610 + (line * 0x04)) & 0x00000040) {
75 			*divs = nvkm_rd32(device, 0x00e114 + (indx * 8));
76 			*duty = nvkm_rd32(device, 0x00e118 + (indx * 8));
77 			return 0;
78 		}
79 	} else if (indx == 2) {
80 		*divs = nvkm_rd32(device, 0x0200d8) & 0x1fff;
81 		*duty = nvkm_rd32(device, 0x0200dc) & 0x1fff;
82 		return 0;
83 	}
84 
85 	return -EINVAL;
86 }
87 
88 static int
89 gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
90 {
91 	struct nvkm_device *device = therm->subdev.device;
92 	int indx = pwm_info(therm, line);
93 	if (indx < 0)
94 		return indx;
95 	else if (indx < 2) {
96 		nvkm_wr32(device, 0x00e114 + (indx * 8), divs);
97 		nvkm_wr32(device, 0x00e118 + (indx * 8), duty | 0x80000000);
98 	} else if (indx == 2) {
99 		nvkm_mask(device, 0x0200d8, 0x1fff, divs); /* keep the high bits */
100 		nvkm_wr32(device, 0x0200dc, duty | 0x40000000);
101 	}
102 	return 0;
103 }
104 
105 static int
106 gf119_fan_pwm_clock(struct nvkm_therm *therm, int line)
107 {
108 	struct nvkm_device *device = therm->subdev.device;
109 	int indx = pwm_info(therm, line);
110 	if (indx < 0)
111 		return 0;
112 	else if (indx < 2)
113 		return (device->crystal * 1000) / 20;
114 	else
115 		return device->crystal * 1000 / 10;
116 }
117 
118 void
119 gf119_therm_init(struct nvkm_therm *therm)
120 {
121 	struct nvkm_device *device = therm->subdev.device;
122 
123 	g84_sensor_setup(therm);
124 
125 	/* enable fan tach, count revolutions per-second */
126 	nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);
127 	if (therm->fan->tach.func != DCB_GPIO_UNUSED) {
128 		nvkm_mask(device, 0x00d79c, 0x000000ff, therm->fan->tach.line);
129 		nvkm_wr32(device, 0x00e724, device->crystal * 1000);
130 		nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);
131 	}
132 	nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);
133 }
134 
135 static const struct nvkm_therm_func
136 gf119_therm = {
137 	.init = gf119_therm_init,
138 	.fini = g84_therm_fini,
139 	.pwm_ctrl = gf119_fan_pwm_ctrl,
140 	.pwm_get = gf119_fan_pwm_get,
141 	.pwm_set = gf119_fan_pwm_set,
142 	.pwm_clock = gf119_fan_pwm_clock,
143 	.temp_get = g84_temp_get,
144 	.fan_sense = gt215_therm_fan_sense,
145 	.program_alarms = nvkm_therm_program_alarms_polling,
146 };
147 
148 int
149 gf119_therm_new(struct nvkm_device *device, int index,
150 	       struct nvkm_therm **ptherm)
151 {
152 	return nvkm_therm_new_(&gf119_therm, device, index, ptherm);
153 }
154