1 /* SPDX-License-Identifier: MIT */ 2 #ifndef __NVKM_PMU_PRIV_H__ 3 #define __NVKM_PMU_PRIV_H__ 4 #define nvkm_pmu(p) container_of((p), struct nvkm_pmu, subdev) 5 #include <subdev/pmu.h> 6 #include <subdev/pmu/fuc/os.h> 7 enum nvkm_acr_lsf_id; 8 9 struct nvkm_pmu_func { 10 const struct nvkm_falcon_func *flcn; 11 12 struct { 13 u32 *data; 14 u32 size; 15 } code; 16 17 struct { 18 u32 *data; 19 u32 size; 20 } data; 21 22 bool (*enabled)(struct nvkm_pmu *); 23 void (*reset)(struct nvkm_pmu *); 24 int (*init)(struct nvkm_pmu *); 25 void (*fini)(struct nvkm_pmu *); 26 void (*intr)(struct nvkm_pmu *); 27 int (*send)(struct nvkm_pmu *, u32 reply[2], u32 process, 28 u32 message, u32 data0, u32 data1); 29 void (*recv)(struct nvkm_pmu *); 30 int (*initmsg)(struct nvkm_pmu *); 31 void (*pgob)(struct nvkm_pmu *, bool); 32 }; 33 34 extern const struct nvkm_falcon_func gt215_pmu_flcn; 35 int gt215_pmu_init(struct nvkm_pmu *); 36 void gt215_pmu_fini(struct nvkm_pmu *); 37 void gt215_pmu_intr(struct nvkm_pmu *); 38 void gt215_pmu_recv(struct nvkm_pmu *); 39 int gt215_pmu_send(struct nvkm_pmu *, u32[2], u32, u32, u32, u32); 40 41 bool gf100_pmu_enabled(struct nvkm_pmu *); 42 void gf100_pmu_reset(struct nvkm_pmu *); 43 44 void gk110_pmu_pgob(struct nvkm_pmu *, bool); 45 46 int gm20b_pmu_acr_bootstrap_falcon(struct nvkm_falcon *, enum nvkm_acr_lsf_id); 47 void gm20b_pmu_recv(struct nvkm_pmu *); 48 int gm20b_pmu_initmsg(struct nvkm_pmu *); 49 50 struct nvkm_pmu_fwif { 51 int version; 52 int (*load)(struct nvkm_pmu *, int ver, const struct nvkm_pmu_fwif *); 53 const struct nvkm_pmu_func *func; 54 const struct nvkm_acr_lsf_func *acr; 55 }; 56 57 int gf100_pmu_nofw(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *); 58 int gm20b_pmu_load(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *); 59 60 int nvkm_pmu_ctor(const struct nvkm_pmu_fwif *, struct nvkm_device *, 61 int index, struct nvkm_pmu *); 62 int nvkm_pmu_new_(const struct nvkm_pmu_fwif *, struct nvkm_device *, 63 int index, struct nvkm_pmu **); 64 #endif 65