1 #ifndef __NVKM_PMU_MEMX_H__ 2 #define __NVKM_PMU_MEMX_H__ 3 #include "priv.h" 4 5 struct nvkm_memx { 6 struct nvkm_pmu *pmu; 7 u32 base; 8 u32 size; 9 struct { 10 u32 mthd; 11 u32 size; 12 u32 data[64]; 13 } c; 14 }; 15 16 static void 17 memx_out(struct nvkm_memx *memx) 18 { 19 struct nvkm_device *device = memx->pmu->subdev.device; 20 int i; 21 22 if (memx->c.mthd) { 23 nvkm_wr32(device, 0x10a1c4, (memx->c.size << 16) | memx->c.mthd); 24 for (i = 0; i < memx->c.size; i++) 25 nvkm_wr32(device, 0x10a1c4, memx->c.data[i]); 26 memx->c.mthd = 0; 27 memx->c.size = 0; 28 } 29 } 30 31 static void 32 memx_cmd(struct nvkm_memx *memx, u32 mthd, u32 size, u32 data[]) 33 { 34 if ((memx->c.size + size >= ARRAY_SIZE(memx->c.data)) || 35 (memx->c.mthd && memx->c.mthd != mthd)) 36 memx_out(memx); 37 memcpy(&memx->c.data[memx->c.size], data, size * sizeof(data[0])); 38 memx->c.size += size; 39 memx->c.mthd = mthd; 40 } 41 42 int 43 nvkm_memx_init(struct nvkm_pmu *pmu, struct nvkm_memx **pmemx) 44 { 45 struct nvkm_device *device = pmu->subdev.device; 46 struct nvkm_memx *memx; 47 u32 reply[2]; 48 int ret; 49 50 ret = pmu->message(pmu, reply, PROC_MEMX, MEMX_MSG_INFO, 51 MEMX_INFO_DATA, 0); 52 if (ret) 53 return ret; 54 55 memx = *pmemx = kzalloc(sizeof(*memx), GFP_KERNEL); 56 if (!memx) 57 return -ENOMEM; 58 memx->pmu = pmu; 59 memx->base = reply[0]; 60 memx->size = reply[1]; 61 62 /* acquire data segment access */ 63 do { 64 nvkm_wr32(device, 0x10a580, 0x00000003); 65 } while (nvkm_rd32(device, 0x10a580) != 0x00000003); 66 nvkm_wr32(device, 0x10a1c0, 0x01000000 | memx->base); 67 return 0; 68 } 69 70 int 71 nvkm_memx_fini(struct nvkm_memx **pmemx, bool exec) 72 { 73 struct nvkm_memx *memx = *pmemx; 74 struct nvkm_pmu *pmu = memx->pmu; 75 struct nvkm_device *device = pmu->subdev.device; 76 u32 finish, reply[2]; 77 78 /* flush the cache... */ 79 memx_out(memx); 80 81 /* release data segment access */ 82 finish = nvkm_rd32(device, 0x10a1c0) & 0x00ffffff; 83 nvkm_wr32(device, 0x10a580, 0x00000000); 84 85 /* call MEMX process to execute the script, and wait for reply */ 86 if (exec) { 87 pmu->message(pmu, reply, PROC_MEMX, MEMX_MSG_EXEC, 88 memx->base, finish); 89 } 90 91 nv_debug(memx->pmu, "Exec took %uns, PMU_IN %08x\n", 92 reply[0], reply[1]); 93 kfree(memx); 94 return 0; 95 } 96 97 void 98 nvkm_memx_wr32(struct nvkm_memx *memx, u32 addr, u32 data) 99 { 100 nv_debug(memx->pmu, "R[%06x] = 0x%08x\n", addr, data); 101 memx_cmd(memx, MEMX_WR32, 2, (u32[]){ addr, data }); 102 } 103 104 void 105 nvkm_memx_wait(struct nvkm_memx *memx, 106 u32 addr, u32 mask, u32 data, u32 nsec) 107 { 108 nv_debug(memx->pmu, "R[%06x] & 0x%08x == 0x%08x, %d us\n", 109 addr, mask, data, nsec); 110 memx_cmd(memx, MEMX_WAIT, 4, (u32[]){ addr, mask, data, nsec }); 111 memx_out(memx); /* fuc can't handle multiple */ 112 } 113 114 void 115 nvkm_memx_nsec(struct nvkm_memx *memx, u32 nsec) 116 { 117 nv_debug(memx->pmu, " DELAY = %d ns\n", nsec); 118 memx_cmd(memx, MEMX_DELAY, 1, (u32[]){ nsec }); 119 memx_out(memx); /* fuc can't handle multiple */ 120 } 121 122 void 123 nvkm_memx_wait_vblank(struct nvkm_memx *memx) 124 { 125 struct nvkm_device *device = memx->pmu->subdev.device; 126 u32 heads, x, y, px = 0; 127 int i, head_sync; 128 129 if (device->chipset < 0xd0) { 130 heads = nvkm_rd32(device, 0x610050); 131 for (i = 0; i < 2; i++) { 132 /* Heuristic: sync to head with biggest resolution */ 133 if (heads & (2 << (i << 3))) { 134 x = nvkm_rd32(device, 0x610b40 + (0x540 * i)); 135 y = (x & 0xffff0000) >> 16; 136 x &= 0x0000ffff; 137 if ((x * y) > px) { 138 px = (x * y); 139 head_sync = i; 140 } 141 } 142 } 143 } 144 145 if (px == 0) { 146 nv_debug(memx->pmu, "WAIT VBLANK !NO ACTIVE HEAD\n"); 147 return; 148 } 149 150 nv_debug(memx->pmu, "WAIT VBLANK HEAD%d\n", head_sync); 151 memx_cmd(memx, MEMX_VBLANK, 1, (u32[]){ head_sync }); 152 memx_out(memx); /* fuc can't handle multiple */ 153 } 154 155 void 156 nvkm_memx_train(struct nvkm_memx *memx) 157 { 158 nv_debug(memx->pmu, " MEM TRAIN\n"); 159 memx_cmd(memx, MEMX_TRAIN, 0, NULL); 160 } 161 162 int 163 nvkm_memx_train_result(struct nvkm_pmu *pmu, u32 *res, int rsize) 164 { 165 struct nvkm_device *device = pmu->subdev.device; 166 u32 reply[2], base, size, i; 167 int ret; 168 169 ret = pmu->message(pmu, reply, PROC_MEMX, MEMX_MSG_INFO, 170 MEMX_INFO_TRAIN, 0); 171 if (ret) 172 return ret; 173 174 base = reply[0]; 175 size = reply[1] >> 2; 176 if (size > rsize) 177 return -ENOMEM; 178 179 /* read the packet */ 180 nvkm_wr32(device, 0x10a1c0, 0x02000000 | base); 181 182 for (i = 0; i < size; i++) 183 res[i] = nvkm_rd32(device, 0x10a1c4); 184 185 return 0; 186 } 187 188 void 189 nvkm_memx_block(struct nvkm_memx *memx) 190 { 191 nv_debug(memx->pmu, " HOST BLOCKED\n"); 192 memx_cmd(memx, MEMX_ENTER, 0, NULL); 193 } 194 195 void 196 nvkm_memx_unblock(struct nvkm_memx *memx) 197 { 198 nv_debug(memx->pmu, " HOST UNBLOCKED\n"); 199 memx_cmd(memx, MEMX_LEAVE, 0, NULL); 200 } 201 #endif 202