xref: /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c (revision 0e44c21708761977dcbea9b846b51a6fb684907a)
1 /*
2  * Copyright 2016 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "priv.h"
25 
26 static const struct nvkm_falcon_func
27 gp102_pmu_flcn = {
28 	.disable = gm200_flcn_disable,
29 	.enable = gm200_flcn_enable,
30 	.reset_eng = gp102_flcn_reset_eng,
31 	.reset_wait_mem_scrubbing = gm200_flcn_reset_wait_mem_scrubbing,
32 	.debug = 0xc08,
33 	.fbif = 0xe00,
34 	.load_imem = nvkm_falcon_v1_load_imem,
35 	.load_dmem = nvkm_falcon_v1_load_dmem,
36 	.read_dmem = nvkm_falcon_v1_read_dmem,
37 	.bind_context = nvkm_falcon_v1_bind_context,
38 	.wait_for_halt = nvkm_falcon_v1_wait_for_halt,
39 	.clear_interrupt = nvkm_falcon_v1_clear_interrupt,
40 	.set_start_addr = nvkm_falcon_v1_set_start_addr,
41 	.start = nvkm_falcon_v1_start,
42 	.cmdq = { 0x4a0, 0x4b0, 4 },
43 	.msgq = { 0x4c8, 0x4cc, 0 },
44 };
45 
46 static const struct nvkm_pmu_func
47 gp102_pmu = {
48 	.flcn = &gp102_pmu_flcn,
49 };
50 
51 static const struct nvkm_pmu_fwif
52 gp102_pmu_fwif[] = {
53 	{ -1, gm200_pmu_nofw, &gp102_pmu },
54 	{}
55 };
56 
57 int
58 gp102_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
59 	      struct nvkm_pmu **ppmu)
60 {
61 	return nvkm_pmu_new_(gp102_pmu_fwif, device, type, inst, ppmu);
62 }
63