1 /* 2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 #include "priv.h" 23 #include <core/msgqueue.h> 24 #include <subdev/acr.h> 25 26 static const struct nvkm_acr_lsf_func 27 gm20b_pmu_acr = { 28 }; 29 30 void 31 gm20b_pmu_recv(struct nvkm_pmu *pmu) 32 { 33 if (!pmu->queue) { 34 nvkm_warn(&pmu->subdev, 35 "recv function called while no firmware set!\n"); 36 return; 37 } 38 39 nvkm_msgqueue_recv(pmu->queue); 40 } 41 42 static const struct nvkm_pmu_func 43 gm20b_pmu = { 44 .enabled = gf100_pmu_enabled, 45 .intr = gt215_pmu_intr, 46 .recv = gm20b_pmu_recv, 47 }; 48 49 #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) 50 MODULE_FIRMWARE("nvidia/gm20b/pmu/desc.bin"); 51 MODULE_FIRMWARE("nvidia/gm20b/pmu/image.bin"); 52 MODULE_FIRMWARE("nvidia/gm20b/pmu/sig.bin"); 53 #endif 54 55 int 56 gm20b_pmu_load(struct nvkm_pmu *pmu, int ver, const struct nvkm_pmu_fwif *fwif) 57 { 58 return nvkm_acr_lsfw_load_sig_image_desc(&pmu->subdev, pmu->falcon, 59 NVKM_ACR_LSF_PMU, "pmu/", 60 ver, fwif->acr); 61 } 62 63 static const struct nvkm_pmu_fwif 64 gm20b_pmu_fwif[] = { 65 { 0, gm20b_pmu_load, &gm20b_pmu, &gm20b_pmu_acr }, 66 {} 67 }; 68 69 int 70 gm20b_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu) 71 { 72 return nvkm_pmu_new_(gm20b_pmu_fwif, device, index, ppmu); 73 } 74