1 /*
2  * Copyright 2016 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "priv.h"
25 
26 static int
27 gm200_pmu_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr)
28 {
29 	nvkm_falcon_wr32(falcon, 0x200, 0x0000030e);
30 	return (nvkm_falcon_rd32(falcon, 0x20c) & 0x00007000) >> 12;
31 }
32 
33 void
34 gm200_pmu_flcn_bind_inst(struct nvkm_falcon *falcon, int target, u64 addr)
35 {
36 	nvkm_falcon_wr32(falcon, 0xe00, 4); /* DMAIDX_UCODE */
37 	nvkm_falcon_wr32(falcon, 0xe04, 0); /* DMAIDX_VIRT */
38 	nvkm_falcon_wr32(falcon, 0xe08, 4); /* DMAIDX_PHYS_VID */
39 	nvkm_falcon_wr32(falcon, 0xe0c, 5); /* DMAIDX_PHYS_SYS_COH */
40 	nvkm_falcon_wr32(falcon, 0xe10, 6); /* DMAIDX_PHYS_SYS_NCOH */
41 	nvkm_falcon_mask(falcon, 0x090, 0x00010000, 0x00010000);
42 	nvkm_falcon_wr32(falcon, 0x480, (1 << 30) | (target << 28) | (addr >> 12));
43 }
44 
45 const struct nvkm_falcon_func
46 gm200_pmu_flcn = {
47 	.disable = gm200_flcn_disable,
48 	.enable = gm200_flcn_enable,
49 	.reset_pmc = true,
50 	.reset_wait_mem_scrubbing = gm200_flcn_reset_wait_mem_scrubbing,
51 	.debug = 0xc08,
52 	.bind_inst = gm200_pmu_flcn_bind_inst,
53 	.bind_stat = gm200_pmu_flcn_bind_stat,
54 	.imem_pio = &gm200_flcn_imem_pio,
55 	.dmem_pio = &gm200_flcn_dmem_pio,
56 	.start = nvkm_falcon_v1_start,
57 	.cmdq = { 0x4a0, 0x4b0, 4 },
58 	.msgq = { 0x4c8, 0x4cc, 0 },
59 };
60 
61 static const struct nvkm_pmu_func
62 gm200_pmu = {
63 	.flcn = &gm200_pmu_flcn,
64 	.reset = gf100_pmu_reset,
65 };
66 
67 int
68 gm200_pmu_nofw(struct nvkm_pmu *pmu, int ver, const struct nvkm_pmu_fwif *fwif)
69 {
70 	nvkm_warn(&pmu->subdev, "firmware unavailable\n");
71 	return 0;
72 }
73 
74 static const struct nvkm_pmu_fwif
75 gm200_pmu_fwif[] = {
76 	{ -1, gm200_pmu_nofw, &gm200_pmu },
77 	{}
78 };
79 
80 int
81 gm200_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
82 	      struct nvkm_pmu **ppmu)
83 {
84 	return nvkm_pmu_new_(gm200_pmu_fwif, device, type, inst, ppmu);
85 }
86