1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 #include <core/firmware.h>
27 #include <subdev/timer.h>
28 
29 bool
30 nvkm_pmu_fan_controlled(struct nvkm_device *device)
31 {
32 	struct nvkm_pmu *pmu = device->pmu;
33 
34 	/* Internal PMU FW does not currently control fans in any way,
35 	 * allow SW control of fans instead.
36 	 */
37 	if (pmu && pmu->func->code.size)
38 		return false;
39 
40 	/* Default (board-loaded, or VBIOS PMU/PREOS) PMU FW on Fermi
41 	 * and newer automatically control the fan speed, which would
42 	 * interfere with SW control.
43 	 */
44 	return (device->chipset >= 0xc0);
45 }
46 
47 void
48 nvkm_pmu_pgob(struct nvkm_pmu *pmu, bool enable)
49 {
50 	if (pmu && pmu->func->pgob)
51 		pmu->func->pgob(pmu, enable);
52 }
53 
54 static void
55 nvkm_pmu_recv(struct work_struct *work)
56 {
57 	struct nvkm_pmu *pmu = container_of(work, typeof(*pmu), recv.work);
58 	return pmu->func->recv(pmu);
59 }
60 
61 int
62 nvkm_pmu_send(struct nvkm_pmu *pmu, u32 reply[2],
63 	      u32 process, u32 message, u32 data0, u32 data1)
64 {
65 	if (!pmu || !pmu->func->send)
66 		return -ENODEV;
67 	return pmu->func->send(pmu, reply, process, message, data0, data1);
68 }
69 
70 static void
71 nvkm_pmu_intr(struct nvkm_subdev *subdev)
72 {
73 	struct nvkm_pmu *pmu = nvkm_pmu(subdev);
74 	if (!pmu->func->intr)
75 		return;
76 	pmu->func->intr(pmu);
77 }
78 
79 static int
80 nvkm_pmu_fini(struct nvkm_subdev *subdev, bool suspend)
81 {
82 	struct nvkm_pmu *pmu = nvkm_pmu(subdev);
83 
84 	if (pmu->func->fini)
85 		pmu->func->fini(pmu);
86 
87 	flush_work(&pmu->recv.work);
88 
89 	reinit_completion(&pmu->wpr_ready);
90 
91 	nvkm_falcon_cmdq_fini(pmu->lpq);
92 	nvkm_falcon_cmdq_fini(pmu->hpq);
93 	pmu->initmsg_received = false;
94 	return 0;
95 }
96 
97 static void
98 nvkm_pmu_reset(struct nvkm_pmu *pmu)
99 {
100 	struct nvkm_device *device = pmu->subdev.device;
101 
102 	if (!pmu->func->enabled(pmu))
103 		return;
104 
105 	/* Reset. */
106 	if (pmu->func->reset)
107 		pmu->func->reset(pmu);
108 
109 	/* Wait for IMEM/DMEM scrubbing to be complete. */
110 	nvkm_msec(device, 2000,
111 		if (!(nvkm_rd32(device, 0x10a10c) & 0x00000006))
112 			break;
113 	);
114 }
115 
116 static int
117 nvkm_pmu_preinit(struct nvkm_subdev *subdev)
118 {
119 	struct nvkm_pmu *pmu = nvkm_pmu(subdev);
120 	nvkm_pmu_reset(pmu);
121 	return 0;
122 }
123 
124 static int
125 nvkm_pmu_init(struct nvkm_subdev *subdev)
126 {
127 	struct nvkm_pmu *pmu = nvkm_pmu(subdev);
128 	struct nvkm_device *device = pmu->subdev.device;
129 
130 	if (!pmu->func->init)
131 		return 0;
132 
133 	if (pmu->func->enabled(pmu)) {
134 		/* Inhibit interrupts, and wait for idle. */
135 		nvkm_wr32(device, 0x10a014, 0x0000ffff);
136 		nvkm_msec(device, 2000,
137 			if (!nvkm_rd32(device, 0x10a04c))
138 				break;
139 		);
140 
141 		nvkm_pmu_reset(pmu);
142 	}
143 
144 	return pmu->func->init(pmu);
145 }
146 
147 static void *
148 nvkm_pmu_dtor(struct nvkm_subdev *subdev)
149 {
150 	struct nvkm_pmu *pmu = nvkm_pmu(subdev);
151 	nvkm_falcon_msgq_del(&pmu->msgq);
152 	nvkm_falcon_cmdq_del(&pmu->lpq);
153 	nvkm_falcon_cmdq_del(&pmu->hpq);
154 	nvkm_falcon_qmgr_del(&pmu->qmgr);
155 	nvkm_falcon_dtor(&pmu->falcon);
156 	mutex_destroy(&pmu->send.mutex);
157 	return nvkm_pmu(subdev);
158 }
159 
160 static const struct nvkm_subdev_func
161 nvkm_pmu = {
162 	.dtor = nvkm_pmu_dtor,
163 	.preinit = nvkm_pmu_preinit,
164 	.init = nvkm_pmu_init,
165 	.fini = nvkm_pmu_fini,
166 	.intr = nvkm_pmu_intr,
167 };
168 
169 int
170 nvkm_pmu_ctor(const struct nvkm_pmu_fwif *fwif, struct nvkm_device *device,
171 	      enum nvkm_subdev_type type, int inst, struct nvkm_pmu *pmu)
172 {
173 	int ret;
174 
175 	nvkm_subdev_ctor(&nvkm_pmu, device, type, inst, &pmu->subdev);
176 
177 	mutex_init(&pmu->send.mutex);
178 
179 	INIT_WORK(&pmu->recv.work, nvkm_pmu_recv);
180 	init_waitqueue_head(&pmu->recv.wait);
181 
182 	fwif = nvkm_firmware_load(&pmu->subdev, fwif, "Pmu", pmu);
183 	if (IS_ERR(fwif))
184 		return PTR_ERR(fwif);
185 
186 	pmu->func = fwif->func;
187 
188 	ret = nvkm_falcon_ctor(pmu->func->flcn, &pmu->subdev, pmu->subdev.name,
189 			       0x10a000, &pmu->falcon);
190 	if (ret)
191 		return ret;
192 
193 	if ((ret = nvkm_falcon_qmgr_new(&pmu->falcon, &pmu->qmgr)) ||
194 	    (ret = nvkm_falcon_cmdq_new(pmu->qmgr, "hpq", &pmu->hpq)) ||
195 	    (ret = nvkm_falcon_cmdq_new(pmu->qmgr, "lpq", &pmu->lpq)) ||
196 	    (ret = nvkm_falcon_msgq_new(pmu->qmgr, "msgq", &pmu->msgq)))
197 		return ret;
198 
199 	init_completion(&pmu->wpr_ready);
200 	return 0;
201 }
202 
203 int
204 nvkm_pmu_new_(const struct nvkm_pmu_fwif *fwif, struct nvkm_device *device,
205 	      enum nvkm_subdev_type type, int inst, struct nvkm_pmu **ppmu)
206 {
207 	struct nvkm_pmu *pmu;
208 	if (!(pmu = *ppmu = kzalloc(sizeof(*pmu), GFP_KERNEL)))
209 		return -ENOMEM;
210 	return nvkm_pmu_ctor(fwif, device, type, inst, *ppmu);
211 }
212