1 /* 2 * Copyright 2013 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "priv.h" 25 26 #include <subdev/timer.h> 27 28 void 29 nvkm_pmu_pgob(struct nvkm_pmu *pmu, bool enable) 30 { 31 if (pmu->func->pgob) 32 pmu->func->pgob(pmu, enable); 33 } 34 35 int 36 nvkm_pmu_send(struct nvkm_pmu *pmu, u32 reply[2], 37 u32 process, u32 message, u32 data0, u32 data1) 38 { 39 struct nvkm_subdev *subdev = &pmu->subdev; 40 struct nvkm_device *device = subdev->device; 41 u32 addr; 42 43 /* wait for a free slot in the fifo */ 44 addr = nvkm_rd32(device, 0x10a4a0); 45 if (nvkm_msec(device, 2000, 46 u32 tmp = nvkm_rd32(device, 0x10a4b0); 47 if (tmp != (addr ^ 8)) 48 break; 49 ) < 0) 50 return -EBUSY; 51 52 /* we currently only support a single process at a time waiting 53 * on a synchronous reply, take the PMU mutex and tell the 54 * receive handler what we're waiting for 55 */ 56 if (reply) { 57 mutex_lock(&subdev->mutex); 58 pmu->recv.message = message; 59 pmu->recv.process = process; 60 } 61 62 /* acquire data segment access */ 63 do { 64 nvkm_wr32(device, 0x10a580, 0x00000001); 65 } while (nvkm_rd32(device, 0x10a580) != 0x00000001); 66 67 /* write the packet */ 68 nvkm_wr32(device, 0x10a1c0, 0x01000000 | (((addr & 0x07) << 4) + 69 pmu->send.base)); 70 nvkm_wr32(device, 0x10a1c4, process); 71 nvkm_wr32(device, 0x10a1c4, message); 72 nvkm_wr32(device, 0x10a1c4, data0); 73 nvkm_wr32(device, 0x10a1c4, data1); 74 nvkm_wr32(device, 0x10a4a0, (addr + 1) & 0x0f); 75 76 /* release data segment access */ 77 nvkm_wr32(device, 0x10a580, 0x00000000); 78 79 /* wait for reply, if requested */ 80 if (reply) { 81 wait_event(pmu->recv.wait, (pmu->recv.process == 0)); 82 reply[0] = pmu->recv.data[0]; 83 reply[1] = pmu->recv.data[1]; 84 mutex_unlock(&subdev->mutex); 85 } 86 87 return 0; 88 } 89 90 static void 91 nvkm_pmu_recv(struct work_struct *work) 92 { 93 struct nvkm_pmu *pmu = container_of(work, struct nvkm_pmu, recv.work); 94 struct nvkm_subdev *subdev = &pmu->subdev; 95 struct nvkm_device *device = subdev->device; 96 u32 process, message, data0, data1; 97 98 /* nothing to do if GET == PUT */ 99 u32 addr = nvkm_rd32(device, 0x10a4cc); 100 if (addr == nvkm_rd32(device, 0x10a4c8)) 101 return; 102 103 /* acquire data segment access */ 104 do { 105 nvkm_wr32(device, 0x10a580, 0x00000002); 106 } while (nvkm_rd32(device, 0x10a580) != 0x00000002); 107 108 /* read the packet */ 109 nvkm_wr32(device, 0x10a1c0, 0x02000000 | (((addr & 0x07) << 4) + 110 pmu->recv.base)); 111 process = nvkm_rd32(device, 0x10a1c4); 112 message = nvkm_rd32(device, 0x10a1c4); 113 data0 = nvkm_rd32(device, 0x10a1c4); 114 data1 = nvkm_rd32(device, 0x10a1c4); 115 nvkm_wr32(device, 0x10a4cc, (addr + 1) & 0x0f); 116 117 /* release data segment access */ 118 nvkm_wr32(device, 0x10a580, 0x00000000); 119 120 /* wake process if it's waiting on a synchronous reply */ 121 if (pmu->recv.process) { 122 if (process == pmu->recv.process && 123 message == pmu->recv.message) { 124 pmu->recv.data[0] = data0; 125 pmu->recv.data[1] = data1; 126 pmu->recv.process = 0; 127 wake_up(&pmu->recv.wait); 128 return; 129 } 130 } 131 132 /* right now there's no other expected responses from the engine, 133 * so assume that any unexpected message is an error. 134 */ 135 nvkm_warn(subdev, "%c%c%c%c %08x %08x %08x %08x\n", 136 (char)((process & 0x000000ff) >> 0), 137 (char)((process & 0x0000ff00) >> 8), 138 (char)((process & 0x00ff0000) >> 16), 139 (char)((process & 0xff000000) >> 24), 140 process, message, data0, data1); 141 } 142 143 static void 144 nvkm_pmu_intr(struct nvkm_subdev *subdev) 145 { 146 struct nvkm_pmu *pmu = nvkm_pmu(subdev); 147 struct nvkm_device *device = pmu->subdev.device; 148 u32 disp = nvkm_rd32(device, 0x10a01c); 149 u32 intr = nvkm_rd32(device, 0x10a008) & disp & ~(disp >> 16); 150 151 if (intr & 0x00000020) { 152 u32 stat = nvkm_rd32(device, 0x10a16c); 153 if (stat & 0x80000000) { 154 nvkm_error(subdev, "UAS fault at %06x addr %08x\n", 155 stat & 0x00ffffff, 156 nvkm_rd32(device, 0x10a168)); 157 nvkm_wr32(device, 0x10a16c, 0x00000000); 158 intr &= ~0x00000020; 159 } 160 } 161 162 if (intr & 0x00000040) { 163 schedule_work(&pmu->recv.work); 164 nvkm_wr32(device, 0x10a004, 0x00000040); 165 intr &= ~0x00000040; 166 } 167 168 if (intr & 0x00000080) { 169 nvkm_info(subdev, "wr32 %06x %08x\n", 170 nvkm_rd32(device, 0x10a7a0), 171 nvkm_rd32(device, 0x10a7a4)); 172 nvkm_wr32(device, 0x10a004, 0x00000080); 173 intr &= ~0x00000080; 174 } 175 176 if (intr) { 177 nvkm_error(subdev, "intr %08x\n", intr); 178 nvkm_wr32(device, 0x10a004, intr); 179 } 180 } 181 182 static int 183 nvkm_pmu_fini(struct nvkm_subdev *subdev, bool suspend) 184 { 185 struct nvkm_pmu *pmu = nvkm_pmu(subdev); 186 struct nvkm_device *device = pmu->subdev.device; 187 188 nvkm_wr32(device, 0x10a014, 0x00000060); 189 flush_work(&pmu->recv.work); 190 return 0; 191 } 192 193 static int 194 nvkm_pmu_init(struct nvkm_subdev *subdev) 195 { 196 struct nvkm_pmu *pmu = nvkm_pmu(subdev); 197 struct nvkm_device *device = pmu->subdev.device; 198 int i; 199 200 /* prevent previous ucode from running, wait for idle, reset */ 201 nvkm_wr32(device, 0x10a014, 0x0000ffff); /* INTR_EN_CLR = ALL */ 202 nvkm_msec(device, 2000, 203 if (!nvkm_rd32(device, 0x10a04c)) 204 break; 205 ); 206 nvkm_mask(device, 0x000200, 0x00002000, 0x00000000); 207 nvkm_mask(device, 0x000200, 0x00002000, 0x00002000); 208 nvkm_rd32(device, 0x000200); 209 nvkm_msec(device, 2000, 210 if (!(nvkm_rd32(device, 0x10a10c) & 0x00000006)) 211 break; 212 ); 213 214 /* upload data segment */ 215 nvkm_wr32(device, 0x10a1c0, 0x01000000); 216 for (i = 0; i < pmu->func->data.size / 4; i++) 217 nvkm_wr32(device, 0x10a1c4, pmu->func->data.data[i]); 218 219 /* upload code segment */ 220 nvkm_wr32(device, 0x10a180, 0x01000000); 221 for (i = 0; i < pmu->func->code.size / 4; i++) { 222 if ((i & 0x3f) == 0) 223 nvkm_wr32(device, 0x10a188, i >> 6); 224 nvkm_wr32(device, 0x10a184, pmu->func->code.data[i]); 225 } 226 227 /* start it running */ 228 nvkm_wr32(device, 0x10a10c, 0x00000000); 229 nvkm_wr32(device, 0x10a104, 0x00000000); 230 nvkm_wr32(device, 0x10a100, 0x00000002); 231 232 /* wait for valid host->pmu ring configuration */ 233 if (nvkm_msec(device, 2000, 234 if (nvkm_rd32(device, 0x10a4d0)) 235 break; 236 ) < 0) 237 return -EBUSY; 238 pmu->send.base = nvkm_rd32(device, 0x10a4d0) & 0x0000ffff; 239 pmu->send.size = nvkm_rd32(device, 0x10a4d0) >> 16; 240 241 /* wait for valid pmu->host ring configuration */ 242 if (nvkm_msec(device, 2000, 243 if (nvkm_rd32(device, 0x10a4dc)) 244 break; 245 ) < 0) 246 return -EBUSY; 247 pmu->recv.base = nvkm_rd32(device, 0x10a4dc) & 0x0000ffff; 248 pmu->recv.size = nvkm_rd32(device, 0x10a4dc) >> 16; 249 250 nvkm_wr32(device, 0x10a010, 0x000000e0); 251 return 0; 252 } 253 254 static void * 255 nvkm_pmu_dtor(struct nvkm_subdev *subdev) 256 { 257 return nvkm_pmu(subdev); 258 } 259 260 static const struct nvkm_subdev_func 261 nvkm_pmu = { 262 .dtor = nvkm_pmu_dtor, 263 .init = nvkm_pmu_init, 264 .fini = nvkm_pmu_fini, 265 .intr = nvkm_pmu_intr, 266 }; 267 268 int 269 nvkm_pmu_new_(const struct nvkm_pmu_func *func, struct nvkm_device *device, 270 int index, struct nvkm_pmu **ppmu) 271 { 272 struct nvkm_pmu *pmu; 273 if (!(pmu = *ppmu = kzalloc(sizeof(*pmu), GFP_KERNEL))) 274 return -ENOMEM; 275 nvkm_subdev_ctor(&nvkm_pmu, device, index, 0, &pmu->subdev); 276 pmu->func = func; 277 INIT_WORK(&pmu->recv.work, nvkm_pmu_recv); 278 init_waitqueue_head(&pmu->recv.wait); 279 return 0; 280 } 281