1 /* 2 * Copyright 2015 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs <bskeggs@redhat.com> 23 */ 24 #include "priv.h" 25 #include "agp.h" 26 27 #include <core/option.h> 28 #include <core/pci.h> 29 #include <subdev/mc.h> 30 31 u32 32 nvkm_pci_rd32(struct nvkm_pci *pci, u16 addr) 33 { 34 return pci->func->rd32(pci, addr); 35 } 36 37 void 38 nvkm_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data) 39 { 40 pci->func->wr08(pci, addr, data); 41 } 42 43 void 44 nvkm_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data) 45 { 46 pci->func->wr32(pci, addr, data); 47 } 48 49 void 50 nvkm_pci_rom_shadow(struct nvkm_pci *pci, bool shadow) 51 { 52 u32 data = nvkm_pci_rd32(pci, 0x0050); 53 if (shadow) 54 data |= 0x00000001; 55 else 56 data &= ~0x00000001; 57 nvkm_pci_wr32(pci, 0x0050, data); 58 } 59 60 static irqreturn_t 61 nvkm_pci_intr(int irq, void *arg) 62 { 63 struct nvkm_pci *pci = arg; 64 struct nvkm_mc *mc = pci->subdev.device->mc; 65 bool handled = false; 66 if (likely(mc)) { 67 nvkm_mc_intr_unarm(mc); 68 if (pci->msi) 69 pci->func->msi_rearm(pci); 70 nvkm_mc_intr(mc, &handled); 71 nvkm_mc_intr_rearm(mc); 72 } 73 return handled ? IRQ_HANDLED : IRQ_NONE; 74 } 75 76 static int 77 nvkm_pci_fini(struct nvkm_subdev *subdev, bool suspend) 78 { 79 struct nvkm_pci *pci = nvkm_pci(subdev); 80 81 if (pci->irq >= 0) { 82 free_irq(pci->irq, pci); 83 pci->irq = -1; 84 }; 85 86 if (pci->agp.bridge) 87 nvkm_agp_fini(pci); 88 89 return 0; 90 } 91 92 static int 93 nvkm_pci_preinit(struct nvkm_subdev *subdev) 94 { 95 struct nvkm_pci *pci = nvkm_pci(subdev); 96 if (pci->agp.bridge) 97 nvkm_agp_preinit(pci); 98 return 0; 99 } 100 101 static int 102 nvkm_pci_init(struct nvkm_subdev *subdev) 103 { 104 struct nvkm_pci *pci = nvkm_pci(subdev); 105 struct pci_dev *pdev = pci->pdev; 106 int ret; 107 108 if (pci->agp.bridge) { 109 ret = nvkm_agp_init(pci); 110 if (ret) 111 return ret; 112 } 113 114 ret = request_irq(pdev->irq, nvkm_pci_intr, IRQF_SHARED, "nvkm", pci); 115 if (ret) 116 return ret; 117 118 pci->irq = pdev->irq; 119 return ret; 120 } 121 122 static void * 123 nvkm_pci_dtor(struct nvkm_subdev *subdev) 124 { 125 struct nvkm_pci *pci = nvkm_pci(subdev); 126 nvkm_agp_dtor(pci); 127 if (pci->msi) 128 pci_disable_msi(pci->pdev); 129 return nvkm_pci(subdev); 130 } 131 132 static const struct nvkm_subdev_func 133 nvkm_pci_func = { 134 .dtor = nvkm_pci_dtor, 135 .preinit = nvkm_pci_preinit, 136 .init = nvkm_pci_init, 137 .fini = nvkm_pci_fini, 138 }; 139 140 int 141 nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device, 142 int index, struct nvkm_pci **ppci) 143 { 144 struct nvkm_pci *pci; 145 146 if (!(pci = *ppci = kzalloc(sizeof(**ppci), GFP_KERNEL))) 147 return -ENOMEM; 148 nvkm_subdev_ctor(&nvkm_pci_func, device, index, 0, &pci->subdev); 149 pci->func = func; 150 pci->pdev = device->func->pci(device)->pdev; 151 pci->irq = -1; 152 153 if (device->type == NVKM_DEVICE_AGP) 154 nvkm_agp_ctor(pci); 155 156 switch (pci->pdev->device & 0x0ff0) { 157 case 0x00f0: 158 case 0x02e0: 159 /* BR02? NFI how these would be handled yet exactly */ 160 break; 161 default: 162 switch (device->chipset) { 163 case 0xaa: 164 /* reported broken, nv also disable it */ 165 break; 166 default: 167 pci->msi = true; 168 break; 169 } 170 } 171 172 pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi); 173 if (pci->msi && func->msi_rearm) { 174 pci->msi = pci_enable_msi(pci->pdev) == 0; 175 if (pci->msi) 176 nvkm_debug(&pci->subdev, "MSI enabled\n"); 177 } else { 178 pci->msi = false; 179 } 180 181 return 0; 182 } 183