1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "nv04.h"
25 
26 const struct nvkm_mc_intr
27 nv04_mc_intr[] = {
28 	{ 0x00000001, NVDEV_ENGINE_MPEG },	/* NV17- MPEG/ME */
29 	{ 0x00000100, NVDEV_ENGINE_FIFO },
30 	{ 0x00001000, NVDEV_ENGINE_GR },
31 	{ 0x00010000, NVDEV_ENGINE_DISP },
32 	{ 0x00020000, NVDEV_ENGINE_VP },	/* NV40- */
33 	{ 0x00100000, NVDEV_SUBDEV_TIMER },
34 	{ 0x01000000, NVDEV_ENGINE_DISP },	/* NV04- PCRTC0 */
35 	{ 0x02000000, NVDEV_ENGINE_DISP },	/* NV11- PCRTC1 */
36 	{ 0x10000000, NVDEV_SUBDEV_BUS },
37 	{ 0x80000000, NVDEV_ENGINE_SW },
38 	{}
39 };
40 
41 int
42 nv04_mc_init(struct nvkm_object *object)
43 {
44 	struct nv04_mc_priv *priv = (void *)object;
45 
46 	nv_wr32(priv, 0x000200, 0xffffffff); /* everything enabled */
47 	nv_wr32(priv, 0x001850, 0x00000001); /* disable rom access */
48 
49 	return nvkm_mc_init(&priv->base);
50 }
51 
52 int
53 nv04_mc_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
54 	     struct nvkm_oclass *oclass, void *data, u32 size,
55 	     struct nvkm_object **pobject)
56 {
57 	struct nv04_mc_priv *priv;
58 	int ret;
59 
60 	ret = nvkm_mc_create(parent, engine, oclass, &priv);
61 	*pobject = nv_object(priv);
62 	if (ret)
63 		return ret;
64 
65 	return 0;
66 }
67 
68 struct nvkm_oclass *
69 nv04_mc_oclass = &(struct nvkm_mc_oclass) {
70 	.base.handle = NV_SUBDEV(MC, 0x04),
71 	.base.ofuncs = &(struct nvkm_ofuncs) {
72 		.ctor = nv04_mc_ctor,
73 		.dtor = _nvkm_mc_dtor,
74 		.init = nv04_mc_init,
75 		.fini = _nvkm_mc_fini,
76 	},
77 	.intr = nv04_mc_intr,
78 }.base;
79