1 /*
2  * Copyright 2016 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 static const struct nvkm_mc_map
27 gt215_mc_reset[] = {
28 	{ 0x04008000, NVKM_ENGINE_MSVLD },
29 	{ 0x01020000, NVKM_ENGINE_MSPDEC },
30 	{ 0x00802000, NVKM_ENGINE_CE, 0 },
31 	{ 0x00400002, NVKM_ENGINE_MSPPP },
32 	{ 0x00201000, NVKM_ENGINE_GR },
33 	{ 0x00000100, NVKM_ENGINE_FIFO },
34 	{}
35 };
36 
37 static const struct nvkm_intr_data
38 gt215_mc_intrs[] = {
39 	{ NVKM_ENGINE_DISP  , 0, 0, 0x04000000, true },
40 	{ NVKM_ENGINE_CE    , 0, 0, 0x00400000, true },
41 	{ NVKM_ENGINE_MSPDEC, 0, 0, 0x00020000, true },
42 	{ NVKM_ENGINE_MSVLD , 0, 0, 0x00008000, true },
43 	{ NVKM_ENGINE_GR    , 0, 0, 0x00001000, true },
44 	{ NVKM_ENGINE_FIFO  , 0, 0, 0x00000100 },
45 	{ NVKM_ENGINE_MSPPP , 0, 0, 0x00000001, true },
46 	{ NVKM_SUBDEV_FB    , 0, 0, 0x00429101, true },
47 	{ NVKM_SUBDEV_BUS   , 0, 0, 0x10000000, true },
48 	{ NVKM_SUBDEV_GPIO  , 0, 0, 0x00200000, true },
49 	{ NVKM_SUBDEV_I2C   , 0, 0, 0x00200000, true },
50 	{ NVKM_SUBDEV_TIMER , 0, 0, 0x00100000, true },
51 	{ NVKM_SUBDEV_THERM , 0, 0, 0x00080000, true },
52 	{ NVKM_SUBDEV_PMU   , 0, 0, 0x00040000, true },
53 	{},
54 };
55 
56 static void
57 gt215_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask)
58 {
59 	struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
60 
61 	nvkm_mask(mc->subdev.device, 0x000640 + (leaf * 4), mask, mask);
62 }
63 
64 static void
65 gt215_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask)
66 {
67 	struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
68 
69 	nvkm_mask(mc->subdev.device, 0x000640 + (leaf * 4), mask, 0);
70 }
71 
72 const struct nvkm_intr_func
73 gt215_mc_intr = {
74 	.pending = nv04_mc_intr_pending,
75 	.unarm = nv04_mc_intr_unarm,
76 	.rearm = nv04_mc_intr_rearm,
77 	.block = gt215_mc_intr_block,
78 	.allow = gt215_mc_intr_allow,
79 };
80 
81 static const struct nvkm_mc_func
82 gt215_mc = {
83 	.init = nv50_mc_init,
84 	.intr = &nv04_mc_intr,
85 	.intrs = gt215_mc_intrs,
86 	.device = &nv04_mc_device,
87 	.reset = gt215_mc_reset,
88 };
89 
90 int
91 gt215_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
92 {
93 	return nvkm_mc_new_(&gt215_mc, device, type, inst, pmc);
94 }
95