1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "priv.h" 25 26 const struct nvkm_intr_data 27 gp100_mc_intrs[] = { 28 { NVKM_ENGINE_DISP , 0, 0, 0x04000000, true }, 29 { NVKM_ENGINE_FIFO , 0, 0, 0x00000100 }, 30 { NVKM_SUBDEV_FAULT , 0, 0, 0x00000200, true }, 31 { NVKM_SUBDEV_PRIVRING, 0, 0, 0x40000000, true }, 32 { NVKM_SUBDEV_BUS , 0, 0, 0x10000000, true }, 33 { NVKM_SUBDEV_FB , 0, 0, 0x08002000, true }, 34 { NVKM_SUBDEV_LTC , 0, 0, 0x02000000, true }, 35 { NVKM_SUBDEV_PMU , 0, 0, 0x01000000, true }, 36 { NVKM_SUBDEV_GPIO , 0, 0, 0x00200000, true }, 37 { NVKM_SUBDEV_I2C , 0, 0, 0x00200000, true }, 38 { NVKM_SUBDEV_TIMER , 0, 0, 0x00100000, true }, 39 { NVKM_SUBDEV_THERM , 0, 0, 0x00040000, true }, 40 { NVKM_SUBDEV_TOP , 0, 0, 0x00009000 }, 41 { NVKM_SUBDEV_TOP , 0, 0, 0xffff6fff, true }, 42 {}, 43 }; 44 45 static void 46 gp100_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask) 47 { 48 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); 49 50 nvkm_wr32(mc->subdev.device, 0x000160 + (leaf * 4), mask); 51 } 52 53 static void 54 gp100_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask) 55 { 56 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); 57 58 nvkm_wr32(mc->subdev.device, 0x000180 + (leaf * 4), mask); 59 } 60 61 static void 62 gp100_mc_intr_rearm(struct nvkm_intr *intr) 63 { 64 int i; 65 66 for (i = 0; i < intr->leaves; i++) 67 intr->func->allow(intr, i, intr->mask[i]); 68 } 69 70 static void 71 gp100_mc_intr_unarm(struct nvkm_intr *intr) 72 { 73 int i; 74 75 for (i = 0; i < intr->leaves; i++) 76 intr->func->block(intr, i, 0xffffffff); 77 } 78 79 const struct nvkm_intr_func 80 gp100_mc_intr = { 81 .pending = nv04_mc_intr_pending, 82 .unarm = gp100_mc_intr_unarm, 83 .rearm = gp100_mc_intr_rearm, 84 .block = gp100_mc_intr_block, 85 .allow = gp100_mc_intr_allow, 86 }; 87 88 static const struct nvkm_mc_func 89 gp100_mc = { 90 .init = nv50_mc_init, 91 .intr = &gp100_mc_intr, 92 .intrs = gp100_mc_intrs, 93 .intr_nonstall = true, 94 .device = &nv04_mc_device, 95 .reset = gk104_mc_reset, 96 }; 97 98 int 99 gp100_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc) 100 { 101 return nvkm_mc_new_(&gp100_mc, device, type, inst, pmc); 102 } 103