1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 #include <core/option.h>
27 
28 static inline void
29 nvkm_mc_unk260(struct nvkm_mc *mc, u32 data)
30 {
31 	const struct nvkm_mc_oclass *impl = (void *)nv_oclass(mc);
32 	if (impl->unk260)
33 		impl->unk260(mc, data);
34 }
35 
36 static inline u32
37 nvkm_mc_intr_mask(struct nvkm_mc *mc)
38 {
39 	u32 intr = nv_rd32(mc, 0x000100);
40 	if (intr == 0xffffffff) /* likely fallen off the bus */
41 		intr = 0x00000000;
42 	return intr;
43 }
44 
45 static irqreturn_t
46 nvkm_mc_intr(int irq, void *arg)
47 {
48 	struct nvkm_mc *mc = arg;
49 	const struct nvkm_mc_oclass *oclass = (void *)nv_object(mc)->oclass;
50 	const struct nvkm_mc_intr *map = oclass->intr;
51 	struct nvkm_subdev *unit;
52 	u32 intr;
53 
54 	nv_wr32(mc, 0x000140, 0x00000000);
55 	nv_rd32(mc, 0x000140);
56 	intr = nvkm_mc_intr_mask(mc);
57 	if (mc->use_msi)
58 		oclass->msi_rearm(mc);
59 
60 	if (intr) {
61 		u32 stat = intr = nvkm_mc_intr_mask(mc);
62 		while (map->stat) {
63 			if (intr & map->stat) {
64 				unit = nvkm_subdev(mc, map->unit);
65 				if (unit && unit->intr)
66 					unit->intr(unit);
67 				stat &= ~map->stat;
68 			}
69 			map++;
70 		}
71 
72 		if (stat)
73 			nv_error(mc, "unknown intr 0x%08x\n", stat);
74 	}
75 
76 	nv_wr32(mc, 0x000140, 0x00000001);
77 	return intr ? IRQ_HANDLED : IRQ_NONE;
78 }
79 
80 int
81 _nvkm_mc_fini(struct nvkm_object *object, bool suspend)
82 {
83 	struct nvkm_mc *mc = (void *)object;
84 	nv_wr32(mc, 0x000140, 0x00000000);
85 	return nvkm_subdev_fini(&mc->subdev, suspend);
86 }
87 
88 int
89 _nvkm_mc_init(struct nvkm_object *object)
90 {
91 	struct nvkm_mc *mc = (void *)object;
92 	int ret = nvkm_subdev_init(&mc->subdev);
93 	if (ret)
94 		return ret;
95 	nv_wr32(mc, 0x000140, 0x00000001);
96 	return 0;
97 }
98 
99 void
100 _nvkm_mc_dtor(struct nvkm_object *object)
101 {
102 	struct nvkm_device *device = nv_device(object);
103 	struct nvkm_mc *mc = (void *)object;
104 	free_irq(mc->irq, mc);
105 	if (mc->use_msi)
106 		pci_disable_msi(device->pdev);
107 	nvkm_subdev_destroy(&mc->subdev);
108 }
109 
110 int
111 nvkm_mc_create_(struct nvkm_object *parent, struct nvkm_object *engine,
112 		struct nvkm_oclass *bclass, int length, void **pobject)
113 {
114 	const struct nvkm_mc_oclass *oclass = (void *)bclass;
115 	struct nvkm_device *device = nv_device(parent);
116 	struct nvkm_mc *mc;
117 	int ret;
118 
119 	ret = nvkm_subdev_create_(parent, engine, bclass, 0, "PMC",
120 				  "master", length, pobject);
121 	mc = *pobject;
122 	if (ret)
123 		return ret;
124 
125 	mc->unk260 = nvkm_mc_unk260;
126 
127 	if (nv_device_is_pci(device)) {
128 		switch (device->pdev->device & 0x0ff0) {
129 		case 0x00f0:
130 		case 0x02e0:
131 			/* BR02? NFI how these would be handled yet exactly */
132 			break;
133 		default:
134 			switch (device->chipset) {
135 			case 0xaa:
136 				/* reported broken, nv also disable it */
137 				break;
138 			default:
139 				mc->use_msi = true;
140 				break;
141 			}
142 		}
143 
144 		mc->use_msi = nvkm_boolopt(device->cfgopt, "NvMSI",
145 					    mc->use_msi);
146 
147 		if (mc->use_msi && oclass->msi_rearm) {
148 			mc->use_msi = pci_enable_msi(device->pdev) == 0;
149 			if (mc->use_msi) {
150 				nv_info(mc, "MSI interrupts enabled\n");
151 				oclass->msi_rearm(mc);
152 			}
153 		} else {
154 			mc->use_msi = false;
155 		}
156 	}
157 
158 	ret = nv_device_get_irq(device, true);
159 	if (ret < 0)
160 		return ret;
161 	mc->irq = ret;
162 
163 	ret = request_irq(mc->irq, nvkm_mc_intr, IRQF_SHARED, "nvkm", mc);
164 	if (ret < 0)
165 		return ret;
166 
167 	return 0;
168 }
169