1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "priv.h" 25 26 #include <core/option.h> 27 28 static inline void 29 nvkm_mc_unk260(struct nvkm_mc *mc, u32 data) 30 { 31 const struct nvkm_mc_oclass *impl = (void *)nv_oclass(mc); 32 if (impl->unk260) 33 impl->unk260(mc, data); 34 } 35 36 static inline u32 37 nvkm_mc_intr_mask(struct nvkm_mc *mc) 38 { 39 struct nvkm_device *device = mc->subdev.device; 40 u32 intr = nvkm_rd32(device, 0x000100); 41 if (intr == 0xffffffff) /* likely fallen off the bus */ 42 intr = 0x00000000; 43 return intr; 44 } 45 46 static irqreturn_t 47 nvkm_mc_intr(int irq, void *arg) 48 { 49 struct nvkm_mc *mc = arg; 50 struct nvkm_device *device = mc->subdev.device; 51 const struct nvkm_mc_oclass *oclass = (void *)nv_object(mc)->oclass; 52 const struct nvkm_mc_intr *map = oclass->intr; 53 struct nvkm_subdev *unit; 54 u32 intr; 55 56 nvkm_wr32(device, 0x000140, 0x00000000); 57 nvkm_rd32(device, 0x000140); 58 intr = nvkm_mc_intr_mask(mc); 59 if (mc->use_msi) 60 oclass->msi_rearm(mc); 61 62 if (intr) { 63 u32 stat = intr = nvkm_mc_intr_mask(mc); 64 while (map->stat) { 65 if (intr & map->stat) { 66 unit = nvkm_subdev(mc, map->unit); 67 if (unit && unit->intr) 68 unit->intr(unit); 69 stat &= ~map->stat; 70 } 71 map++; 72 } 73 74 if (stat) 75 nv_error(mc, "unknown intr 0x%08x\n", stat); 76 } 77 78 nvkm_wr32(device, 0x000140, 0x00000001); 79 return intr ? IRQ_HANDLED : IRQ_NONE; 80 } 81 82 int 83 _nvkm_mc_fini(struct nvkm_object *object, bool suspend) 84 { 85 struct nvkm_mc *mc = (void *)object; 86 struct nvkm_device *device = mc->subdev.device; 87 nvkm_wr32(device, 0x000140, 0x00000000); 88 return nvkm_subdev_fini(&mc->subdev, suspend); 89 } 90 91 int 92 _nvkm_mc_init(struct nvkm_object *object) 93 { 94 struct nvkm_mc *mc = (void *)object; 95 struct nvkm_device *device = mc->subdev.device; 96 int ret = nvkm_subdev_init(&mc->subdev); 97 if (ret) 98 return ret; 99 nvkm_wr32(device, 0x000140, 0x00000001); 100 return 0; 101 } 102 103 void 104 _nvkm_mc_dtor(struct nvkm_object *object) 105 { 106 struct nvkm_mc *mc = (void *)object; 107 struct nvkm_device *device = mc->subdev.device; 108 free_irq(mc->irq, mc); 109 if (mc->use_msi) 110 pci_disable_msi(device->pdev); 111 nvkm_subdev_destroy(&mc->subdev); 112 } 113 114 int 115 nvkm_mc_create_(struct nvkm_object *parent, struct nvkm_object *engine, 116 struct nvkm_oclass *bclass, int length, void **pobject) 117 { 118 const struct nvkm_mc_oclass *oclass = (void *)bclass; 119 struct nvkm_device *device = (void *)parent; 120 struct nvkm_mc *mc; 121 int ret; 122 123 ret = nvkm_subdev_create_(parent, engine, bclass, 0, "PMC", 124 "master", length, pobject); 125 mc = *pobject; 126 if (ret) 127 return ret; 128 129 mc->unk260 = nvkm_mc_unk260; 130 131 if (nv_device_is_pci(device)) { 132 switch (device->pdev->device & 0x0ff0) { 133 case 0x00f0: 134 case 0x02e0: 135 /* BR02? NFI how these would be handled yet exactly */ 136 break; 137 default: 138 switch (device->chipset) { 139 case 0xaa: 140 /* reported broken, nv also disable it */ 141 break; 142 default: 143 mc->use_msi = true; 144 break; 145 } 146 } 147 148 mc->use_msi = nvkm_boolopt(device->cfgopt, "NvMSI", 149 mc->use_msi); 150 151 if (mc->use_msi && oclass->msi_rearm) { 152 mc->use_msi = pci_enable_msi(device->pdev) == 0; 153 if (mc->use_msi) { 154 nv_info(mc, "MSI interrupts enabled\n"); 155 oclass->msi_rearm(mc); 156 } 157 } else { 158 mc->use_msi = false; 159 } 160 } 161 162 ret = nv_device_get_irq(device, true); 163 if (ret < 0) 164 return ret; 165 mc->irq = ret; 166 167 ret = request_irq(mc->irq, nvkm_mc_intr, IRQF_SHARED, "nvkm", mc); 168 if (ret < 0) 169 return ret; 170 171 return 0; 172 } 173