10d0d4982SThierry Reding /*
20d0d4982SThierry Reding * Copyright (c) 2019 NVIDIA Corporation.
30d0d4982SThierry Reding *
40d0d4982SThierry Reding * Permission is hereby granted, free of charge, to any person obtaining a
50d0d4982SThierry Reding * copy of this software and associated documentation files (the "Software"),
60d0d4982SThierry Reding * to deal in the Software without restriction, including without limitation
70d0d4982SThierry Reding * the rights to use, copy, modify, merge, publish, distribute, sublicense,
80d0d4982SThierry Reding * and/or sell copies of the Software, and to permit persons to whom the
90d0d4982SThierry Reding * Software is furnished to do so, subject to the following conditions:
100d0d4982SThierry Reding *
110d0d4982SThierry Reding * The above copyright notice and this permission notice shall be included in
120d0d4982SThierry Reding * all copies or substantial portions of the Software.
130d0d4982SThierry Reding *
140d0d4982SThierry Reding * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
150d0d4982SThierry Reding * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
160d0d4982SThierry Reding * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
170d0d4982SThierry Reding * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
180d0d4982SThierry Reding * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
190d0d4982SThierry Reding * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
200d0d4982SThierry Reding * OTHER DEALINGS IN THE SOFTWARE.
210d0d4982SThierry Reding *
220d0d4982SThierry Reding * Authors: Thierry Reding
230d0d4982SThierry Reding */
240d0d4982SThierry Reding
250d0d4982SThierry Reding #include "priv.h"
260d0d4982SThierry Reding
270d0d4982SThierry Reding static void
gp10b_ltc_init(struct nvkm_ltc * ltc)280d0d4982SThierry Reding gp10b_ltc_init(struct nvkm_ltc *ltc)
290d0d4982SThierry Reding {
300d0d4982SThierry Reding struct nvkm_device *device = ltc->subdev.device;
310d0d4982SThierry Reding struct iommu_fwspec *spec;
320d0d4982SThierry Reding
330d0d4982SThierry Reding nvkm_wr32(device, 0x17e27c, ltc->ltc_nr);
340d0d4982SThierry Reding nvkm_wr32(device, 0x17e000, ltc->ltc_nr);
350d0d4982SThierry Reding nvkm_wr32(device, 0x100800, ltc->ltc_nr);
360d0d4982SThierry Reding
370d0d4982SThierry Reding spec = dev_iommu_fwspec_get(device->dev);
380d0d4982SThierry Reding if (spec) {
390d0d4982SThierry Reding u32 sid = spec->ids[0] & 0xffff;
400d0d4982SThierry Reding
410d0d4982SThierry Reding /* stream ID */
420d0d4982SThierry Reding nvkm_wr32(device, 0x160000, sid << 2);
430d0d4982SThierry Reding }
440d0d4982SThierry Reding }
450d0d4982SThierry Reding
460d0d4982SThierry Reding static const struct nvkm_ltc_func
470d0d4982SThierry Reding gp10b_ltc = {
480d0d4982SThierry Reding .oneinit = gp100_ltc_oneinit,
490d0d4982SThierry Reding .init = gp10b_ltc_init,
500d0d4982SThierry Reding .intr = gp100_ltc_intr,
510d0d4982SThierry Reding .cbc_clear = gm107_ltc_cbc_clear,
520d0d4982SThierry Reding .cbc_wait = gm107_ltc_cbc_wait,
53*4500031fSBen Skeggs .zbc_color = 16,
54*4500031fSBen Skeggs .zbc_depth = 16,
550d0d4982SThierry Reding .zbc_clear_color = gm107_ltc_zbc_clear_color,
560d0d4982SThierry Reding .zbc_clear_depth = gm107_ltc_zbc_clear_depth,
570d0d4982SThierry Reding .zbc_clear_stencil = gp102_ltc_zbc_clear_stencil,
580d0d4982SThierry Reding .invalidate = gf100_ltc_invalidate,
590d0d4982SThierry Reding .flush = gf100_ltc_flush,
600d0d4982SThierry Reding };
610d0d4982SThierry Reding
620d0d4982SThierry Reding int
gp10b_ltc_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_ltc ** pltc)630afc1c4cSBen Skeggs gp10b_ltc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
640afc1c4cSBen Skeggs struct nvkm_ltc **pltc)
650d0d4982SThierry Reding {
660afc1c4cSBen Skeggs return nvkm_ltc_new_(&gp10b_ltc, device, type, inst, pltc);
670d0d4982SThierry Reding }
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