1 /* 2 * Copyright 2014 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "priv.h" 25 26 #include <subdev/fb.h> 27 #include <subdev/timer.h> 28 29 static void 30 gm107_ltc_cbc_clear(struct nvkm_ltc_priv *ltc, u32 start, u32 limit) 31 { 32 struct nvkm_device *device = ltc->base.subdev.device; 33 nvkm_wr32(device, 0x17e270, start); 34 nvkm_wr32(device, 0x17e274, limit); 35 nvkm_wr32(device, 0x17e26c, 0x00000004); 36 } 37 38 static void 39 gm107_ltc_cbc_wait(struct nvkm_ltc_priv *ltc) 40 { 41 struct nvkm_device *device = ltc->base.subdev.device; 42 int c, s; 43 for (c = 0; c < ltc->ltc_nr; c++) { 44 for (s = 0; s < ltc->lts_nr; s++) { 45 const u32 addr = 0x14046c + (c * 0x2000) + (s * 0x200); 46 nvkm_msec(device, 2000, 47 if (!nvkm_rd32(device, addr)) 48 break; 49 ); 50 } 51 } 52 } 53 54 static void 55 gm107_ltc_zbc_clear_color(struct nvkm_ltc_priv *ltc, int i, const u32 color[4]) 56 { 57 struct nvkm_device *device = ltc->base.subdev.device; 58 nvkm_mask(device, 0x17e338, 0x0000000f, i); 59 nvkm_wr32(device, 0x17e33c, color[0]); 60 nvkm_wr32(device, 0x17e340, color[1]); 61 nvkm_wr32(device, 0x17e344, color[2]); 62 nvkm_wr32(device, 0x17e348, color[3]); 63 } 64 65 static void 66 gm107_ltc_zbc_clear_depth(struct nvkm_ltc_priv *ltc, int i, const u32 depth) 67 { 68 struct nvkm_device *device = ltc->base.subdev.device; 69 nvkm_mask(device, 0x17e338, 0x0000000f, i); 70 nvkm_wr32(device, 0x17e34c, depth); 71 } 72 73 static void 74 gm107_ltc_lts_isr(struct nvkm_ltc_priv *ltc, int c, int s) 75 { 76 struct nvkm_subdev *subdev = <c->base.subdev; 77 struct nvkm_device *device = subdev->device; 78 u32 base = 0x140000 + (c * 0x2000) + (s * 0x400); 79 u32 stat = nvkm_rd32(device, base + 0x00c); 80 81 if (stat) { 82 nvkm_error(subdev, "LTC%d_LTS%d: %08x\n", c, s, stat); 83 nvkm_wr32(device, base + 0x00c, stat); 84 } 85 } 86 87 static void 88 gm107_ltc_intr(struct nvkm_subdev *subdev) 89 { 90 struct nvkm_ltc_priv *ltc = (void *)subdev; 91 struct nvkm_device *device = ltc->base.subdev.device; 92 u32 mask; 93 94 mask = nvkm_rd32(device, 0x00017c); 95 while (mask) { 96 u32 s, c = __ffs(mask); 97 for (s = 0; s < ltc->lts_nr; s++) 98 gm107_ltc_lts_isr(ltc, c, s); 99 mask &= ~(1 << c); 100 } 101 } 102 103 static int 104 gm107_ltc_init(struct nvkm_object *object) 105 { 106 struct nvkm_ltc_priv *ltc = (void *)object; 107 struct nvkm_device *device = ltc->base.subdev.device; 108 u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001); 109 int ret; 110 111 ret = nvkm_ltc_init(ltc); 112 if (ret) 113 return ret; 114 115 nvkm_wr32(device, 0x17e27c, ltc->ltc_nr); 116 nvkm_wr32(device, 0x17e278, ltc->tag_base); 117 nvkm_mask(device, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000); 118 return 0; 119 } 120 121 static int 122 gm107_ltc_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 123 struct nvkm_oclass *oclass, void *data, u32 size, 124 struct nvkm_object **pobject) 125 { 126 struct nvkm_device *device = (void *)parent; 127 struct nvkm_fb *fb = device->fb; 128 struct nvkm_ltc_priv *ltc; 129 u32 parts, mask; 130 int ret, i; 131 132 ret = nvkm_ltc_create(parent, engine, oclass, <c); 133 *pobject = nv_object(ltc); 134 if (ret) 135 return ret; 136 137 parts = nvkm_rd32(device, 0x022438); 138 mask = nvkm_rd32(device, 0x021c14); 139 for (i = 0; i < parts; i++) { 140 if (!(mask & (1 << i))) 141 ltc->ltc_nr++; 142 } 143 ltc->lts_nr = nvkm_rd32(device, 0x17e280) >> 28; 144 145 ret = gf100_ltc_init_tag_ram(fb, ltc); 146 if (ret) 147 return ret; 148 149 return 0; 150 } 151 152 struct nvkm_oclass * 153 gm107_ltc_oclass = &(struct nvkm_ltc_impl) { 154 .base.handle = NV_SUBDEV(LTC, 0xff), 155 .base.ofuncs = &(struct nvkm_ofuncs) { 156 .ctor = gm107_ltc_ctor, 157 .dtor = gf100_ltc_dtor, 158 .init = gm107_ltc_init, 159 .fini = _nvkm_ltc_fini, 160 }, 161 .intr = gm107_ltc_intr, 162 .cbc_clear = gm107_ltc_cbc_clear, 163 .cbc_wait = gm107_ltc_cbc_wait, 164 .zbc = 16, 165 .zbc_clear_color = gm107_ltc_zbc_clear_color, 166 .zbc_clear_depth = gm107_ltc_zbc_clear_depth, 167 }.base; 168