1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "nv04.h" 25 26 #include <core/ramht.h> 27 28 /****************************************************************************** 29 * instmem object implementation 30 *****************************************************************************/ 31 32 static u32 33 nv04_instobj_rd32(struct nvkm_object *object, u64 addr) 34 { 35 struct nvkm_instmem *imem = nvkm_instmem(object); 36 struct nv04_instobj *node = (void *)object; 37 return imem->func->rd32(imem, node->mem->offset + addr); 38 } 39 40 static void 41 nv04_instobj_wr32(struct nvkm_object *object, u64 addr, u32 data) 42 { 43 struct nvkm_instmem *imem = nvkm_instmem(object); 44 struct nv04_instobj *node = (void *)object; 45 imem->func->wr32(imem, node->mem->offset + addr, data); 46 } 47 48 static void 49 nv04_instobj_dtor(struct nvkm_object *object) 50 { 51 struct nv04_instmem *imem = (void *)nvkm_instmem(object); 52 struct nv04_instobj *node = (void *)object; 53 mutex_lock(&imem->base.subdev.mutex); 54 nvkm_mm_free(&imem->heap, &node->mem); 55 mutex_unlock(&imem->base.subdev.mutex); 56 nvkm_instobj_destroy(&node->base); 57 } 58 59 static int 60 nv04_instobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 61 struct nvkm_oclass *oclass, void *data, u32 size, 62 struct nvkm_object **pobject) 63 { 64 struct nv04_instmem *imem = (void *)nvkm_instmem(parent); 65 struct nv04_instobj *node; 66 struct nvkm_instobj_args *args = data; 67 int ret; 68 69 if (!args->align) 70 args->align = 1; 71 72 ret = nvkm_instobj_create(parent, engine, oclass, &node); 73 *pobject = nv_object(node); 74 if (ret) 75 return ret; 76 77 mutex_lock(&imem->base.subdev.mutex); 78 ret = nvkm_mm_head(&imem->heap, 0, 1, args->size, args->size, 79 args->align, &node->mem); 80 mutex_unlock(&imem->base.subdev.mutex); 81 if (ret) 82 return ret; 83 84 node->base.addr = node->mem->offset; 85 node->base.size = node->mem->length; 86 return 0; 87 } 88 89 struct nvkm_instobj_impl 90 nv04_instobj_oclass = { 91 .base.ofuncs = &(struct nvkm_ofuncs) { 92 .ctor = nv04_instobj_ctor, 93 .dtor = nv04_instobj_dtor, 94 .init = _nvkm_instobj_init, 95 .fini = _nvkm_instobj_fini, 96 .rd32 = nv04_instobj_rd32, 97 .wr32 = nv04_instobj_wr32, 98 }, 99 }; 100 101 /****************************************************************************** 102 * instmem subdev implementation 103 *****************************************************************************/ 104 105 static u32 106 nv04_instmem_rd32(struct nvkm_instmem *imem, u32 addr) 107 { 108 return nvkm_rd32(imem->subdev.device, 0x700000 + addr); 109 } 110 111 static void 112 nv04_instmem_wr32(struct nvkm_instmem *imem, u32 addr, u32 data) 113 { 114 nvkm_wr32(imem->subdev.device, 0x700000 + addr, data); 115 } 116 117 void 118 nv04_instmem_dtor(struct nvkm_object *object) 119 { 120 struct nv04_instmem *imem = (void *)object; 121 nvkm_gpuobj_ref(NULL, &imem->ramfc); 122 nvkm_gpuobj_ref(NULL, &imem->ramro); 123 nvkm_ramht_ref(NULL, &imem->ramht); 124 nvkm_gpuobj_ref(NULL, &imem->vbios); 125 nvkm_mm_fini(&imem->heap); 126 if (imem->iomem) 127 iounmap(imem->iomem); 128 nvkm_instmem_destroy(&imem->base); 129 } 130 131 static const struct nvkm_instmem_func 132 nv04_instmem_func = { 133 .rd32 = nv04_instmem_rd32, 134 .wr32 = nv04_instmem_wr32, 135 }; 136 137 static int 138 nv04_instmem_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 139 struct nvkm_oclass *oclass, void *data, u32 size, 140 struct nvkm_object **pobject) 141 { 142 struct nv04_instmem *imem; 143 int ret; 144 145 ret = nvkm_instmem_create(parent, engine, oclass, &imem); 146 *pobject = nv_object(imem); 147 if (ret) 148 return ret; 149 150 imem->base.func = &nv04_instmem_func; 151 152 /* PRAMIN aperture maps over the end of VRAM, reserve it */ 153 imem->base.reserved = 512 * 1024; 154 155 ret = nvkm_mm_init(&imem->heap, 0, imem->base.reserved, 1); 156 if (ret) 157 return ret; 158 159 /* 0x00000-0x10000: reserve for probable vbios image */ 160 ret = nvkm_gpuobj_new(nv_object(imem), NULL, 0x10000, 0, 0, 161 &imem->vbios); 162 if (ret) 163 return ret; 164 165 /* 0x10000-0x18000: reserve for RAMHT */ 166 ret = nvkm_ramht_new(nv_object(imem), NULL, 0x08000, 0, &imem->ramht); 167 if (ret) 168 return ret; 169 170 /* 0x18000-0x18800: reserve for RAMFC (enough for 32 nv30 channels) */ 171 ret = nvkm_gpuobj_new(nv_object(imem), NULL, 0x00800, 0, 172 NVOBJ_FLAG_ZERO_ALLOC, &imem->ramfc); 173 if (ret) 174 return ret; 175 176 /* 0x18800-0x18a00: reserve for RAMRO */ 177 ret = nvkm_gpuobj_new(nv_object(imem), NULL, 0x00200, 0, 0, 178 &imem->ramro); 179 if (ret) 180 return ret; 181 182 return 0; 183 } 184 185 struct nvkm_oclass * 186 nv04_instmem_oclass = &(struct nvkm_instmem_impl) { 187 .base.handle = NV_SUBDEV(INSTMEM, 0x04), 188 .base.ofuncs = &(struct nvkm_ofuncs) { 189 .ctor = nv04_instmem_ctor, 190 .dtor = nv04_instmem_dtor, 191 .init = _nvkm_instmem_init, 192 .fini = _nvkm_instmem_fini, 193 }, 194 .instobj = &nv04_instobj_oclass.base, 195 }.base; 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