1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "priv.h" 25 26 #include <subdev/vga.h> 27 28 struct nv4e_i2c_priv { 29 struct nvkm_i2c base; 30 }; 31 32 struct nv4e_i2c_port { 33 struct nvkm_i2c_port base; 34 u32 addr; 35 }; 36 37 static void 38 nv4e_i2c_drive_scl(struct nvkm_i2c_port *base, int state) 39 { 40 struct nv4e_i2c_priv *priv = (void *)nvkm_i2c(base); 41 struct nv4e_i2c_port *port = (void *)base; 42 nv_mask(priv, port->addr, 0x2f, state ? 0x21 : 0x01); 43 } 44 45 static void 46 nv4e_i2c_drive_sda(struct nvkm_i2c_port *base, int state) 47 { 48 struct nv4e_i2c_priv *priv = (void *)nvkm_i2c(base); 49 struct nv4e_i2c_port *port = (void *)base; 50 nv_mask(priv, port->addr, 0x1f, state ? 0x11 : 0x01); 51 } 52 53 static int 54 nv4e_i2c_sense_scl(struct nvkm_i2c_port *base) 55 { 56 struct nv4e_i2c_priv *priv = (void *)nvkm_i2c(base); 57 struct nv4e_i2c_port *port = (void *)base; 58 return !!(nv_rd32(priv, port->addr) & 0x00040000); 59 } 60 61 static int 62 nv4e_i2c_sense_sda(struct nvkm_i2c_port *base) 63 { 64 struct nv4e_i2c_priv *priv = (void *)nvkm_i2c(base); 65 struct nv4e_i2c_port *port = (void *)base; 66 return !!(nv_rd32(priv, port->addr) & 0x00080000); 67 } 68 69 static const struct nvkm_i2c_func 70 nv4e_i2c_func = { 71 .drive_scl = nv4e_i2c_drive_scl, 72 .drive_sda = nv4e_i2c_drive_sda, 73 .sense_scl = nv4e_i2c_sense_scl, 74 .sense_sda = nv4e_i2c_sense_sda, 75 }; 76 77 static int 78 nv4e_i2c_port_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 79 struct nvkm_oclass *oclass, void *data, u32 index, 80 struct nvkm_object **pobject) 81 { 82 struct dcb_i2c_entry *info = data; 83 struct nv4e_i2c_port *port; 84 int ret; 85 86 ret = nvkm_i2c_port_create(parent, engine, oclass, index, 87 &nvkm_i2c_bit_algo, &nv4e_i2c_func, &port); 88 *pobject = nv_object(port); 89 if (ret) 90 return ret; 91 92 port->addr = 0x600800 + info->drive; 93 return 0; 94 } 95 96 static struct nvkm_oclass 97 nv4e_i2c_sclass[] = { 98 { .handle = NV_I2C_TYPE_DCBI2C(DCB_I2C_NV4E_BIT), 99 .ofuncs = &(struct nvkm_ofuncs) { 100 .ctor = nv4e_i2c_port_ctor, 101 .dtor = _nvkm_i2c_port_dtor, 102 .init = _nvkm_i2c_port_init, 103 .fini = _nvkm_i2c_port_fini, 104 }, 105 }, 106 {} 107 }; 108 109 struct nvkm_oclass * 110 nv4e_i2c_oclass = &(struct nvkm_i2c_impl) { 111 .base.handle = NV_SUBDEV(I2C, 0x4e), 112 .base.ofuncs = &(struct nvkm_ofuncs) { 113 .ctor = _nvkm_i2c_ctor, 114 .dtor = _nvkm_i2c_dtor, 115 .init = _nvkm_i2c_init, 116 .fini = _nvkm_i2c_fini, 117 }, 118 .sclass = nv4e_i2c_sclass, 119 .pad_x = &nv04_i2c_pad_oclass, 120 }.base; 121