1 /* 2 * Copyright 2013 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #define mcp77_ram(p) container_of((p), struct mcp77_ram, base) 25 #include "ram.h" 26 27 struct mcp77_ram { 28 struct nvkm_ram base; 29 u64 poller_base; 30 }; 31 32 static int 33 mcp77_ram_init(struct nvkm_ram *base) 34 { 35 struct mcp77_ram *ram = mcp77_ram(base); 36 struct nvkm_device *device = ram->base.fb->subdev.device; 37 u32 dniso = ((ram->base.size - (ram->poller_base + 0x00)) >> 5) - 1; 38 u32 hostnb = ((ram->base.size - (ram->poller_base + 0x20)) >> 5) - 1; 39 u32 flush = ((ram->base.size - (ram->poller_base + 0x40)) >> 5) - 1; 40 41 /* Enable NISO poller for various clients and set their associated 42 * read address, only for MCP77/78 and MCP79/7A. (fd#27501) 43 */ 44 nvkm_wr32(device, 0x100c18, dniso); 45 nvkm_mask(device, 0x100c14, 0x00000000, 0x00000001); 46 nvkm_wr32(device, 0x100c1c, hostnb); 47 nvkm_mask(device, 0x100c14, 0x00000000, 0x00000002); 48 nvkm_wr32(device, 0x100c24, flush); 49 nvkm_mask(device, 0x100c14, 0x00000000, 0x00010000); 50 return 0; 51 } 52 53 static const struct nvkm_ram_func 54 mcp77_ram_func = { 55 .init = mcp77_ram_init, 56 }; 57 58 int 59 mcp77_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram) 60 { 61 struct nvkm_device *device = fb->subdev.device; 62 u32 rsvd_head = ( 256 * 1024); /* vga memory */ 63 u32 rsvd_tail = (1024 * 1024) + 0x1000; /* vbios etc + poller mem */ 64 u64 base = (u64)nvkm_rd32(device, 0x100e10) << 12; 65 u64 size = (u64)nvkm_rd32(device, 0x100e14) << 12; 66 struct mcp77_ram *ram; 67 int ret; 68 69 if (!(ram = kzalloc(sizeof(*ram), GFP_KERNEL))) 70 return -ENOMEM; 71 *pram = &ram->base; 72 73 ret = nvkm_ram_ctor(&mcp77_ram_func, fb, NVKM_RAM_TYPE_STOLEN, 74 size, &ram->base); 75 if (ret) 76 return ret; 77 78 ram->poller_base = size - rsvd_tail; 79 ram->base.stolen = base; 80 nvkm_mm_fini(&ram->base.vram); 81 82 return nvkm_mm_init(&ram->base.vram, NVKM_RAM_MM_NORMAL, 83 rsvd_head >> NVKM_RAM_MM_SHIFT, 84 (size - rsvd_head - rsvd_tail) >> 85 NVKM_RAM_MM_SHIFT, 1); 86 } 87