1c39f472eSBen Skeggs /* 2c39f472eSBen Skeggs * Copyright (C) 2010 Francisco Jerez. 3c39f472eSBen Skeggs * All Rights Reserved. 4c39f472eSBen Skeggs * 5c39f472eSBen Skeggs * Permission is hereby granted, free of charge, to any person obtaining 6c39f472eSBen Skeggs * a copy of this software and associated documentation files (the 7c39f472eSBen Skeggs * "Software"), to deal in the Software without restriction, including 8c39f472eSBen Skeggs * without limitation the rights to use, copy, modify, merge, publish, 9c39f472eSBen Skeggs * distribute, sublicense, and/or sell copies of the Software, and to 10c39f472eSBen Skeggs * permit persons to whom the Software is furnished to do so, subject to 11c39f472eSBen Skeggs * the following conditions: 12c39f472eSBen Skeggs * 13c39f472eSBen Skeggs * The above copyright notice and this permission notice (including the 14c39f472eSBen Skeggs * next paragraph) shall be included in all copies or substantial 15c39f472eSBen Skeggs * portions of the Software. 16c39f472eSBen Skeggs * 17c39f472eSBen Skeggs * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18c39f472eSBen Skeggs * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19c39f472eSBen Skeggs * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20c39f472eSBen Skeggs * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21c39f472eSBen Skeggs * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22c39f472eSBen Skeggs * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23c39f472eSBen Skeggs * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24c39f472eSBen Skeggs * 25c39f472eSBen Skeggs */ 26c39f472eSBen Skeggs #include "nv04.h" 27c39f472eSBen Skeggs 28c39f472eSBen Skeggs void 29639c308eSBen Skeggs nv30_fb_tile_init(struct nvkm_fb *pfb, int i, u32 addr, u32 size, u32 pitch, 30639c308eSBen Skeggs u32 flags, struct nvkm_fb_tile *tile) 31c39f472eSBen Skeggs { 32c39f472eSBen Skeggs /* for performance, select alternate bank offset for zeta */ 33c39f472eSBen Skeggs if (!(flags & 4)) { 34c39f472eSBen Skeggs tile->addr = (0 << 4); 35c39f472eSBen Skeggs } else { 36c39f472eSBen Skeggs if (pfb->tile.comp) /* z compression */ 37c39f472eSBen Skeggs pfb->tile.comp(pfb, i, size, flags, tile); 38c39f472eSBen Skeggs tile->addr = (1 << 4); 39c39f472eSBen Skeggs } 40c39f472eSBen Skeggs 41c39f472eSBen Skeggs tile->addr |= 0x00000001; /* enable */ 42c39f472eSBen Skeggs tile->addr |= addr; 43c39f472eSBen Skeggs tile->limit = max(1u, addr + size) - 1; 44c39f472eSBen Skeggs tile->pitch = pitch; 45c39f472eSBen Skeggs } 46c39f472eSBen Skeggs 47c39f472eSBen Skeggs static void 48639c308eSBen Skeggs nv30_fb_tile_comp(struct nvkm_fb *pfb, int i, u32 size, u32 flags, 49639c308eSBen Skeggs struct nvkm_fb_tile *tile) 50c39f472eSBen Skeggs { 51c39f472eSBen Skeggs u32 tiles = DIV_ROUND_UP(size, 0x40); 52c39f472eSBen Skeggs u32 tags = round_up(tiles / pfb->ram->parts, 0x40); 53639c308eSBen Skeggs if (!nvkm_mm_head(&pfb->tags, 0, 1, tags, tags, 1, &tile->tag)) { 54c39f472eSBen Skeggs if (flags & 2) tile->zcomp |= 0x01000000; /* Z16 */ 55c39f472eSBen Skeggs else tile->zcomp |= 0x02000000; /* Z24S8 */ 56c39f472eSBen Skeggs tile->zcomp |= ((tile->tag->offset ) >> 6); 57c39f472eSBen Skeggs tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 12; 58c39f472eSBen Skeggs #ifdef __BIG_ENDIAN 59c39f472eSBen Skeggs tile->zcomp |= 0x10000000; 60c39f472eSBen Skeggs #endif 61c39f472eSBen Skeggs } 62c39f472eSBen Skeggs } 63c39f472eSBen Skeggs 64c39f472eSBen Skeggs static int 65c39f472eSBen Skeggs calc_bias(struct nv04_fb_priv *priv, int k, int i, int j) 66c39f472eSBen Skeggs { 67639c308eSBen Skeggs struct nvkm_device *device = nv_device(priv); 68c39f472eSBen Skeggs int b = (device->chipset > 0x30 ? 69c39f472eSBen Skeggs nv_rd32(priv, 0x122c + 0x10 * k + 0x4 * j) >> (4 * (i ^ 1)) : 70c39f472eSBen Skeggs 0) & 0xf; 71c39f472eSBen Skeggs 72c39f472eSBen Skeggs return 2 * (b & 0x8 ? b - 0x10 : b); 73c39f472eSBen Skeggs } 74c39f472eSBen Skeggs 75c39f472eSBen Skeggs static int 76c39f472eSBen Skeggs calc_ref(struct nv04_fb_priv *priv, int l, int k, int i) 77c39f472eSBen Skeggs { 78c39f472eSBen Skeggs int j, x = 0; 79c39f472eSBen Skeggs 80c39f472eSBen Skeggs for (j = 0; j < 4; j++) { 81c39f472eSBen Skeggs int m = (l >> (8 * i) & 0xff) + calc_bias(priv, k, i, j); 82c39f472eSBen Skeggs 83c39f472eSBen Skeggs x |= (0x80 | clamp(m, 0, 0x1f)) << (8 * j); 84c39f472eSBen Skeggs } 85c39f472eSBen Skeggs 86c39f472eSBen Skeggs return x; 87c39f472eSBen Skeggs } 88c39f472eSBen Skeggs 89c39f472eSBen Skeggs int 90639c308eSBen Skeggs nv30_fb_init(struct nvkm_object *object) 91c39f472eSBen Skeggs { 92639c308eSBen Skeggs struct nvkm_device *device = nv_device(object); 93c39f472eSBen Skeggs struct nv04_fb_priv *priv = (void *)object; 94c39f472eSBen Skeggs int ret, i, j; 95c39f472eSBen Skeggs 96639c308eSBen Skeggs ret = nvkm_fb_init(&priv->base); 97c39f472eSBen Skeggs if (ret) 98c39f472eSBen Skeggs return ret; 99c39f472eSBen Skeggs 100c39f472eSBen Skeggs /* Init the memory timing regs at 0x10037c/0x1003ac */ 101c39f472eSBen Skeggs if (device->chipset == 0x30 || 102c39f472eSBen Skeggs device->chipset == 0x31 || 103c39f472eSBen Skeggs device->chipset == 0x35) { 104c39f472eSBen Skeggs /* Related to ROP count */ 105c39f472eSBen Skeggs int n = (device->chipset == 0x31 ? 2 : 4); 106c39f472eSBen Skeggs int l = nv_rd32(priv, 0x1003d0); 107c39f472eSBen Skeggs 108c39f472eSBen Skeggs for (i = 0; i < n; i++) { 109c39f472eSBen Skeggs for (j = 0; j < 3; j++) 110c39f472eSBen Skeggs nv_wr32(priv, 0x10037c + 0xc * i + 0x4 * j, 111c39f472eSBen Skeggs calc_ref(priv, l, 0, j)); 112c39f472eSBen Skeggs 113c39f472eSBen Skeggs for (j = 0; j < 2; j++) 114c39f472eSBen Skeggs nv_wr32(priv, 0x1003ac + 0x8 * i + 0x4 * j, 115c39f472eSBen Skeggs calc_ref(priv, l, 1, j)); 116c39f472eSBen Skeggs } 117c39f472eSBen Skeggs } 118c39f472eSBen Skeggs 119c39f472eSBen Skeggs return 0; 120c39f472eSBen Skeggs } 121c39f472eSBen Skeggs 122639c308eSBen Skeggs struct nvkm_oclass * 123c39f472eSBen Skeggs nv30_fb_oclass = &(struct nv04_fb_impl) { 124c39f472eSBen Skeggs .base.base.handle = NV_SUBDEV(FB, 0x30), 125639c308eSBen Skeggs .base.base.ofuncs = &(struct nvkm_ofuncs) { 126c39f472eSBen Skeggs .ctor = nv04_fb_ctor, 127639c308eSBen Skeggs .dtor = _nvkm_fb_dtor, 128c39f472eSBen Skeggs .init = nv30_fb_init, 129639c308eSBen Skeggs .fini = _nvkm_fb_fini, 130c39f472eSBen Skeggs }, 131c39f472eSBen Skeggs .base.memtype = nv04_fb_memtype_valid, 132c39f472eSBen Skeggs .base.ram = &nv20_ram_oclass, 133c39f472eSBen Skeggs .tile.regions = 8, 134c39f472eSBen Skeggs .tile.init = nv30_fb_tile_init, 135c39f472eSBen Skeggs .tile.comp = nv30_fb_tile_comp, 136c39f472eSBen Skeggs .tile.fini = nv20_fb_tile_fini, 137c39f472eSBen Skeggs .tile.prog = nv20_fb_tile_prog, 138c39f472eSBen Skeggs }.base.base; 139