1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "nv50.h"
25 
26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
28 #include <subdev/bios/pll.h>
29 #include <subdev/clk/pll.h>
30 
31 int
32 gt215_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq)
33 {
34 	struct nvkm_subdev *subdev = &init->subdev;
35 	struct nvkm_device *device = subdev->device;
36 	struct nvbios_pll info;
37 	int N, fN, M, P;
38 	int ret;
39 
40 	ret = nvbios_pll_parse(device->bios, type, &info);
41 	if (ret)
42 		return ret;
43 
44 	ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
45 	if (ret < 0)
46 		return ret;
47 
48 	switch (info.type) {
49 	case PLL_VPLL0:
50 	case PLL_VPLL1:
51 		nvkm_wr32(device, info.reg + 0, 0x50000610);
52 		nvkm_mask(device, info.reg + 4, 0x003fffff,
53 						(P << 16) | (M << 8) | N);
54 		nvkm_wr32(device, info.reg + 8, fN);
55 		break;
56 	default:
57 		nvkm_warn(subdev, "%08x/%dKhz unimplemented\n", type, freq);
58 		ret = -EINVAL;
59 		break;
60 	}
61 
62 	return ret;
63 }
64 
65 static void
66 gt215_devinit_disable(struct nvkm_devinit *init)
67 {
68 	struct nvkm_device *device = init->subdev.device;
69 	u32 r001540 = nvkm_rd32(device, 0x001540);
70 	u32 r00154c = nvkm_rd32(device, 0x00154c);
71 
72 	if (!(r001540 & 0x40000000)) {
73 		nvkm_subdev_disable(device, NVKM_ENGINE_MSPDEC, 0);
74 		nvkm_subdev_disable(device, NVKM_ENGINE_MSPPP, 0);
75 	}
76 
77 	if (!(r00154c & 0x00000004))
78 		nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
79 	if (!(r00154c & 0x00000020))
80 		nvkm_subdev_disable(device, NVKM_ENGINE_MSVLD, 0);
81 	if (!(r00154c & 0x00000200))
82 		nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0);
83 }
84 
85 static u32
86 gt215_devinit_mmio_part[] = {
87 	0x100720, 0x1008bc, 4,
88 	0x100a20, 0x100adc, 4,
89 	0x100d80, 0x100ddc, 4,
90 	0x110000, 0x110f9c, 4,
91 	0x111000, 0x11103c, 8,
92 	0x111080, 0x1110fc, 4,
93 	0x111120, 0x1111fc, 4,
94 	0x111300, 0x1114bc, 4,
95 	0,
96 };
97 
98 static u32
99 gt215_devinit_mmio(struct nvkm_devinit *base, u32 addr)
100 {
101 	struct nv50_devinit *init = nv50_devinit(base);
102 	struct nvkm_device *device = init->base.subdev.device;
103 	u32 *mmio = gt215_devinit_mmio_part;
104 
105 	/* the init tables on some boards have INIT_RAM_RESTRICT_ZM_REG_GROUP
106 	 * instructions which touch registers that may not even exist on
107 	 * some configurations (Quadro 400), which causes the register
108 	 * interface to screw up for some amount of time after attempting to
109 	 * write to one of these, and results in all sorts of things going
110 	 * horribly wrong.
111 	 *
112 	 * the binary driver avoids touching these registers at all, however,
113 	 * the video bios doesn't care and does what the scripts say.  it's
114 	 * presumed that the io-port access to init registers isn't effected
115 	 * by the screw-up bug mentioned above.
116 	 *
117 	 * really, a new opcode should've been invented to handle these
118 	 * requirements, but whatever, it's too late for that now.
119 	 */
120 	while (mmio[0]) {
121 		if (addr >= mmio[0] && addr <= mmio[1]) {
122 			u32 part = (addr / mmio[2]) & 7;
123 			if (!init->r001540)
124 				init->r001540 = nvkm_rd32(device, 0x001540);
125 			if (part >= hweight8((init->r001540 >> 16) & 0xff))
126 				return ~0;
127 			return addr;
128 		}
129 		mmio += 3;
130 	}
131 
132 	return addr;
133 }
134 
135 static const struct nvkm_devinit_func
136 gt215_devinit = {
137 	.preinit = nv50_devinit_preinit,
138 	.init = nv50_devinit_init,
139 	.post = nv04_devinit_post,
140 	.mmio = gt215_devinit_mmio,
141 	.pll_set = gt215_devinit_pll_set,
142 	.disable = gt215_devinit_disable,
143 };
144 
145 int
146 gt215_devinit_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
147 		  struct nvkm_devinit **pinit)
148 {
149 	return nv50_devinit_new_(&gt215_devinit, device, type, inst, pinit);
150 }
151