1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "nv50.h"
25 
26 #include <subdev/bios.h>
27 #include <subdev/bios/init.h>
28 #include <subdev/bios/pll.h>
29 #include <subdev/clk/pll.h>
30 
31 int
32 gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
33 {
34 	struct nv50_devinit_priv *priv = (void *)devinit;
35 	struct nvkm_bios *bios = nvkm_bios(priv);
36 	struct nvbios_pll info;
37 	int N, fN, M, P;
38 	int ret;
39 
40 	ret = nvbios_pll_parse(bios, type, &info);
41 	if (ret)
42 		return ret;
43 
44 	ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
45 	if (ret < 0)
46 		return ret;
47 
48 	switch (info.type) {
49 	case PLL_VPLL0:
50 	case PLL_VPLL1:
51 	case PLL_VPLL2:
52 	case PLL_VPLL3:
53 		nv_mask(priv, info.reg + 0x0c, 0x00000000, 0x00000100);
54 		nv_wr32(priv, info.reg + 0x04, (P << 16) | (N << 8) | M);
55 		nv_wr32(priv, info.reg + 0x10, fN << 16);
56 		break;
57 	default:
58 		nv_warn(priv, "0x%08x/%dKhz unimplemented\n", type, freq);
59 		ret = -EINVAL;
60 		break;
61 	}
62 
63 	return ret;
64 }
65 
66 static u64
67 gf100_devinit_disable(struct nvkm_devinit *devinit)
68 {
69 	struct nv50_devinit_priv *priv = (void *)devinit;
70 	u32 r022500 = nv_rd32(priv, 0x022500);
71 	u64 disable = 0ULL;
72 
73 	if (r022500 & 0x00000001)
74 		disable |= (1ULL << NVDEV_ENGINE_DISP);
75 
76 	if (r022500 & 0x00000002) {
77 		disable |= (1ULL << NVDEV_ENGINE_MSPDEC);
78 		disable |= (1ULL << NVDEV_ENGINE_MSPPP);
79 	}
80 
81 	if (r022500 & 0x00000004)
82 		disable |= (1ULL << NVDEV_ENGINE_MSVLD);
83 	if (r022500 & 0x00000008)
84 		disable |= (1ULL << NVDEV_ENGINE_MSENC);
85 	if (r022500 & 0x00000100)
86 		disable |= (1ULL << NVDEV_ENGINE_CE0);
87 	if (r022500 & 0x00000200)
88 		disable |= (1ULL << NVDEV_ENGINE_CE1);
89 
90 	return disable;
91 }
92 
93 static int
94 gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
95 		   struct nvkm_oclass *oclass, void *data, u32 size,
96 		   struct nvkm_object **pobject)
97 {
98 	struct nv50_devinit_priv *priv;
99 	int ret;
100 
101 	ret = nvkm_devinit_create(parent, engine, oclass, &priv);
102 	*pobject = nv_object(priv);
103 	if (ret)
104 		return ret;
105 
106 	if (nv_rd32(priv, 0x022500) & 0x00000001)
107 		priv->base.post = true;
108 
109 	return 0;
110 }
111 
112 struct nvkm_oclass *
113 gf100_devinit_oclass = &(struct nvkm_devinit_impl) {
114 	.base.handle = NV_SUBDEV(DEVINIT, 0xc0),
115 	.base.ofuncs = &(struct nvkm_ofuncs) {
116 		.ctor = gf100_devinit_ctor,
117 		.dtor = _nvkm_devinit_dtor,
118 		.init = nv50_devinit_init,
119 		.fini = _nvkm_devinit_fini,
120 	},
121 	.pll_set = gf100_devinit_pll_set,
122 	.disable = gf100_devinit_disable,
123 	.post = nvbios_init,
124 }.base;
125