1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include <subdev/clk.h>
25 #include "pll.h"
26 
27 #include <subdev/bios.h>
28 #include <subdev/bios/pll.h>
29 #include <subdev/devinit/nv04.h>
30 
31 int
32 nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info,
33 		  int clk, struct nvkm_pll_vals *pv)
34 {
35 	int N1, M1, N2, M2, P;
36 	int ret = nv04_pll_calc(nv_subdev(clock), info, clk, &N1, &M1, &N2, &M2, &P);
37 	if (ret) {
38 		pv->refclk = info->refclk;
39 		pv->N1 = N1;
40 		pv->M1 = M1;
41 		pv->N2 = N2;
42 		pv->M2 = M2;
43 		pv->log2P = P;
44 	}
45 	return ret;
46 }
47 
48 int
49 nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)
50 {
51 	struct nvkm_devinit *devinit = nvkm_devinit(clk);
52 	int cv = nvkm_bios(clk)->version.chip;
53 
54 	if (cv == 0x30 || cv == 0x31 || cv == 0x35 || cv == 0x36 ||
55 	    cv >= 0x40) {
56 		if (reg1 > 0x405c)
57 			setPLL_double_highregs(devinit, reg1, pv);
58 		else
59 			setPLL_double_lowregs(devinit, reg1, pv);
60 	} else
61 		setPLL_single(devinit, reg1, pv);
62 
63 	return 0;
64 }
65 
66 static struct nvkm_domain
67 nv04_domain[] = {
68 	{ nv_clk_src_max }
69 };
70 
71 static int
72 nv04_clk_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
73 	      struct nvkm_oclass *oclass, void *data, u32 size,
74 	      struct nvkm_object **pobject)
75 {
76 	struct nvkm_clk *clk;
77 	int ret;
78 
79 	ret = nvkm_clk_create(parent, engine, oclass, nv04_domain,
80 			      NULL, 0, false, &clk);
81 	*pobject = nv_object(clk);
82 	if (ret)
83 		return ret;
84 
85 	clk->pll_calc = nv04_clk_pll_calc;
86 	clk->pll_prog = nv04_clk_pll_prog;
87 	return 0;
88 }
89 
90 struct nvkm_oclass
91 nv04_clk_oclass = {
92 	.handle = NV_SUBDEV(CLK, 0x04),
93 	.ofuncs = &(struct nvkm_ofuncs) {
94 		.ctor = nv04_clk_ctor,
95 		.dtor = _nvkm_clk_dtor,
96 		.init = _nvkm_clk_init,
97 		.fini = _nvkm_clk_fini,
98 	},
99 };
100