1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 #include <subdev/bios.h>
27 #include <subdev/bios/boost.h>
28 #include <subdev/bios/cstep.h>
29 #include <subdev/bios/perf.h>
30 #include <subdev/fb.h>
31 #include <subdev/therm.h>
32 #include <subdev/volt.h>
33 
34 #include <core/option.h>
35 
36 /******************************************************************************
37  * misc
38  *****************************************************************************/
39 static u32
40 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
41 		u8 pstate, u8 domain, u32 input)
42 {
43 	struct nvkm_bios *bios = clk->subdev.device->bios;
44 	struct nvbios_boostE boostE;
45 	u8  ver, hdr, cnt, len;
46 	u16 data;
47 
48 	data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
49 	if (data) {
50 		struct nvbios_boostS boostS;
51 		u8  idx = 0, sver, shdr;
52 		u16 subd;
53 
54 		input = max(boostE.min, input);
55 		input = min(boostE.max, input);
56 		do {
57 			sver = ver;
58 			shdr = hdr;
59 			subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr,
60 					      cnt, len, &boostS);
61 			if (subd && boostS.domain == domain) {
62 				if (adjust)
63 					input = input * boostS.percent / 100;
64 				input = max(boostS.min, input);
65 				input = min(boostS.max, input);
66 				break;
67 			}
68 		} while (subd);
69 	}
70 
71 	return input;
72 }
73 
74 /******************************************************************************
75  * C-States
76  *****************************************************************************/
77 static int
78 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
79 {
80 	struct nvkm_subdev *subdev = &clk->subdev;
81 	struct nvkm_device *device = subdev->device;
82 	struct nvkm_therm *therm = device->therm;
83 	struct nvkm_volt *volt = device->volt;
84 	struct nvkm_cstate *cstate;
85 	int ret;
86 
87 	if (!list_empty(&pstate->list)) {
88 		cstate = list_entry(pstate->list.prev, typeof(*cstate), head);
89 	} else {
90 		cstate = &pstate->base;
91 	}
92 
93 	if (therm) {
94 		ret = nvkm_therm_cstate(therm, pstate->fanspeed, +1);
95 		if (ret && ret != -ENODEV) {
96 			nvkm_error(subdev, "failed to raise fan speed: %d\n", ret);
97 			return ret;
98 		}
99 	}
100 
101 	if (volt) {
102 		ret = nvkm_volt_set_id(volt, cstate->voltage, +1);
103 		if (ret && ret != -ENODEV) {
104 			nvkm_error(subdev, "failed to raise voltage: %d\n", ret);
105 			return ret;
106 		}
107 	}
108 
109 	ret = clk->func->calc(clk, cstate);
110 	if (ret == 0) {
111 		ret = clk->func->prog(clk);
112 		clk->func->tidy(clk);
113 	}
114 
115 	if (volt) {
116 		ret = nvkm_volt_set_id(volt, cstate->voltage, -1);
117 		if (ret && ret != -ENODEV)
118 			nvkm_error(subdev, "failed to lower voltage: %d\n", ret);
119 	}
120 
121 	if (therm) {
122 		ret = nvkm_therm_cstate(therm, pstate->fanspeed, -1);
123 		if (ret && ret != -ENODEV)
124 			nvkm_error(subdev, "failed to lower fan speed: %d\n", ret);
125 	}
126 
127 	return ret;
128 }
129 
130 static void
131 nvkm_cstate_del(struct nvkm_cstate *cstate)
132 {
133 	list_del(&cstate->head);
134 	kfree(cstate);
135 }
136 
137 static int
138 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)
139 {
140 	struct nvkm_bios *bios = clk->subdev.device->bios;
141 	const struct nvkm_domain *domain = clk->domains;
142 	struct nvkm_cstate *cstate = NULL;
143 	struct nvbios_cstepX cstepX;
144 	u8  ver, hdr;
145 	u16 data;
146 
147 	data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX);
148 	if (!data)
149 		return -ENOENT;
150 
151 	cstate = kzalloc(sizeof(*cstate), GFP_KERNEL);
152 	if (!cstate)
153 		return -ENOMEM;
154 
155 	*cstate = pstate->base;
156 	cstate->voltage = cstepX.voltage;
157 
158 	while (domain && domain->name != nv_clk_src_max) {
159 		if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
160 			u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate,
161 						   domain->bios, cstepX.freq);
162 			cstate->domain[domain->name] = freq;
163 		}
164 		domain++;
165 	}
166 
167 	list_add(&cstate->head, &pstate->list);
168 	return 0;
169 }
170 
171 /******************************************************************************
172  * P-States
173  *****************************************************************************/
174 static int
175 nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
176 {
177 	struct nvkm_subdev *subdev = &clk->subdev;
178 	struct nvkm_ram *ram = subdev->device->fb->ram;
179 	struct nvkm_pstate *pstate;
180 	int ret, idx = 0;
181 
182 	list_for_each_entry(pstate, &clk->states, head) {
183 		if (idx++ == pstatei)
184 			break;
185 	}
186 
187 	nvkm_debug(subdev, "setting performance state %d\n", pstatei);
188 	clk->pstate = pstatei;
189 
190 	if (ram && ram->func->calc) {
191 		int khz = pstate->base.domain[nv_clk_src_mem];
192 		do {
193 			ret = ram->func->calc(ram, khz);
194 			if (ret == 0)
195 				ret = ram->func->prog(ram);
196 		} while (ret > 0);
197 		ram->func->tidy(ram);
198 	}
199 
200 	return nvkm_cstate_prog(clk, pstate, 0);
201 }
202 
203 static void
204 nvkm_pstate_work(struct work_struct *work)
205 {
206 	struct nvkm_clk *clk = container_of(work, typeof(*clk), work);
207 	struct nvkm_subdev *subdev = &clk->subdev;
208 	int pstate;
209 
210 	if (!atomic_xchg(&clk->waiting, 0))
211 		return;
212 	clk->pwrsrc = power_supply_is_system_supplied();
213 
214 	nvkm_trace(subdev, "P %d PWR %d U(AC) %d U(DC) %d A %d T %d D %d\n",
215 		   clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc,
216 		   clk->astate, clk->tstate, clk->dstate);
217 
218 	pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc;
219 	if (clk->state_nr && pstate != -1) {
220 		pstate = (pstate < 0) ? clk->astate : pstate;
221 		pstate = min(pstate, clk->state_nr - 1 + clk->tstate);
222 		pstate = max(pstate, clk->dstate);
223 	} else {
224 		pstate = clk->pstate = -1;
225 	}
226 
227 	nvkm_trace(subdev, "-> %d\n", pstate);
228 	if (pstate != clk->pstate) {
229 		int ret = nvkm_pstate_prog(clk, pstate);
230 		if (ret) {
231 			nvkm_error(subdev, "error setting pstate %d: %d\n",
232 				   pstate, ret);
233 		}
234 	}
235 
236 	wake_up_all(&clk->wait);
237 	nvkm_notify_get(&clk->pwrsrc_ntfy);
238 }
239 
240 static int
241 nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)
242 {
243 	atomic_set(&clk->waiting, 1);
244 	schedule_work(&clk->work);
245 	if (wait)
246 		wait_event(clk->wait, !atomic_read(&clk->waiting));
247 	return 0;
248 }
249 
250 static void
251 nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)
252 {
253 	const struct nvkm_domain *clock = clk->domains - 1;
254 	struct nvkm_cstate *cstate;
255 	struct nvkm_subdev *subdev = &clk->subdev;
256 	char info[3][32] = { "", "", "" };
257 	char name[4] = "--";
258 	int i = -1;
259 
260 	if (pstate->pstate != 0xff)
261 		snprintf(name, sizeof(name), "%02x", pstate->pstate);
262 
263 	while ((++clock)->name != nv_clk_src_max) {
264 		u32 lo = pstate->base.domain[clock->name];
265 		u32 hi = lo;
266 		if (hi == 0)
267 			continue;
268 
269 		nvkm_debug(subdev, "%02x: %10d KHz\n", clock->name, lo);
270 		list_for_each_entry(cstate, &pstate->list, head) {
271 			u32 freq = cstate->domain[clock->name];
272 			lo = min(lo, freq);
273 			hi = max(hi, freq);
274 			nvkm_debug(subdev, "%10d KHz\n", freq);
275 		}
276 
277 		if (clock->mname && ++i < ARRAY_SIZE(info)) {
278 			lo /= clock->mdiv;
279 			hi /= clock->mdiv;
280 			if (lo == hi) {
281 				snprintf(info[i], sizeof(info[i]), "%s %d MHz",
282 					 clock->mname, lo);
283 			} else {
284 				snprintf(info[i], sizeof(info[i]),
285 					 "%s %d-%d MHz", clock->mname, lo, hi);
286 			}
287 		}
288 	}
289 
290 	nvkm_debug(subdev, "%s: %s %s %s\n", name, info[0], info[1], info[2]);
291 }
292 
293 static void
294 nvkm_pstate_del(struct nvkm_pstate *pstate)
295 {
296 	struct nvkm_cstate *cstate, *temp;
297 
298 	list_for_each_entry_safe(cstate, temp, &pstate->list, head) {
299 		nvkm_cstate_del(cstate);
300 	}
301 
302 	list_del(&pstate->head);
303 	kfree(pstate);
304 }
305 
306 static int
307 nvkm_pstate_new(struct nvkm_clk *clk, int idx)
308 {
309 	struct nvkm_bios *bios = clk->subdev.device->bios;
310 	const struct nvkm_domain *domain = clk->domains - 1;
311 	struct nvkm_pstate *pstate;
312 	struct nvkm_cstate *cstate;
313 	struct nvbios_cstepE cstepE;
314 	struct nvbios_perfE perfE;
315 	u8  ver, hdr, cnt, len;
316 	u16 data;
317 
318 	data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE);
319 	if (!data)
320 		return -EINVAL;
321 	if (perfE.pstate == 0xff)
322 		return 0;
323 
324 	pstate = kzalloc(sizeof(*pstate), GFP_KERNEL);
325 	cstate = &pstate->base;
326 	if (!pstate)
327 		return -ENOMEM;
328 
329 	INIT_LIST_HEAD(&pstate->list);
330 
331 	pstate->pstate = perfE.pstate;
332 	pstate->fanspeed = perfE.fanspeed;
333 	cstate->voltage = perfE.voltage;
334 	cstate->domain[nv_clk_src_core] = perfE.core;
335 	cstate->domain[nv_clk_src_shader] = perfE.shader;
336 	cstate->domain[nv_clk_src_mem] = perfE.memory;
337 	cstate->domain[nv_clk_src_vdec] = perfE.vdec;
338 	cstate->domain[nv_clk_src_dom6] = perfE.disp;
339 
340 	while (ver >= 0x40 && (++domain)->name != nv_clk_src_max) {
341 		struct nvbios_perfS perfS;
342 		u8  sver = ver, shdr = hdr;
343 		u32 perfSe = nvbios_perfSp(bios, data, domain->bios,
344 					  &sver, &shdr, cnt, len, &perfS);
345 		if (perfSe == 0 || sver != 0x40)
346 			continue;
347 
348 		if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
349 			perfS.v40.freq = nvkm_clk_adjust(clk, false,
350 							 pstate->pstate,
351 							 domain->bios,
352 							 perfS.v40.freq);
353 		}
354 
355 		cstate->domain[domain->name] = perfS.v40.freq;
356 	}
357 
358 	data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE);
359 	if (data) {
360 		int idx = cstepE.index;
361 		do {
362 			nvkm_cstate_new(clk, idx, pstate);
363 		} while(idx--);
364 	}
365 
366 	nvkm_pstate_info(clk, pstate);
367 	list_add_tail(&pstate->head, &clk->states);
368 	clk->state_nr++;
369 	return 0;
370 }
371 
372 /******************************************************************************
373  * Adjustment triggers
374  *****************************************************************************/
375 static int
376 nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)
377 {
378 	struct nvkm_pstate *pstate;
379 	int i = 0;
380 
381 	if (!clk->allow_reclock)
382 		return -ENOSYS;
383 
384 	if (req != -1 && req != -2) {
385 		list_for_each_entry(pstate, &clk->states, head) {
386 			if (pstate->pstate == req)
387 				break;
388 			i++;
389 		}
390 
391 		if (pstate->pstate != req)
392 			return -EINVAL;
393 		req = i;
394 	}
395 
396 	return req + 2;
397 }
398 
399 static int
400 nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)
401 {
402 	int ret = 1;
403 
404 	if (clk->allow_reclock && !strncasecmpz(mode, "auto", arglen))
405 		return -2;
406 
407 	if (strncasecmpz(mode, "disabled", arglen)) {
408 		char save = mode[arglen];
409 		long v;
410 
411 		((char *)mode)[arglen] = '\0';
412 		if (!kstrtol(mode, 0, &v)) {
413 			ret = nvkm_clk_ustate_update(clk, v);
414 			if (ret < 0)
415 				ret = 1;
416 		}
417 		((char *)mode)[arglen] = save;
418 	}
419 
420 	return ret - 2;
421 }
422 
423 int
424 nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)
425 {
426 	int ret = nvkm_clk_ustate_update(clk, req);
427 	if (ret >= 0) {
428 		if (ret -= 2, pwr) clk->ustate_ac = ret;
429 		else		   clk->ustate_dc = ret;
430 		return nvkm_pstate_calc(clk, true);
431 	}
432 	return ret;
433 }
434 
435 int
436 nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)
437 {
438 	if (!rel) clk->astate  = req;
439 	if ( rel) clk->astate += rel;
440 	clk->astate = min(clk->astate, clk->state_nr - 1);
441 	clk->astate = max(clk->astate, 0);
442 	return nvkm_pstate_calc(clk, wait);
443 }
444 
445 int
446 nvkm_clk_tstate(struct nvkm_clk *clk, int req, int rel)
447 {
448 	if (!rel) clk->tstate  = req;
449 	if ( rel) clk->tstate += rel;
450 	clk->tstate = min(clk->tstate, 0);
451 	clk->tstate = max(clk->tstate, -(clk->state_nr - 1));
452 	return nvkm_pstate_calc(clk, true);
453 }
454 
455 int
456 nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)
457 {
458 	if (!rel) clk->dstate  = req;
459 	if ( rel) clk->dstate += rel;
460 	clk->dstate = min(clk->dstate, clk->state_nr - 1);
461 	clk->dstate = max(clk->dstate, 0);
462 	return nvkm_pstate_calc(clk, true);
463 }
464 
465 static int
466 nvkm_clk_pwrsrc(struct nvkm_notify *notify)
467 {
468 	struct nvkm_clk *clk =
469 		container_of(notify, typeof(*clk), pwrsrc_ntfy);
470 	nvkm_pstate_calc(clk, false);
471 	return NVKM_NOTIFY_DROP;
472 }
473 
474 /******************************************************************************
475  * subdev base class implementation
476  *****************************************************************************/
477 
478 int
479 nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)
480 {
481 	return clk->func->read(clk, src);
482 }
483 
484 static int
485 nvkm_clk_fini(struct nvkm_subdev *subdev, bool suspend)
486 {
487 	struct nvkm_clk *clk = nvkm_clk(subdev);
488 	nvkm_notify_put(&clk->pwrsrc_ntfy);
489 	flush_work(&clk->work);
490 	if (clk->func->fini)
491 		clk->func->fini(clk);
492 	return 0;
493 }
494 
495 static int
496 nvkm_clk_init(struct nvkm_subdev *subdev)
497 {
498 	struct nvkm_clk *clk = nvkm_clk(subdev);
499 	const struct nvkm_domain *clock = clk->domains;
500 	int ret;
501 
502 	memset(&clk->bstate, 0x00, sizeof(clk->bstate));
503 	INIT_LIST_HEAD(&clk->bstate.list);
504 	clk->bstate.pstate = 0xff;
505 
506 	while (clock->name != nv_clk_src_max) {
507 		ret = nvkm_clk_read(clk, clock->name);
508 		if (ret < 0) {
509 			nvkm_error(subdev, "%02x freq unknown\n", clock->name);
510 			return ret;
511 		}
512 		clk->bstate.base.domain[clock->name] = ret;
513 		clock++;
514 	}
515 
516 	nvkm_pstate_info(clk, &clk->bstate);
517 
518 	if (clk->func->init)
519 		return clk->func->init(clk);
520 
521 	clk->astate = clk->state_nr - 1;
522 	clk->tstate = 0;
523 	clk->dstate = 0;
524 	clk->pstate = -1;
525 	nvkm_pstate_calc(clk, true);
526 	return 0;
527 }
528 
529 static void *
530 nvkm_clk_dtor(struct nvkm_subdev *subdev)
531 {
532 	struct nvkm_clk *clk = nvkm_clk(subdev);
533 	struct nvkm_pstate *pstate, *temp;
534 
535 	nvkm_notify_fini(&clk->pwrsrc_ntfy);
536 
537 	/* Early return if the pstates have been provided statically */
538 	if (clk->func->pstates)
539 		return clk;
540 
541 	list_for_each_entry_safe(pstate, temp, &clk->states, head) {
542 		nvkm_pstate_del(pstate);
543 	}
544 
545 	return clk;
546 }
547 
548 static const struct nvkm_subdev_func
549 nvkm_clk = {
550 	.dtor = nvkm_clk_dtor,
551 	.init = nvkm_clk_init,
552 	.fini = nvkm_clk_fini,
553 };
554 
555 int
556 nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device,
557 	      int index, bool allow_reclock, struct nvkm_clk *clk)
558 {
559 	int ret, idx, arglen;
560 	const char *mode;
561 
562 	nvkm_subdev_ctor(&nvkm_clk, device, index, 0, &clk->subdev);
563 	clk->func = func;
564 	INIT_LIST_HEAD(&clk->states);
565 	clk->domains = func->domains;
566 	clk->ustate_ac = -1;
567 	clk->ustate_dc = -1;
568 	clk->allow_reclock = allow_reclock;
569 
570 	INIT_WORK(&clk->work, nvkm_pstate_work);
571 	init_waitqueue_head(&clk->wait);
572 	atomic_set(&clk->waiting, 0);
573 
574 	/* If no pstates are provided, try and fetch them from the BIOS */
575 	if (!func->pstates) {
576 		idx = 0;
577 		do {
578 			ret = nvkm_pstate_new(clk, idx++);
579 		} while (ret == 0);
580 	} else {
581 		for (idx = 0; idx < func->nr_pstates; idx++)
582 			list_add_tail(&func->pstates[idx].head, &clk->states);
583 		clk->state_nr = func->nr_pstates;
584 	}
585 
586 	ret = nvkm_notify_init(NULL, &device->event, nvkm_clk_pwrsrc, true,
587 			       NULL, 0, 0, &clk->pwrsrc_ntfy);
588 	if (ret)
589 		return ret;
590 
591 	mode = nvkm_stropt(device->cfgopt, "NvClkMode", &arglen);
592 	if (mode) {
593 		clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
594 		clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
595 	}
596 
597 	mode = nvkm_stropt(device->cfgopt, "NvClkModeAC", &arglen);
598 	if (mode)
599 		clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
600 
601 	mode = nvkm_stropt(device->cfgopt, "NvClkModeDC", &arglen);
602 	if (mode)
603 		clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
604 
605 	return 0;
606 }
607 
608 int
609 nvkm_clk_new_(const struct nvkm_clk_func *func, struct nvkm_device *device,
610 	      int index, bool allow_reclock, struct nvkm_clk **pclk)
611 {
612 	if (!(*pclk = kzalloc(sizeof(**pclk), GFP_KERNEL)))
613 		return -ENOMEM;
614 	return nvkm_clk_ctor(func, device, index, allow_reclock, *pclk);
615 }
616