1 /* 2 * Copyright 2012 Nouveau Community 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Martin Peres <martin.peres@labri.fr> 23 * Ben Skeggs 24 */ 25 #include "nv04.h" 26 27 static void 28 gf100_bus_intr(struct nvkm_subdev *subdev) 29 { 30 struct nvkm_device *device = subdev->device; 31 u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140); 32 33 if (stat & 0x0000000e) { 34 u32 addr = nvkm_rd32(device, 0x009084); 35 u32 data = nvkm_rd32(device, 0x009088); 36 37 nvkm_error(subdev, 38 "MMIO %s of %08x FAULT at %06x [ %s%s%s]\n", 39 (addr & 0x00000002) ? "write" : "read", data, 40 (addr & 0x00fffffc), 41 (stat & 0x00000002) ? "!ENGINE " : "", 42 (stat & 0x00000004) ? "IBUS " : "", 43 (stat & 0x00000008) ? "TIMEOUT " : ""); 44 45 nvkm_wr32(device, 0x009084, 0x00000000); 46 nvkm_wr32(device, 0x001100, (stat & 0x0000000e)); 47 stat &= ~0x0000000e; 48 } 49 50 if (stat) { 51 nvkm_error(subdev, "intr %08x\n", stat); 52 nvkm_mask(device, 0x001140, stat, 0x00000000); 53 } 54 } 55 56 static int 57 gf100_bus_init(struct nvkm_object *object) 58 { 59 struct nvkm_bus *bus = (void *)object; 60 struct nvkm_device *device = bus->subdev.device; 61 int ret; 62 63 ret = nvkm_bus_init(bus); 64 if (ret) 65 return ret; 66 67 nvkm_wr32(device, 0x001100, 0xffffffff); 68 nvkm_wr32(device, 0x001140, 0x0000000e); 69 return 0; 70 } 71 72 struct nvkm_oclass * 73 gf100_bus_oclass = &(struct nv04_bus_impl) { 74 .base.handle = NV_SUBDEV(BUS, 0xc0), 75 .base.ofuncs = &(struct nvkm_ofuncs) { 76 .ctor = nv04_bus_ctor, 77 .dtor = _nvkm_bus_dtor, 78 .init = gf100_bus_init, 79 .fini = _nvkm_bus_fini, 80 }, 81 .intr = gf100_bus_intr, 82 }.base; 83