1c39f472eSBen Skeggs /* 2c39f472eSBen Skeggs * Copyright 2013 Red Hat Inc. 3c39f472eSBen Skeggs * 4c39f472eSBen Skeggs * Permission is hereby granted, free of charge, to any person obtaining a 5c39f472eSBen Skeggs * copy of this software and associated documentation files (the "Software"), 6c39f472eSBen Skeggs * to deal in the Software without restriction, including without limitation 7c39f472eSBen Skeggs * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8c39f472eSBen Skeggs * and/or sell copies of the Software, and to permit persons to whom the 9c39f472eSBen Skeggs * Software is furnished to do so, subject to the following conditions: 10c39f472eSBen Skeggs * 11c39f472eSBen Skeggs * The above copyright notice and this permission notice shall be included in 12c39f472eSBen Skeggs * all copies or substantial portions of the Software. 13c39f472eSBen Skeggs * 14c39f472eSBen Skeggs * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15c39f472eSBen Skeggs * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16c39f472eSBen Skeggs * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17c39f472eSBen Skeggs * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18c39f472eSBen Skeggs * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19c39f472eSBen Skeggs * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20c39f472eSBen Skeggs * OTHER DEALINGS IN THE SOFTWARE. 21c39f472eSBen Skeggs * 22c39f472eSBen Skeggs * Authors: Ben Skeggs 23c39f472eSBen Skeggs */ 24c39f472eSBen Skeggs #include <subdev/bios.h> 25c39f472eSBen Skeggs #include <subdev/bios/bit.h> 26c39f472eSBen Skeggs #include <subdev/bios/rammap.h> 27c39f472eSBen Skeggs 28c39f472eSBen Skeggs u32 29d390b480SBen Skeggs nvbios_rammapTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, 30c39f472eSBen Skeggs u8 *cnt, u8 *len, u8 *snr, u8 *ssz) 31c39f472eSBen Skeggs { 32c39f472eSBen Skeggs struct bit_entry bit_P; 33c39f472eSBen Skeggs u16 rammap = 0x0000; 34c39f472eSBen Skeggs 35c39f472eSBen Skeggs if (!bit_entry(bios, 'P', &bit_P)) { 36c39f472eSBen Skeggs if (bit_P.version == 2) 377f5f518fSBen Skeggs rammap = nvbios_rd16(bios, bit_P.offset + 4); 38c39f472eSBen Skeggs 39c39f472eSBen Skeggs if (rammap) { 407f5f518fSBen Skeggs *ver = nvbios_rd08(bios, rammap + 0); 41c39f472eSBen Skeggs switch (*ver) { 42c39f472eSBen Skeggs case 0x10: 43c39f472eSBen Skeggs case 0x11: 447f5f518fSBen Skeggs *hdr = nvbios_rd08(bios, rammap + 1); 457f5f518fSBen Skeggs *cnt = nvbios_rd08(bios, rammap + 5); 467f5f518fSBen Skeggs *len = nvbios_rd08(bios, rammap + 2); 477f5f518fSBen Skeggs *snr = nvbios_rd08(bios, rammap + 4); 487f5f518fSBen Skeggs *ssz = nvbios_rd08(bios, rammap + 3); 49c39f472eSBen Skeggs return rammap; 50c39f472eSBen Skeggs default: 51c39f472eSBen Skeggs break; 52c39f472eSBen Skeggs } 53c39f472eSBen Skeggs } 54c39f472eSBen Skeggs } 55c39f472eSBen Skeggs 56c39f472eSBen Skeggs return 0x0000; 57c39f472eSBen Skeggs } 58c39f472eSBen Skeggs 59c39f472eSBen Skeggs u32 60d390b480SBen Skeggs nvbios_rammapEe(struct nvkm_bios *bios, int idx, 61c39f472eSBen Skeggs u8 *ver, u8 *hdr, u8 *cnt, u8 *len) 62c39f472eSBen Skeggs { 63c39f472eSBen Skeggs u8 snr, ssz; 64c39f472eSBen Skeggs u16 rammap = nvbios_rammapTe(bios, ver, hdr, cnt, len, &snr, &ssz); 65c39f472eSBen Skeggs if (rammap && idx < *cnt) { 66c39f472eSBen Skeggs rammap = rammap + *hdr + (idx * (*len + (snr * ssz))); 67c39f472eSBen Skeggs *hdr = *len; 68c39f472eSBen Skeggs *cnt = snr; 69c39f472eSBen Skeggs *len = ssz; 70c39f472eSBen Skeggs return rammap; 71c39f472eSBen Skeggs } 72c39f472eSBen Skeggs return 0x0000; 73c39f472eSBen Skeggs } 74c39f472eSBen Skeggs 752813e19fSRoy Spliet /* Pretend a performance mode is also a rammap entry, helps coalesce entries 762813e19fSRoy Spliet * later on */ 772813e19fSRoy Spliet u32 782813e19fSRoy Spliet nvbios_rammapEp_from_perf(struct nvkm_bios *bios, u32 data, u8 size, 792813e19fSRoy Spliet struct nvbios_ramcfg *p) 802813e19fSRoy Spliet { 812813e19fSRoy Spliet memset(p, 0x00, sizeof(*p)); 822813e19fSRoy Spliet 837f5f518fSBen Skeggs p->rammap_00_16_20 = (nvbios_rd08(bios, data + 0x16) & 0x20) >> 5; 847f5f518fSBen Skeggs p->rammap_00_16_40 = (nvbios_rd08(bios, data + 0x16) & 0x40) >> 6; 857f5f518fSBen Skeggs p->rammap_00_17_02 = (nvbios_rd08(bios, data + 0x17) & 0x02) >> 1; 862813e19fSRoy Spliet 872813e19fSRoy Spliet return data; 882813e19fSRoy Spliet } 892813e19fSRoy Spliet 90c39f472eSBen Skeggs u32 91d390b480SBen Skeggs nvbios_rammapEp(struct nvkm_bios *bios, int idx, 92d390b480SBen Skeggs u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *p) 93c39f472eSBen Skeggs { 94c39f472eSBen Skeggs u32 data = nvbios_rammapEe(bios, idx, ver, hdr, cnt, len), temp; 95c39f472eSBen Skeggs memset(p, 0x00, sizeof(*p)); 96c39f472eSBen Skeggs p->rammap_ver = *ver; 97c39f472eSBen Skeggs p->rammap_hdr = *hdr; 98c39f472eSBen Skeggs switch (!!data * *ver) { 99c39f472eSBen Skeggs case 0x10: 1007f5f518fSBen Skeggs p->rammap_min = nvbios_rd16(bios, data + 0x00); 1017f5f518fSBen Skeggs p->rammap_max = nvbios_rd16(bios, data + 0x02); 1027f5f518fSBen Skeggs p->rammap_10_04_02 = (nvbios_rd08(bios, data + 0x04) & 0x02) >> 1; 1037f5f518fSBen Skeggs p->rammap_10_04_08 = (nvbios_rd08(bios, data + 0x04) & 0x08) >> 3; 104c39f472eSBen Skeggs break; 105c39f472eSBen Skeggs case 0x11: 1067f5f518fSBen Skeggs p->rammap_min = nvbios_rd16(bios, data + 0x00); 1077f5f518fSBen Skeggs p->rammap_max = nvbios_rd16(bios, data + 0x02); 1087f5f518fSBen Skeggs p->rammap_11_08_01 = (nvbios_rd08(bios, data + 0x08) & 0x01) >> 0; 1097f5f518fSBen Skeggs p->rammap_11_08_0c = (nvbios_rd08(bios, data + 0x08) & 0x0c) >> 2; 1107f5f518fSBen Skeggs p->rammap_11_08_10 = (nvbios_rd08(bios, data + 0x08) & 0x10) >> 4; 1117f5f518fSBen Skeggs temp = nvbios_rd32(bios, data + 0x09); 112c39f472eSBen Skeggs p->rammap_11_09_01ff = (temp & 0x000001ff) >> 0; 113c39f472eSBen Skeggs p->rammap_11_0a_03fe = (temp & 0x0003fe00) >> 9; 114c39f472eSBen Skeggs p->rammap_11_0a_0400 = (temp & 0x00040000) >> 18; 115c39f472eSBen Skeggs p->rammap_11_0a_0800 = (temp & 0x00080000) >> 19; 116c39f472eSBen Skeggs p->rammap_11_0b_01f0 = (temp & 0x01f00000) >> 20; 117c39f472eSBen Skeggs p->rammap_11_0b_0200 = (temp & 0x02000000) >> 25; 118c39f472eSBen Skeggs p->rammap_11_0b_0400 = (temp & 0x04000000) >> 26; 119c39f472eSBen Skeggs p->rammap_11_0b_0800 = (temp & 0x08000000) >> 27; 1207f5f518fSBen Skeggs p->rammap_11_0d = nvbios_rd08(bios, data + 0x0d); 1217f5f518fSBen Skeggs p->rammap_11_0e = nvbios_rd08(bios, data + 0x0e); 1227f5f518fSBen Skeggs p->rammap_11_0f = nvbios_rd08(bios, data + 0x0f); 1237f5f518fSBen Skeggs p->rammap_11_11_0c = (nvbios_rd08(bios, data + 0x11) & 0x0c) >> 2; 124c39f472eSBen Skeggs break; 125c39f472eSBen Skeggs default: 126c39f472eSBen Skeggs data = 0; 127c39f472eSBen Skeggs break; 128c39f472eSBen Skeggs } 129c39f472eSBen Skeggs return data; 130c39f472eSBen Skeggs } 131c39f472eSBen Skeggs 132c39f472eSBen Skeggs u32 133d390b480SBen Skeggs nvbios_rammapEm(struct nvkm_bios *bios, u16 mhz, 134d390b480SBen Skeggs u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *info) 135c39f472eSBen Skeggs { 136c39f472eSBen Skeggs int idx = 0; 137c39f472eSBen Skeggs u32 data; 138c39f472eSBen Skeggs while ((data = nvbios_rammapEp(bios, idx++, ver, hdr, cnt, len, info))) { 139c39f472eSBen Skeggs if (mhz >= info->rammap_min && mhz <= info->rammap_max) 140c39f472eSBen Skeggs break; 141c39f472eSBen Skeggs } 142c39f472eSBen Skeggs return data; 143c39f472eSBen Skeggs } 144c39f472eSBen Skeggs 145c39f472eSBen Skeggs u32 146d390b480SBen Skeggs nvbios_rammapSe(struct nvkm_bios *bios, u32 data, 147d390b480SBen Skeggs u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx, u8 *ver, u8 *hdr) 148c39f472eSBen Skeggs { 149c39f472eSBen Skeggs if (idx < ecnt) { 150c39f472eSBen Skeggs data = data + ehdr + (idx * elen); 151c39f472eSBen Skeggs *ver = ever; 152c39f472eSBen Skeggs *hdr = elen; 153c39f472eSBen Skeggs return data; 154c39f472eSBen Skeggs } 155c39f472eSBen Skeggs return 0; 156c39f472eSBen Skeggs } 157c39f472eSBen Skeggs 158c39f472eSBen Skeggs u32 15935fe024aSRoy Spliet nvbios_rammapSp_from_perf(struct nvkm_bios *bios, u32 data, u8 size, int idx, 16035fe024aSRoy Spliet struct nvbios_ramcfg *p) 16135fe024aSRoy Spliet { 16235fe024aSRoy Spliet data += (idx * size); 16335fe024aSRoy Spliet 16435fe024aSRoy Spliet if (size < 11) 16535fe024aSRoy Spliet return 0x00000000; 16635fe024aSRoy Spliet 167c25bf7b6SRoy Spliet p->ramcfg_ver = 0; 1687f5f518fSBen Skeggs p->ramcfg_timing = nvbios_rd08(bios, data + 0x01); 1697f5f518fSBen Skeggs p->ramcfg_00_03_01 = (nvbios_rd08(bios, data + 0x03) & 0x01) >> 0; 1707f5f518fSBen Skeggs p->ramcfg_00_03_02 = (nvbios_rd08(bios, data + 0x03) & 0x02) >> 1; 1717f5f518fSBen Skeggs p->ramcfg_DLLoff = (nvbios_rd08(bios, data + 0x03) & 0x04) >> 2; 1727f5f518fSBen Skeggs p->ramcfg_00_03_08 = (nvbios_rd08(bios, data + 0x03) & 0x08) >> 3; 1737f5f518fSBen Skeggs p->ramcfg_RON = (nvbios_rd08(bios, data + 0x03) & 0x10) >> 3; 1747f5f518fSBen Skeggs p->ramcfg_00_04_02 = (nvbios_rd08(bios, data + 0x04) & 0x02) >> 1; 1757f5f518fSBen Skeggs p->ramcfg_00_04_04 = (nvbios_rd08(bios, data + 0x04) & 0x04) >> 2; 1767f5f518fSBen Skeggs p->ramcfg_00_04_20 = (nvbios_rd08(bios, data + 0x04) & 0x20) >> 5; 1777f5f518fSBen Skeggs p->ramcfg_00_05 = (nvbios_rd08(bios, data + 0x05) & 0xff) >> 0; 1787f5f518fSBen Skeggs p->ramcfg_00_06 = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0; 1797f5f518fSBen Skeggs p->ramcfg_00_07 = (nvbios_rd08(bios, data + 0x07) & 0xff) >> 0; 1807f5f518fSBen Skeggs p->ramcfg_00_08 = (nvbios_rd08(bios, data + 0x08) & 0xff) >> 0; 1817f5f518fSBen Skeggs p->ramcfg_00_09 = (nvbios_rd08(bios, data + 0x09) & 0xff) >> 0; 1827f5f518fSBen Skeggs p->ramcfg_00_0a_0f = (nvbios_rd08(bios, data + 0x0a) & 0x0f) >> 0; 1837f5f518fSBen Skeggs p->ramcfg_00_0a_f0 = (nvbios_rd08(bios, data + 0x0a) & 0xf0) >> 4; 18435fe024aSRoy Spliet 18535fe024aSRoy Spliet return data; 18635fe024aSRoy Spliet } 18735fe024aSRoy Spliet 18835fe024aSRoy Spliet u32 189d390b480SBen Skeggs nvbios_rammapSp(struct nvkm_bios *bios, u32 data, 190c39f472eSBen Skeggs u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx, 191c39f472eSBen Skeggs u8 *ver, u8 *hdr, struct nvbios_ramcfg *p) 192c39f472eSBen Skeggs { 193c39f472eSBen Skeggs data = nvbios_rammapSe(bios, data, ever, ehdr, ecnt, elen, idx, ver, hdr); 194c39f472eSBen Skeggs p->ramcfg_ver = *ver; 195c39f472eSBen Skeggs p->ramcfg_hdr = *hdr; 196c39f472eSBen Skeggs switch (!!data * *ver) { 197c39f472eSBen Skeggs case 0x10: 1987f5f518fSBen Skeggs p->ramcfg_timing = nvbios_rd08(bios, data + 0x01); 1997f5f518fSBen Skeggs p->ramcfg_10_02_01 = (nvbios_rd08(bios, data + 0x02) & 0x01) >> 0; 2007f5f518fSBen Skeggs p->ramcfg_10_02_02 = (nvbios_rd08(bios, data + 0x02) & 0x02) >> 1; 2017f5f518fSBen Skeggs p->ramcfg_10_02_04 = (nvbios_rd08(bios, data + 0x02) & 0x04) >> 2; 2027f5f518fSBen Skeggs p->ramcfg_10_02_08 = (nvbios_rd08(bios, data + 0x02) & 0x08) >> 3; 2037f5f518fSBen Skeggs p->ramcfg_10_02_10 = (nvbios_rd08(bios, data + 0x02) & 0x10) >> 4; 2047f5f518fSBen Skeggs p->ramcfg_10_02_20 = (nvbios_rd08(bios, data + 0x02) & 0x20) >> 5; 2057f5f518fSBen Skeggs p->ramcfg_DLLoff = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6; 2067f5f518fSBen Skeggs p->ramcfg_10_03_0f = (nvbios_rd08(bios, data + 0x03) & 0x0f) >> 0; 2077f5f518fSBen Skeggs p->ramcfg_10_04_01 = (nvbios_rd08(bios, data + 0x04) & 0x01) >> 0; 2087f5f518fSBen Skeggs p->ramcfg_10_05 = (nvbios_rd08(bios, data + 0x05) & 0xff) >> 0; 2097f5f518fSBen Skeggs p->ramcfg_10_06 = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0; 2107f5f518fSBen Skeggs p->ramcfg_10_07 = (nvbios_rd08(bios, data + 0x07) & 0xff) >> 0; 2117f5f518fSBen Skeggs p->ramcfg_10_08 = (nvbios_rd08(bios, data + 0x08) & 0xff) >> 0; 2127f5f518fSBen Skeggs p->ramcfg_10_09_0f = (nvbios_rd08(bios, data + 0x09) & 0x0f) >> 0; 2137f5f518fSBen Skeggs p->ramcfg_10_09_f0 = (nvbios_rd08(bios, data + 0x09) & 0xf0) >> 4; 214c39f472eSBen Skeggs break; 215c39f472eSBen Skeggs case 0x11: 2167f5f518fSBen Skeggs p->ramcfg_timing = nvbios_rd08(bios, data + 0x00); 2177f5f518fSBen Skeggs p->ramcfg_11_01_01 = (nvbios_rd08(bios, data + 0x01) & 0x01) >> 0; 2187f5f518fSBen Skeggs p->ramcfg_11_01_02 = (nvbios_rd08(bios, data + 0x01) & 0x02) >> 1; 2197f5f518fSBen Skeggs p->ramcfg_11_01_04 = (nvbios_rd08(bios, data + 0x01) & 0x04) >> 2; 2207f5f518fSBen Skeggs p->ramcfg_11_01_08 = (nvbios_rd08(bios, data + 0x01) & 0x08) >> 3; 2217f5f518fSBen Skeggs p->ramcfg_11_01_10 = (nvbios_rd08(bios, data + 0x01) & 0x10) >> 4; 2227f5f518fSBen Skeggs p->ramcfg_11_01_20 = (nvbios_rd08(bios, data + 0x01) & 0x20) >> 5; 2237f5f518fSBen Skeggs p->ramcfg_11_01_40 = (nvbios_rd08(bios, data + 0x01) & 0x40) >> 6; 2247f5f518fSBen Skeggs p->ramcfg_11_01_80 = (nvbios_rd08(bios, data + 0x01) & 0x80) >> 7; 2257f5f518fSBen Skeggs p->ramcfg_11_02_03 = (nvbios_rd08(bios, data + 0x02) & 0x03) >> 0; 2267f5f518fSBen Skeggs p->ramcfg_11_02_04 = (nvbios_rd08(bios, data + 0x02) & 0x04) >> 2; 2277f5f518fSBen Skeggs p->ramcfg_11_02_08 = (nvbios_rd08(bios, data + 0x02) & 0x08) >> 3; 2287f5f518fSBen Skeggs p->ramcfg_11_02_10 = (nvbios_rd08(bios, data + 0x02) & 0x10) >> 4; 2297f5f518fSBen Skeggs p->ramcfg_11_02_40 = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6; 2307f5f518fSBen Skeggs p->ramcfg_11_02_80 = (nvbios_rd08(bios, data + 0x02) & 0x80) >> 7; 2317f5f518fSBen Skeggs p->ramcfg_11_03_0f = (nvbios_rd08(bios, data + 0x03) & 0x0f) >> 0; 2327f5f518fSBen Skeggs p->ramcfg_11_03_30 = (nvbios_rd08(bios, data + 0x03) & 0x30) >> 4; 2337f5f518fSBen Skeggs p->ramcfg_11_03_c0 = (nvbios_rd08(bios, data + 0x03) & 0xc0) >> 6; 2347f5f518fSBen Skeggs p->ramcfg_11_03_f0 = (nvbios_rd08(bios, data + 0x03) & 0xf0) >> 4; 2357f5f518fSBen Skeggs p->ramcfg_11_04 = (nvbios_rd08(bios, data + 0x04) & 0xff) >> 0; 2367f5f518fSBen Skeggs p->ramcfg_11_06 = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0; 2377f5f518fSBen Skeggs p->ramcfg_11_07_02 = (nvbios_rd08(bios, data + 0x07) & 0x02) >> 1; 2387f5f518fSBen Skeggs p->ramcfg_11_07_04 = (nvbios_rd08(bios, data + 0x07) & 0x04) >> 2; 2397f5f518fSBen Skeggs p->ramcfg_11_07_08 = (nvbios_rd08(bios, data + 0x07) & 0x08) >> 3; 2407f5f518fSBen Skeggs p->ramcfg_11_07_10 = (nvbios_rd08(bios, data + 0x07) & 0x10) >> 4; 2417f5f518fSBen Skeggs p->ramcfg_11_07_40 = (nvbios_rd08(bios, data + 0x07) & 0x40) >> 6; 2427f5f518fSBen Skeggs p->ramcfg_11_07_80 = (nvbios_rd08(bios, data + 0x07) & 0x80) >> 7; 2437f5f518fSBen Skeggs p->ramcfg_11_08_01 = (nvbios_rd08(bios, data + 0x08) & 0x01) >> 0; 2447f5f518fSBen Skeggs p->ramcfg_11_08_02 = (nvbios_rd08(bios, data + 0x08) & 0x02) >> 1; 2457f5f518fSBen Skeggs p->ramcfg_11_08_04 = (nvbios_rd08(bios, data + 0x08) & 0x04) >> 2; 2467f5f518fSBen Skeggs p->ramcfg_11_08_08 = (nvbios_rd08(bios, data + 0x08) & 0x08) >> 3; 2477f5f518fSBen Skeggs p->ramcfg_11_08_10 = (nvbios_rd08(bios, data + 0x08) & 0x10) >> 4; 2487f5f518fSBen Skeggs p->ramcfg_11_08_20 = (nvbios_rd08(bios, data + 0x08) & 0x20) >> 5; 2497f5f518fSBen Skeggs p->ramcfg_11_09 = (nvbios_rd08(bios, data + 0x09) & 0xff) >> 0; 250c39f472eSBen Skeggs break; 251c39f472eSBen Skeggs default: 252c39f472eSBen Skeggs data = 0; 253c39f472eSBen Skeggs break; 254c39f472eSBen Skeggs } 255c39f472eSBen Skeggs return data; 256c39f472eSBen Skeggs } 257