1c39f472eSBen Skeggs /*
2c39f472eSBen Skeggs * Copyright 2012 Nouveau Community
3c39f472eSBen Skeggs *
4c39f472eSBen Skeggs * Permission is hereby granted, free of charge, to any person obtaining a
5c39f472eSBen Skeggs * copy of this software and associated documentation files (the "Software"),
6c39f472eSBen Skeggs * to deal in the Software without restriction, including without limitation
7c39f472eSBen Skeggs * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8c39f472eSBen Skeggs * and/or sell copies of the Software, and to permit persons to whom the
9c39f472eSBen Skeggs * Software is furnished to do so, subject to the following conditions:
10c39f472eSBen Skeggs *
11c39f472eSBen Skeggs * The above copyright notice and this permission notice shall be included in
12c39f472eSBen Skeggs * all copies or substantial portions of the Software.
13c39f472eSBen Skeggs *
14c39f472eSBen Skeggs * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15c39f472eSBen Skeggs * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16c39f472eSBen Skeggs * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17c39f472eSBen Skeggs * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18c39f472eSBen Skeggs * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19c39f472eSBen Skeggs * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20c39f472eSBen Skeggs * OTHER DEALINGS IN THE SOFTWARE.
21c39f472eSBen Skeggs *
22c39f472eSBen Skeggs * Authors: Martin Peres
23c39f472eSBen Skeggs */
24c39f472eSBen Skeggs #include <subdev/bios.h>
25c39f472eSBen Skeggs #include <subdev/bios/bit.h>
26c39f472eSBen Skeggs #include <subdev/bios/perf.h>
27c6e2f9bcSKarol Herbst #include <subdev/pci.h>
28c39f472eSBen Skeggs
298f6a5ab9SBen Skeggs u32
nvbios_perf_table(struct nvkm_bios * bios,u8 * ver,u8 * hdr,u8 * cnt,u8 * len,u8 * snr,u8 * ssz)30d390b480SBen Skeggs nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
31c39f472eSBen Skeggs u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
32c39f472eSBen Skeggs {
33c39f472eSBen Skeggs struct bit_entry bit_P;
348f6a5ab9SBen Skeggs u32 perf = 0;
35c39f472eSBen Skeggs
36c39f472eSBen Skeggs if (!bit_entry(bios, 'P', &bit_P)) {
37c39f472eSBen Skeggs if (bit_P.version <= 2) {
388f6a5ab9SBen Skeggs perf = nvbios_rd32(bios, bit_P.offset + 0);
39c39f472eSBen Skeggs if (perf) {
407f5f518fSBen Skeggs *ver = nvbios_rd08(bios, perf + 0);
417f5f518fSBen Skeggs *hdr = nvbios_rd08(bios, perf + 1);
42c39f472eSBen Skeggs if (*ver >= 0x40 && *ver < 0x41) {
437f5f518fSBen Skeggs *cnt = nvbios_rd08(bios, perf + 5);
447f5f518fSBen Skeggs *len = nvbios_rd08(bios, perf + 2);
457f5f518fSBen Skeggs *snr = nvbios_rd08(bios, perf + 4);
467f5f518fSBen Skeggs *ssz = nvbios_rd08(bios, perf + 3);
47c39f472eSBen Skeggs return perf;
48c39f472eSBen Skeggs } else
49c39f472eSBen Skeggs if (*ver >= 0x20 && *ver < 0x40) {
507f5f518fSBen Skeggs *cnt = nvbios_rd08(bios, perf + 2);
517f5f518fSBen Skeggs *len = nvbios_rd08(bios, perf + 3);
527f5f518fSBen Skeggs *snr = nvbios_rd08(bios, perf + 4);
537f5f518fSBen Skeggs *ssz = nvbios_rd08(bios, perf + 5);
54c39f472eSBen Skeggs return perf;
55c39f472eSBen Skeggs }
56c39f472eSBen Skeggs }
57c39f472eSBen Skeggs }
58c39f472eSBen Skeggs }
59c39f472eSBen Skeggs
60c39f472eSBen Skeggs if (bios->bmp_offset) {
617f5f518fSBen Skeggs if (nvbios_rd08(bios, bios->bmp_offset + 6) >= 0x25) {
627f5f518fSBen Skeggs perf = nvbios_rd16(bios, bios->bmp_offset + 0x94);
63c39f472eSBen Skeggs if (perf) {
647f5f518fSBen Skeggs *hdr = nvbios_rd08(bios, perf + 0);
657f5f518fSBen Skeggs *ver = nvbios_rd08(bios, perf + 1);
667f5f518fSBen Skeggs *cnt = nvbios_rd08(bios, perf + 2);
677f5f518fSBen Skeggs *len = nvbios_rd08(bios, perf + 3);
68c39f472eSBen Skeggs *snr = 0;
69c39f472eSBen Skeggs *ssz = 0;
70c39f472eSBen Skeggs return perf;
71c39f472eSBen Skeggs }
72c39f472eSBen Skeggs }
73c39f472eSBen Skeggs }
74c39f472eSBen Skeggs
758f6a5ab9SBen Skeggs return 0;
76c39f472eSBen Skeggs }
77c39f472eSBen Skeggs
788f6a5ab9SBen Skeggs u32
nvbios_perf_entry(struct nvkm_bios * bios,int idx,u8 * ver,u8 * hdr,u8 * cnt,u8 * len)79d390b480SBen Skeggs nvbios_perf_entry(struct nvkm_bios *bios, int idx,
80c39f472eSBen Skeggs u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
81c39f472eSBen Skeggs {
82c39f472eSBen Skeggs u8 snr, ssz;
838f6a5ab9SBen Skeggs u32 perf = nvbios_perf_table(bios, ver, hdr, cnt, len, &snr, &ssz);
84c39f472eSBen Skeggs if (perf && idx < *cnt) {
85c39f472eSBen Skeggs perf = perf + *hdr + (idx * (*len + (snr * ssz)));
86c39f472eSBen Skeggs *hdr = *len;
87c39f472eSBen Skeggs *cnt = snr;
88c39f472eSBen Skeggs *len = ssz;
89c39f472eSBen Skeggs return perf;
90c39f472eSBen Skeggs }
918f6a5ab9SBen Skeggs return 0;
92c39f472eSBen Skeggs }
93c39f472eSBen Skeggs
948f6a5ab9SBen Skeggs u32
nvbios_perfEp(struct nvkm_bios * bios,int idx,u8 * ver,u8 * hdr,u8 * cnt,u8 * len,struct nvbios_perfE * info)95d390b480SBen Skeggs nvbios_perfEp(struct nvkm_bios *bios, int idx,
96d390b480SBen Skeggs u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_perfE *info)
97c39f472eSBen Skeggs {
988f6a5ab9SBen Skeggs u32 perf = nvbios_perf_entry(bios, idx, ver, hdr, cnt, len);
99c39f472eSBen Skeggs memset(info, 0x00, sizeof(*info));
1007f5f518fSBen Skeggs info->pstate = nvbios_rd08(bios, perf + 0x00);
101c39f472eSBen Skeggs switch (!!perf * *ver) {
102c39f472eSBen Skeggs case 0x12:
103c39f472eSBen Skeggs case 0x13:
104c39f472eSBen Skeggs case 0x14:
1057f5f518fSBen Skeggs info->core = nvbios_rd32(bios, perf + 0x01) * 10;
1067f5f518fSBen Skeggs info->memory = nvbios_rd32(bios, perf + 0x05) * 20;
1077f5f518fSBen Skeggs info->fanspeed = nvbios_rd08(bios, perf + 0x37);
108c39f472eSBen Skeggs if (*hdr > 0x38)
1097f5f518fSBen Skeggs info->voltage = nvbios_rd08(bios, perf + 0x38);
110c39f472eSBen Skeggs break;
111c39f472eSBen Skeggs case 0x21:
112c39f472eSBen Skeggs case 0x23:
113c39f472eSBen Skeggs case 0x24:
1147f5f518fSBen Skeggs info->fanspeed = nvbios_rd08(bios, perf + 0x04);
1157f5f518fSBen Skeggs info->voltage = nvbios_rd08(bios, perf + 0x05);
1167f5f518fSBen Skeggs info->shader = nvbios_rd16(bios, perf + 0x06) * 1000;
117c39f472eSBen Skeggs info->core = info->shader + (signed char)
1187f5f518fSBen Skeggs nvbios_rd08(bios, perf + 0x08) * 1000;
11946484438SBen Skeggs switch (bios->subdev.device->chipset) {
120c39f472eSBen Skeggs case 0x49:
121c39f472eSBen Skeggs case 0x4b:
1227f5f518fSBen Skeggs info->memory = nvbios_rd16(bios, perf + 0x0b) * 1000;
123c39f472eSBen Skeggs break;
124c39f472eSBen Skeggs default:
1257f5f518fSBen Skeggs info->memory = nvbios_rd16(bios, perf + 0x0b) * 2000;
126c39f472eSBen Skeggs break;
127c39f472eSBen Skeggs }
128c39f472eSBen Skeggs break;
129c39f472eSBen Skeggs case 0x25:
1307f5f518fSBen Skeggs info->fanspeed = nvbios_rd08(bios, perf + 0x04);
1317f5f518fSBen Skeggs info->voltage = nvbios_rd08(bios, perf + 0x05);
1327f5f518fSBen Skeggs info->core = nvbios_rd16(bios, perf + 0x06) * 1000;
1337f5f518fSBen Skeggs info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000;
1347f5f518fSBen Skeggs info->memory = nvbios_rd16(bios, perf + 0x0c) * 1000;
135c39f472eSBen Skeggs break;
136c39f472eSBen Skeggs case 0x30:
1377f5f518fSBen Skeggs info->script = nvbios_rd16(bios, perf + 0x02);
138f6e7393eSGustavo A. R. Silva fallthrough;
139c39f472eSBen Skeggs case 0x35:
1407f5f518fSBen Skeggs info->fanspeed = nvbios_rd08(bios, perf + 0x06);
1417f5f518fSBen Skeggs info->voltage = nvbios_rd08(bios, perf + 0x07);
1427f5f518fSBen Skeggs info->core = nvbios_rd16(bios, perf + 0x08) * 1000;
1437f5f518fSBen Skeggs info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000;
1447f5f518fSBen Skeggs info->memory = nvbios_rd16(bios, perf + 0x0c) * 1000;
1457f5f518fSBen Skeggs info->vdec = nvbios_rd16(bios, perf + 0x10) * 1000;
1467f5f518fSBen Skeggs info->disp = nvbios_rd16(bios, perf + 0x14) * 1000;
147c39f472eSBen Skeggs break;
148c39f472eSBen Skeggs case 0x40:
1497f5f518fSBen Skeggs info->voltage = nvbios_rd08(bios, perf + 0x02);
150c6e2f9bcSKarol Herbst switch (nvbios_rd08(bios, perf + 0xb) & 0x3) {
151c6e2f9bcSKarol Herbst case 0:
152c6e2f9bcSKarol Herbst info->pcie_speed = NVKM_PCIE_SPEED_5_0;
153c6e2f9bcSKarol Herbst break;
154c6e2f9bcSKarol Herbst case 3:
155c6e2f9bcSKarol Herbst case 1:
156c6e2f9bcSKarol Herbst info->pcie_speed = NVKM_PCIE_SPEED_2_5;
157c6e2f9bcSKarol Herbst break;
158c6e2f9bcSKarol Herbst case 2:
159c6e2f9bcSKarol Herbst info->pcie_speed = NVKM_PCIE_SPEED_8_0;
160c6e2f9bcSKarol Herbst break;
161c6e2f9bcSKarol Herbst default:
162c6e2f9bcSKarol Herbst break;
163c6e2f9bcSKarol Herbst }
164c6e2f9bcSKarol Herbst info->pcie_width = 0xff;
165c39f472eSBen Skeggs break;
166c39f472eSBen Skeggs default:
1678f6a5ab9SBen Skeggs return 0;
168c39f472eSBen Skeggs }
169c39f472eSBen Skeggs return perf;
170c39f472eSBen Skeggs }
171c39f472eSBen Skeggs
172c39f472eSBen Skeggs u32
nvbios_perfSe(struct nvkm_bios * bios,u32 perfE,int idx,u8 * ver,u8 * hdr,u8 cnt,u8 len)173d390b480SBen Skeggs nvbios_perfSe(struct nvkm_bios *bios, u32 perfE, int idx,
174c39f472eSBen Skeggs u8 *ver, u8 *hdr, u8 cnt, u8 len)
175c39f472eSBen Skeggs {
176c39f472eSBen Skeggs u32 data = 0x00000000;
177c39f472eSBen Skeggs if (idx < cnt) {
178c39f472eSBen Skeggs data = perfE + *hdr + (idx * len);
179c39f472eSBen Skeggs *hdr = len;
180c39f472eSBen Skeggs }
181c39f472eSBen Skeggs return data;
182c39f472eSBen Skeggs }
183c39f472eSBen Skeggs
184c39f472eSBen Skeggs u32
nvbios_perfSp(struct nvkm_bios * bios,u32 perfE,int idx,u8 * ver,u8 * hdr,u8 cnt,u8 len,struct nvbios_perfS * info)185d390b480SBen Skeggs nvbios_perfSp(struct nvkm_bios *bios, u32 perfE, int idx,
186c39f472eSBen Skeggs u8 *ver, u8 *hdr, u8 cnt, u8 len,
187c39f472eSBen Skeggs struct nvbios_perfS *info)
188c39f472eSBen Skeggs {
189c39f472eSBen Skeggs u32 data = nvbios_perfSe(bios, perfE, idx, ver, hdr, cnt, len);
190c39f472eSBen Skeggs memset(info, 0x00, sizeof(*info));
191c39f472eSBen Skeggs switch (!!data * *ver) {
192c39f472eSBen Skeggs case 0x40:
1937f5f518fSBen Skeggs info->v40.freq = (nvbios_rd16(bios, data + 0x00) & 0x3fff) * 1000;
194c39f472eSBen Skeggs break;
195c39f472eSBen Skeggs default:
196c39f472eSBen Skeggs break;
197c39f472eSBen Skeggs }
198c39f472eSBen Skeggs return data;
199c39f472eSBen Skeggs }
200c39f472eSBen Skeggs
201c39f472eSBen Skeggs int
nvbios_perf_fan_parse(struct nvkm_bios * bios,struct nvbios_perf_fan * fan)202d390b480SBen Skeggs nvbios_perf_fan_parse(struct nvkm_bios *bios,
203c39f472eSBen Skeggs struct nvbios_perf_fan *fan)
204c39f472eSBen Skeggs {
205c39f472eSBen Skeggs u8 ver, hdr, cnt, len, snr, ssz;
2068f6a5ab9SBen Skeggs u32 perf = nvbios_perf_table(bios, &ver, &hdr, &cnt, &len, &snr, &ssz);
207c39f472eSBen Skeggs if (!perf)
208c39f472eSBen Skeggs return -ENODEV;
209c39f472eSBen Skeggs
210c39f472eSBen Skeggs if (ver >= 0x20 && ver < 0x40 && hdr > 6)
2117f5f518fSBen Skeggs fan->pwm_divisor = nvbios_rd16(bios, perf + 6);
212c39f472eSBen Skeggs else
213c39f472eSBen Skeggs fan->pwm_divisor = 0;
214c39f472eSBen Skeggs
215c39f472eSBen Skeggs return 0;
216c39f472eSBen Skeggs }
217