1 /* 2 * Copyright 2019 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 #include <core/subdev.h> 23 #include <nvfw/flcn.h> 24 25 void 26 loader_config_dump(struct nvkm_subdev *subdev, const struct loader_config *hdr) 27 { 28 nvkm_debug(subdev, "loaderConfig\n"); 29 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx); 30 nvkm_debug(subdev, "\tcodeDmaBase : 0x%xx\n", hdr->code_dma_base); 31 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total); 32 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load); 33 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point); 34 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base); 35 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); 36 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base); 37 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc); 38 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv); 39 nvkm_debug(subdev, "\tcodeDmaBase1 : 0x%x\n", hdr->code_dma_base1); 40 nvkm_debug(subdev, "\tdataDmaBase1 : 0x%x\n", hdr->data_dma_base1); 41 nvkm_debug(subdev, "\tovlyDmaBase1 : 0x%x\n", hdr->overlay_dma_base1); 42 } 43 44 void 45 loader_config_v1_dump(struct nvkm_subdev *subdev, 46 const struct loader_config_v1 *hdr) 47 { 48 nvkm_debug(subdev, "loaderConfig\n"); 49 nvkm_debug(subdev, "\treserved : 0x%08x\n", hdr->reserved); 50 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx); 51 nvkm_debug(subdev, "\tcodeDmaBase : 0x%llxx\n", hdr->code_dma_base); 52 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total); 53 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load); 54 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point); 55 nvkm_debug(subdev, "\tdataDmaBase : 0x%llx\n", hdr->data_dma_base); 56 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); 57 nvkm_debug(subdev, "\toverlayDmaBase: 0x%llx\n", hdr->overlay_dma_base); 58 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc); 59 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv); 60 } 61 62 void 63 flcn_bl_dmem_desc_dump(struct nvkm_subdev *subdev, 64 const struct flcn_bl_dmem_desc *hdr) 65 { 66 nvkm_debug(subdev, "flcnBlDmemDesc\n"); 67 nvkm_debug(subdev, "\treserved : 0x%08x 0x%08x 0x%08x 0x%08x\n", 68 hdr->reserved[0], hdr->reserved[1], hdr->reserved[2], 69 hdr->reserved[3]); 70 nvkm_debug(subdev, "\tsignature : 0x%08x 0x%08x 0x%08x 0x%08x\n", 71 hdr->signature[0], hdr->signature[1], hdr->signature[2], 72 hdr->signature[3]); 73 nvkm_debug(subdev, "\tctxDma : %d\n", hdr->ctx_dma); 74 nvkm_debug(subdev, "\tcodeDmaBase : 0x%x\n", hdr->code_dma_base); 75 nvkm_debug(subdev, "\tnonSecCodeOff : 0x%x\n", hdr->non_sec_code_off); 76 nvkm_debug(subdev, "\tnonSecCodeSize: 0x%x\n", hdr->non_sec_code_size); 77 nvkm_debug(subdev, "\tsecCodeOff : 0x%x\n", hdr->sec_code_off); 78 nvkm_debug(subdev, "\tsecCodeSize : 0x%x\n", hdr->sec_code_size); 79 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point); 80 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base); 81 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); 82 nvkm_debug(subdev, "\tcodeDmaBase1 : 0x%x\n", hdr->code_dma_base1); 83 nvkm_debug(subdev, "\tdataDmaBase1 : 0x%x\n", hdr->data_dma_base1); 84 } 85 86 void 87 flcn_bl_dmem_desc_v1_dump(struct nvkm_subdev *subdev, 88 const struct flcn_bl_dmem_desc_v1 *hdr) 89 { 90 nvkm_debug(subdev, "flcnBlDmemDesc\n"); 91 nvkm_debug(subdev, "\treserved : 0x%08x 0x%08x 0x%08x 0x%08x\n", 92 hdr->reserved[0], hdr->reserved[1], hdr->reserved[2], 93 hdr->reserved[3]); 94 nvkm_debug(subdev, "\tsignature : 0x%08x 0x%08x 0x%08x 0x%08x\n", 95 hdr->signature[0], hdr->signature[1], hdr->signature[2], 96 hdr->signature[3]); 97 nvkm_debug(subdev, "\tctxDma : %d\n", hdr->ctx_dma); 98 nvkm_debug(subdev, "\tcodeDmaBase : 0x%llx\n", hdr->code_dma_base); 99 nvkm_debug(subdev, "\tnonSecCodeOff : 0x%x\n", hdr->non_sec_code_off); 100 nvkm_debug(subdev, "\tnonSecCodeSize: 0x%x\n", hdr->non_sec_code_size); 101 nvkm_debug(subdev, "\tsecCodeOff : 0x%x\n", hdr->sec_code_off); 102 nvkm_debug(subdev, "\tsecCodeSize : 0x%x\n", hdr->sec_code_size); 103 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point); 104 nvkm_debug(subdev, "\tdataDmaBase : 0x%llx\n", hdr->data_dma_base); 105 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); 106 } 107 108 void 109 flcn_bl_dmem_desc_v2_dump(struct nvkm_subdev *subdev, 110 const struct flcn_bl_dmem_desc_v2 *hdr) 111 { 112 flcn_bl_dmem_desc_v1_dump(subdev, (void *)hdr); 113 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc); 114 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv); 115 } 116