xref: /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/falcon/fw.c (revision 0e44c21708761977dcbea9b846b51a6fb684907a)
1 /*
2  * Copyright 2022 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "priv.h"
23 
24 #include <core/memory.h>
25 #include <subdev/mmu.h>
26 
27 #include <nvfw/fw.h>
28 #include <nvfw/hs.h>
29 
30 int
31 nvkm_falcon_fw_patch(struct nvkm_falcon_fw *fw)
32 {
33 	struct nvkm_falcon *falcon = fw->falcon;
34 	u32 sig_base_src = fw->sig_base_prd;
35 	u32 src, dst, len, i;
36 	int idx = 0;
37 
38 	FLCNFW_DBG(fw, "patching sigs:%d size:%d", fw->sig_nr, fw->sig_size);
39 	if (fw->func->signature) {
40 		idx = fw->func->signature(fw, &sig_base_src);
41 		if (idx < 0)
42 			return idx;
43 	}
44 
45 	src = idx * fw->sig_size;
46 	dst = fw->sig_base_img;
47 	len = fw->sig_size / 4;
48 	FLCNFW_DBG(fw, "patch idx:%d src:%08x dst:%08x", idx, sig_base_src + src, dst);
49 	for (i = 0; i < len; i++) {
50 		u32 sig = *(u32 *)(fw->sigs + src);
51 
52 		if (nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
53 			if (i % 8 == 0)
54 				printk(KERN_INFO "sig -> %08x:", dst);
55 			printk(KERN_CONT " %08x", sig);
56 		}
57 
58 		*(u32 *)(fw->fw.img + dst) = sig;
59 		src += 4;
60 		dst += 4;
61 	}
62 
63 	return 0;
64 }
65 
66 static void
67 nvkm_falcon_fw_dtor_sigs(struct nvkm_falcon_fw *fw)
68 {
69 	kfree(fw->sigs);
70 	fw->sigs = NULL;
71 }
72 
73 int
74 nvkm_falcon_fw_boot(struct nvkm_falcon_fw *fw, struct nvkm_subdev *user,
75 		    bool release, u32 *pmbox0, u32 *pmbox1, u32 mbox0_ok, u32 irqsclr)
76 {
77 	struct nvkm_falcon *falcon = fw->falcon;
78 	int ret;
79 
80 	ret = nvkm_falcon_get(falcon, user);
81 	if (ret)
82 		return ret;
83 
84 	if (fw->sigs) {
85 		ret = nvkm_falcon_fw_patch(fw);
86 		if (ret)
87 			goto done;
88 
89 		nvkm_falcon_fw_dtor_sigs(fw);
90 	}
91 
92 	FLCNFW_DBG(fw, "resetting");
93 	fw->func->reset(fw);
94 
95 	FLCNFW_DBG(fw, "loading");
96 	ret = fw->func->load(fw);
97 	if (ret)
98 		goto done;
99 
100 	FLCNFW_DBG(fw, "booting");
101 	ret = fw->func->boot(fw, pmbox0, pmbox1, mbox0_ok, irqsclr);
102 	if (ret)
103 		FLCNFW_ERR(fw, "boot failed: %d", ret);
104 	else
105 		FLCNFW_DBG(fw, "booted");
106 
107 done:
108 	if (ret || release)
109 		nvkm_falcon_put(falcon, user);
110 	return ret;
111 }
112 
113 int
114 nvkm_falcon_fw_oneinit(struct nvkm_falcon_fw *fw, struct nvkm_falcon *falcon,
115 		       struct nvkm_vmm *vmm, struct nvkm_memory *inst)
116 {
117 	fw->falcon = falcon;
118 	fw->vmm = nvkm_vmm_ref(vmm);
119 	fw->inst = nvkm_memory_ref(inst);
120 	return 0;
121 }
122 
123 void
124 nvkm_falcon_fw_dtor(struct nvkm_falcon_fw *fw)
125 {
126 	nvkm_vmm_unref(&fw->vmm);
127 	nvkm_memory_unref(&fw->inst);
128 	nvkm_falcon_fw_dtor_sigs(fw);
129 	nvkm_firmware_dtor(&fw->fw);
130 }
131 
132 static const struct nvkm_firmware_func
133 nvkm_falcon_fw = {
134 	.type = NVKM_FIRMWARE_IMG_RAM,
135 };
136 
137 int
138 nvkm_falcon_fw_sign(struct nvkm_falcon_fw *fw, u32 sig_base_img, u32 sig_size, const u8 *sigs,
139 		    int sig_nr_prd, u32 sig_base_prd, int sig_nr_dbg, u32 sig_base_dbg)
140 {
141 	fw->sig_base_prd = sig_base_prd;
142 	fw->sig_base_dbg = sig_base_dbg;
143 	fw->sig_base_img = sig_base_img;
144 	fw->sig_size = sig_size;
145 	fw->sig_nr = sig_nr_prd + sig_nr_dbg;
146 
147 	fw->sigs = kmalloc_array(fw->sig_nr, fw->sig_size, GFP_KERNEL);
148 	if (!fw->sigs)
149 		return -ENOMEM;
150 
151 	memcpy(fw->sigs, sigs + sig_base_prd, sig_nr_prd * fw->sig_size);
152 	if (sig_nr_dbg)
153 		memcpy(fw->sigs + sig_size, sigs + sig_base_dbg, sig_nr_dbg * fw->sig_size);
154 
155 	return 0;
156 }
157 
158 int
159 nvkm_falcon_fw_ctor(const struct nvkm_falcon_fw_func *func, const char *name,
160 		    struct nvkm_device *device, bool dma, const void *src, u32 len,
161 		    struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
162 {
163 	const struct nvkm_firmware_func *type = &nvkm_falcon_fw;
164 	int ret;
165 
166 	fw->func = func;
167 
168 	ret = nvkm_firmware_ctor(type, name, device, src, len, &fw->fw);
169 	if (ret)
170 		return ret;
171 
172 	return falcon ? nvkm_falcon_fw_oneinit(fw, falcon, NULL, NULL) : 0;
173 }
174 
175 int
176 nvkm_falcon_fw_ctor_hs(const struct nvkm_falcon_fw_func *func, const char *name,
177 		       struct nvkm_subdev *subdev, const char *bl, const char *img, int ver,
178 		       struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)
179 {
180 	const struct firmware *blob;
181 	const struct nvfw_bin_hdr *hdr;
182 	const struct nvfw_hs_header *hshdr;
183 	const struct nvfw_hs_load_header *lhdr;
184 	u32 loc, sig;
185 	int ret;
186 
187 	ret = nvkm_firmware_load_name(subdev, img, "", ver, &blob);
188 	if (ret)
189 		return ret;
190 
191 	hdr = nvfw_bin_hdr(subdev, blob->data);
192 	hshdr = nvfw_hs_header(subdev, blob->data + hdr->header_offset);
193 	loc = *(u32 *)(blob->data + hshdr->patch_loc);
194 	sig = *(u32 *)(blob->data + hshdr->patch_sig);
195 
196 	ret = nvkm_falcon_fw_ctor(func, name, subdev->device, bl != NULL,
197 				  blob->data + hdr->data_offset, hdr->data_size, falcon, fw);
198 	if (ret)
199 		goto done;
200 
201 	ret = nvkm_falcon_fw_sign(fw, loc, hshdr->sig_prod_size, blob->data,
202 				  1, hshdr->sig_prod_offset + sig,
203 				  1, hshdr->sig_dbg_offset + sig);
204 	if (ret)
205 		goto done;
206 
207 	lhdr = nvfw_hs_load_header(subdev, blob->data + hshdr->hdr_offset);
208 
209 	fw->nmem_base_img = 0;
210 	fw->nmem_base = lhdr->non_sec_code_off;
211 	fw->nmem_size = lhdr->non_sec_code_size;
212 
213 	fw->imem_base_img = lhdr->apps[0];
214 	fw->imem_base = ALIGN(lhdr->apps[0], 0x100);
215 	fw->imem_size = lhdr->apps[lhdr->num_apps + 0];
216 
217 	fw->dmem_base_img = lhdr->data_dma_base;
218 	fw->dmem_base = 0;
219 	fw->dmem_size = lhdr->data_size;
220 	fw->dmem_sign = loc - lhdr->data_dma_base;
221 
222 	fw->boot_addr = fw->nmem_base;
223 done:
224 	if (ret)
225 		nvkm_falcon_fw_dtor(fw);
226 
227 	nvkm_firmware_put(blob);
228 	return ret;
229 }
230