1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 
25 #include <core/os.h>
26 #include <core/engctx.h>
27 #include <core/namedb.h>
28 #include <core/handle.h>
29 #include <core/gpuobj.h>
30 #include <core/event.h>
31 #include <nvif/event.h>
32 
33 #include <subdev/bar.h>
34 
35 #include <engine/disp.h>
36 
37 #include "nv50.h"
38 
39 /*******************************************************************************
40  * software object classes
41  ******************************************************************************/
42 
43 static int
44 nv50_sw_mthd_dma_vblsem(struct nouveau_object *object, u32 mthd,
45 			      void *args, u32 size)
46 {
47 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
48 	struct nouveau_fifo_chan *fifo = (void *)nv_object(chan)->parent;
49 	struct nouveau_handle *handle;
50 	int ret = -EINVAL;
51 
52 	handle = nouveau_namedb_get(nv_namedb(fifo), *(u32 *)args);
53 	if (!handle)
54 		return -ENOENT;
55 
56 	if (nv_iclass(handle->object, NV_GPUOBJ_CLASS)) {
57 		struct nouveau_gpuobj *gpuobj = nv_gpuobj(handle->object);
58 		chan->vblank.ctxdma = gpuobj->node->offset >> 4;
59 		ret = 0;
60 	}
61 	nouveau_namedb_put(handle);
62 	return ret;
63 }
64 
65 static int
66 nv50_sw_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
67 				 void *args, u32 size)
68 {
69 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
70 	chan->vblank.offset = *(u32 *)args;
71 	return 0;
72 }
73 
74 int
75 nv50_sw_mthd_vblsem_value(struct nouveau_object *object, u32 mthd,
76 				void *args, u32 size)
77 {
78 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
79 	chan->vblank.value = *(u32 *)args;
80 	return 0;
81 }
82 
83 int
84 nv50_sw_mthd_vblsem_release(struct nouveau_object *object, u32 mthd,
85 				  void *args, u32 size)
86 {
87 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
88 	u32 head = *(u32 *)args;
89 	if (head >= nouveau_disp(chan)->vblank.index_nr)
90 		return -EINVAL;
91 
92 	nvkm_notify_get(&chan->vblank.notify[head]);
93 	return 0;
94 }
95 
96 int
97 nv50_sw_mthd_flip(struct nouveau_object *object, u32 mthd,
98 			void *args, u32 size)
99 {
100 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
101 	if (chan->base.flip)
102 		return chan->base.flip(chan->base.flip_data);
103 	return -EINVAL;
104 }
105 
106 static struct nouveau_omthds
107 nv50_sw_omthds[] = {
108 	{ 0x018c, 0x018c, nv50_sw_mthd_dma_vblsem },
109 	{ 0x0400, 0x0400, nv50_sw_mthd_vblsem_offset },
110 	{ 0x0404, 0x0404, nv50_sw_mthd_vblsem_value },
111 	{ 0x0408, 0x0408, nv50_sw_mthd_vblsem_release },
112 	{ 0x0500, 0x0500, nv50_sw_mthd_flip },
113 	{}
114 };
115 
116 static struct nouveau_oclass
117 nv50_sw_sclass[] = {
118 	{ 0x506e, &nouveau_object_ofuncs, nv50_sw_omthds },
119 	{}
120 };
121 
122 /*******************************************************************************
123  * software context
124  ******************************************************************************/
125 
126 static int
127 nv50_sw_vblsem_release(struct nvkm_notify *notify)
128 {
129 	struct nv50_sw_chan *chan =
130 		container_of(notify, typeof(*chan), vblank.notify[notify->index]);
131 	struct nv50_sw_priv *priv = (void *)nv_object(chan)->engine;
132 	struct nouveau_bar *bar = nouveau_bar(priv);
133 
134 	nv_wr32(priv, 0x001704, chan->vblank.channel);
135 	nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
136 	bar->flush(bar);
137 
138 	if (nv_device(priv)->chipset == 0x50) {
139 		nv_wr32(priv, 0x001570, chan->vblank.offset);
140 		nv_wr32(priv, 0x001574, chan->vblank.value);
141 	} else {
142 		nv_wr32(priv, 0x060010, chan->vblank.offset);
143 		nv_wr32(priv, 0x060014, chan->vblank.value);
144 	}
145 
146 	return NVKM_NOTIFY_DROP;
147 }
148 
149 void
150 nv50_sw_context_dtor(struct nouveau_object *object)
151 {
152 	struct nv50_sw_chan *chan = (void *)object;
153 	int i;
154 
155 	for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++)
156 		nvkm_notify_fini(&chan->vblank.notify[i]);
157 
158 	nouveau_sw_context_destroy(&chan->base);
159 }
160 
161 int
162 nv50_sw_context_ctor(struct nouveau_object *parent,
163 			   struct nouveau_object *engine,
164 			   struct nouveau_oclass *oclass, void *data, u32 size,
165 			   struct nouveau_object **pobject)
166 {
167 	struct nouveau_disp *pdisp = nouveau_disp(parent);
168 	struct nv50_sw_cclass *pclass = (void *)oclass;
169 	struct nv50_sw_chan *chan;
170 	int ret, i;
171 
172 	ret = nouveau_sw_context_create(parent, engine, oclass, &chan);
173 	*pobject = nv_object(chan);
174 	if (ret)
175 		return ret;
176 
177 	for (i = 0; pdisp && i < pdisp->vblank.index_nr; i++) {
178 		ret = nvkm_notify_init(NULL, &pdisp->vblank, pclass->vblank,
179 				       false,
180 				       &(struct nvif_notify_head_req_v0) {
181 					.head = i,
182 				       },
183 				       sizeof(struct nvif_notify_head_req_v0),
184 				       sizeof(struct nvif_notify_head_rep_v0),
185 				       &chan->vblank.notify[i]);
186 		if (ret)
187 			return ret;
188 	}
189 
190 	chan->vblank.channel = nv_gpuobj(parent->parent)->addr >> 12;
191 	return 0;
192 }
193 
194 static struct nv50_sw_cclass
195 nv50_sw_cclass = {
196 	.base.handle = NV_ENGCTX(SW, 0x50),
197 	.base.ofuncs = &(struct nouveau_ofuncs) {
198 		.ctor = nv50_sw_context_ctor,
199 		.dtor = nv50_sw_context_dtor,
200 		.init = _nouveau_sw_context_init,
201 		.fini = _nouveau_sw_context_fini,
202 	},
203 	.vblank = nv50_sw_vblsem_release,
204 };
205 
206 /*******************************************************************************
207  * software engine/subdev functions
208  ******************************************************************************/
209 
210 int
211 nv50_sw_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
212 		   struct nouveau_oclass *oclass, void *data, u32 size,
213 		   struct nouveau_object **pobject)
214 {
215 	struct nv50_sw_oclass *pclass = (void *)oclass;
216 	struct nv50_sw_priv *priv;
217 	int ret;
218 
219 	ret = nouveau_sw_create(parent, engine, oclass, &priv);
220 	*pobject = nv_object(priv);
221 	if (ret)
222 		return ret;
223 
224 	nv_engine(priv)->cclass = pclass->cclass;
225 	nv_engine(priv)->sclass = pclass->sclass;
226 	nv_subdev(priv)->intr = nv04_sw_intr;
227 	return 0;
228 }
229 
230 struct nouveau_oclass *
231 nv50_sw_oclass = &(struct nv50_sw_oclass) {
232 	.base.handle = NV_ENGINE(SW, 0x50),
233 	.base.ofuncs = &(struct nouveau_ofuncs) {
234 		.ctor = nv50_sw_ctor,
235 		.dtor = _nouveau_sw_dtor,
236 		.init = _nouveau_sw_init,
237 		.fini = _nouveau_sw_fini,
238 	},
239 	.cclass = &nv50_sw_cclass.base,
240 	.sclass =  nv50_sw_sclass,
241 }.base;
242