1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "nv50.h"
25 
26 #include <subdev/bar.h>
27 
28 /*******************************************************************************
29  * software object classes
30  ******************************************************************************/
31 
32 static int
33 gf100_sw_mthd_vblsem_offset(struct nvkm_object *object, u32 mthd,
34 			    void *args, u32 size)
35 {
36 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
37 	u64 data = *(u32 *)args;
38 	if (mthd == 0x0400) {
39 		chan->vblank.offset &= 0x00ffffffffULL;
40 		chan->vblank.offset |= data << 32;
41 	} else {
42 		chan->vblank.offset &= 0xff00000000ULL;
43 		chan->vblank.offset |= data;
44 	}
45 	return 0;
46 }
47 
48 static int
49 gf100_sw_mthd_mp_control(struct nvkm_object *object, u32 mthd,
50 			 void *args, u32 size)
51 {
52 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
53 	struct nvkm_sw *sw = (void *)nv_object(chan)->engine;
54 	struct nvkm_device *device = sw->engine.subdev.device;
55 	u32 data = *(u32 *)args;
56 
57 	switch (mthd) {
58 	case 0x600:
59 		nvkm_wr32(device, 0x419e00, data); /* MP.PM_UNK000 */
60 		break;
61 	case 0x644:
62 		if (data & ~0x1ffffe)
63 			return -EINVAL;
64 		nvkm_wr32(device, 0x419e44, data); /* MP.TRAP_WARP_ERROR_EN */
65 		break;
66 	case 0x6ac:
67 		nvkm_wr32(device, 0x419eac, data); /* MP.PM_UNK0AC */
68 		break;
69 	default:
70 		return -EINVAL;
71 	}
72 	return 0;
73 }
74 
75 static struct nvkm_omthds
76 gf100_sw_omthds[] = {
77 	{ 0x0400, 0x0400, gf100_sw_mthd_vblsem_offset },
78 	{ 0x0404, 0x0404, gf100_sw_mthd_vblsem_offset },
79 	{ 0x0408, 0x0408, nv50_sw_mthd_vblsem_value },
80 	{ 0x040c, 0x040c, nv50_sw_mthd_vblsem_release },
81 	{ 0x0500, 0x0500, nv50_sw_mthd_flip },
82 	{ 0x0600, 0x0600, gf100_sw_mthd_mp_control },
83 	{ 0x0644, 0x0644, gf100_sw_mthd_mp_control },
84 	{ 0x06ac, 0x06ac, gf100_sw_mthd_mp_control },
85 	{}
86 };
87 
88 static struct nvkm_oclass
89 gf100_sw_sclass[] = {
90 	{ 0x906e, &nvkm_object_ofuncs, gf100_sw_omthds },
91 	{}
92 };
93 
94 /*******************************************************************************
95  * software context
96  ******************************************************************************/
97 
98 static int
99 gf100_sw_vblsem_release(struct nvkm_notify *notify)
100 {
101 	struct nv50_sw_chan *chan =
102 		container_of(notify, typeof(*chan), vblank.notify[notify->index]);
103 	struct nvkm_sw *sw = (void *)nv_object(chan)->engine;
104 	struct nvkm_device *device = sw->engine.subdev.device;
105 	struct nvkm_bar *bar = device->bar;
106 
107 	nvkm_wr32(device, 0x001718, 0x80000000 | chan->vblank.channel);
108 	bar->flush(bar);
109 	nvkm_wr32(device, 0x06000c, upper_32_bits(chan->vblank.offset));
110 	nvkm_wr32(device, 0x060010, lower_32_bits(chan->vblank.offset));
111 	nvkm_wr32(device, 0x060014, chan->vblank.value);
112 
113 	return NVKM_NOTIFY_DROP;
114 }
115 
116 static struct nv50_sw_cclass
117 gf100_sw_cclass = {
118 	.base.handle = NV_ENGCTX(SW, 0xc0),
119 	.base.ofuncs = &(struct nvkm_ofuncs) {
120 		.ctor = nv50_sw_context_ctor,
121 		.dtor = nv50_sw_context_dtor,
122 		.init = _nvkm_sw_context_init,
123 		.fini = _nvkm_sw_context_fini,
124 	},
125 	.vblank = gf100_sw_vblsem_release,
126 };
127 
128 /*******************************************************************************
129  * software engine/subdev functions
130  ******************************************************************************/
131 
132 struct nvkm_oclass *
133 gf100_sw_oclass = &(struct nv50_sw_oclass) {
134 	.base.handle = NV_ENGINE(SW, 0xc0),
135 	.base.ofuncs = &(struct nvkm_ofuncs) {
136 		.ctor = nv50_sw_ctor,
137 		.dtor = _nvkm_sw_dtor,
138 		.init = _nvkm_sw_init,
139 		.fini = _nvkm_sw_fini,
140 	},
141 	.cclass = &gf100_sw_cclass.base,
142 	.sclass =  gf100_sw_sclass,
143 }.base;
144