1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "nv50.h"
25 
26 #include <subdev/bar.h>
27 
28 #include <nvif/ioctl.h>
29 
30 /*******************************************************************************
31  * software object classes
32  ******************************************************************************/
33 
34 static int
35 gf100_sw_mthd_vblsem_offset(struct nvkm_object *object, u32 mthd,
36 			    void *args, u32 size)
37 {
38 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
39 	u64 data = *(u32 *)args;
40 	if (mthd == 0x0400) {
41 		chan->vblank.offset &= 0x00ffffffffULL;
42 		chan->vblank.offset |= data << 32;
43 	} else {
44 		chan->vblank.offset &= 0xff00000000ULL;
45 		chan->vblank.offset |= data;
46 	}
47 	return 0;
48 }
49 
50 static int
51 gf100_sw_mthd_mp_control(struct nvkm_object *object, u32 mthd,
52 			 void *args, u32 size)
53 {
54 	struct nv50_sw_chan *chan = (void *)nv_engctx(object->parent);
55 	struct nvkm_sw *sw = (void *)nv_object(chan)->engine;
56 	struct nvkm_device *device = sw->engine.subdev.device;
57 	u32 data = *(u32 *)args;
58 
59 	switch (mthd) {
60 	case 0x600:
61 		nvkm_wr32(device, 0x419e00, data); /* MP.PM_UNK000 */
62 		break;
63 	case 0x644:
64 		if (data & ~0x1ffffe)
65 			return -EINVAL;
66 		nvkm_wr32(device, 0x419e44, data); /* MP.TRAP_WARP_ERROR_EN */
67 		break;
68 	case 0x6ac:
69 		nvkm_wr32(device, 0x419eac, data); /* MP.PM_UNK0AC */
70 		break;
71 	default:
72 		return -EINVAL;
73 	}
74 	return 0;
75 }
76 
77 static struct nvkm_omthds
78 gf100_sw_omthds[] = {
79 	{ 0x0400, 0x0400, gf100_sw_mthd_vblsem_offset },
80 	{ 0x0404, 0x0404, gf100_sw_mthd_vblsem_offset },
81 	{ 0x0408, 0x0408, nv50_sw_mthd_vblsem_value },
82 	{ 0x040c, 0x040c, nv50_sw_mthd_vblsem_release },
83 	{ 0x0500, 0x0500, nv50_sw_mthd_flip },
84 	{ 0x0600, 0x0600, gf100_sw_mthd_mp_control },
85 	{ 0x0644, 0x0644, gf100_sw_mthd_mp_control },
86 	{ 0x06ac, 0x06ac, gf100_sw_mthd_mp_control },
87 	{}
88 };
89 
90 static struct nvkm_oclass
91 gf100_sw_sclass[] = {
92 	{ NVIF_IOCTL_NEW_V0_SW_GF100, &nvkm_nvsw_ofuncs, gf100_sw_omthds },
93 	{}
94 };
95 
96 /*******************************************************************************
97  * software context
98  ******************************************************************************/
99 
100 static int
101 gf100_sw_vblsem_release(struct nvkm_notify *notify)
102 {
103 	struct nv50_sw_chan *chan =
104 		container_of(notify, typeof(*chan), vblank.notify[notify->index]);
105 	struct nvkm_sw *sw = (void *)nv_object(chan)->engine;
106 	struct nvkm_device *device = sw->engine.subdev.device;
107 	struct nvkm_bar *bar = device->bar;
108 
109 	nvkm_wr32(device, 0x001718, 0x80000000 | chan->vblank.channel);
110 	bar->flush(bar);
111 	nvkm_wr32(device, 0x06000c, upper_32_bits(chan->vblank.offset));
112 	nvkm_wr32(device, 0x060010, lower_32_bits(chan->vblank.offset));
113 	nvkm_wr32(device, 0x060014, chan->vblank.value);
114 
115 	return NVKM_NOTIFY_DROP;
116 }
117 
118 static struct nv50_sw_cclass
119 gf100_sw_cclass = {
120 	.base.handle = NV_ENGCTX(SW, 0xc0),
121 	.base.ofuncs = &(struct nvkm_ofuncs) {
122 		.ctor = nv50_sw_context_ctor,
123 		.dtor = nv50_sw_context_dtor,
124 		.init = _nvkm_sw_context_init,
125 		.fini = _nvkm_sw_context_fini,
126 	},
127 	.vblank = gf100_sw_vblsem_release,
128 };
129 
130 /*******************************************************************************
131  * software engine/subdev functions
132  ******************************************************************************/
133 
134 struct nvkm_oclass *
135 gf100_sw_oclass = &(struct nv50_sw_oclass) {
136 	.base.handle = NV_ENGINE(SW, 0xc0),
137 	.base.ofuncs = &(struct nvkm_ofuncs) {
138 		.ctor = nv50_sw_ctor,
139 		.dtor = _nvkm_sw_dtor,
140 		.init = _nvkm_sw_init,
141 		.fini = _nvkm_sw_fini,
142 	},
143 	.cclass = &gf100_sw_cclass.base,
144 	.sclass =  gf100_sw_sclass,
145 }.base;
146