1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include <engine/sec.h>
25 #include <engine/falcon.h>
26 #include "fuc/g98.fuc0s.h"
27 
28 #include <core/client.h>
29 #include <core/enum.h>
30 #include <engine/fifo.h>
31 
32 /*******************************************************************************
33  * Crypt object classes
34  ******************************************************************************/
35 
36 static struct nvkm_oclass
37 g98_sec_sclass[] = {
38 	{ 0x88b4, &nvkm_object_ofuncs },
39 	{},
40 };
41 
42 /*******************************************************************************
43  * PSEC context
44  ******************************************************************************/
45 
46 static struct nvkm_oclass
47 g98_sec_cclass = {
48 	.handle = NV_ENGCTX(SEC, 0x98),
49 	.ofuncs = &(struct nvkm_ofuncs) {
50 		.ctor = _nvkm_falcon_context_ctor,
51 		.dtor = _nvkm_falcon_context_dtor,
52 		.init = _nvkm_falcon_context_init,
53 		.fini = _nvkm_falcon_context_fini,
54 		.rd32 = _nvkm_falcon_context_rd32,
55 		.wr32 = _nvkm_falcon_context_wr32,
56 	},
57 };
58 
59 /*******************************************************************************
60  * PSEC engine/subdev functions
61  ******************************************************************************/
62 
63 static const struct nvkm_enum g98_sec_isr_error_name[] = {
64 	{ 0x0000, "ILLEGAL_MTHD" },
65 	{ 0x0001, "INVALID_BITFIELD" },
66 	{ 0x0002, "INVALID_ENUM" },
67 	{ 0x0003, "QUERY" },
68 	{}
69 };
70 
71 static void
72 g98_sec_intr(struct nvkm_subdev *subdev)
73 {
74 	struct nvkm_fifo *fifo = nvkm_fifo(subdev);
75 	struct nvkm_engine *engine = nv_engine(subdev);
76 	struct nvkm_object *engctx;
77 	struct nvkm_falcon *sec = (void *)subdev;
78 	u32 disp = nv_rd32(sec, 0x08701c);
79 	u32 stat = nv_rd32(sec, 0x087008) & disp & ~(disp >> 16);
80 	u32 inst = nv_rd32(sec, 0x087050) & 0x3fffffff;
81 	u32 ssta = nv_rd32(sec, 0x087040) & 0x0000ffff;
82 	u32 addr = nv_rd32(sec, 0x087040) >> 16;
83 	u32 mthd = (addr & 0x07ff) << 2;
84 	u32 subc = (addr & 0x3800) >> 11;
85 	u32 data = nv_rd32(sec, 0x087044);
86 	int chid;
87 
88 	engctx = nvkm_engctx_get(engine, inst);
89 	chid   = fifo->chid(fifo, engctx);
90 
91 	if (stat & 0x00000040) {
92 		nv_error(sec, "DISPATCH_ERROR [");
93 		nvkm_enum_print(g98_sec_isr_error_name, ssta);
94 		pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n",
95 		       chid, (u64)inst << 12, nvkm_client_name(engctx),
96 		       subc, mthd, data);
97 		nv_wr32(sec, 0x087004, 0x00000040);
98 		stat &= ~0x00000040;
99 	}
100 
101 	if (stat) {
102 		nv_error(sec, "unhandled intr 0x%08x\n", stat);
103 		nv_wr32(sec, 0x087004, stat);
104 	}
105 
106 	nvkm_engctx_put(engctx);
107 }
108 
109 static int
110 g98_sec_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
111 	     struct nvkm_oclass *oclass, void *data, u32 size,
112 	     struct nvkm_object **pobject)
113 {
114 	struct nvkm_falcon *sec;
115 	int ret;
116 
117 	ret = nvkm_falcon_create(parent, engine, oclass, 0x087000, true,
118 				 "PSEC", "sec", &sec);
119 	*pobject = nv_object(sec);
120 	if (ret)
121 		return ret;
122 
123 	nv_subdev(sec)->unit = 0x00004000;
124 	nv_subdev(sec)->intr = g98_sec_intr;
125 	nv_engine(sec)->cclass = &g98_sec_cclass;
126 	nv_engine(sec)->sclass = g98_sec_sclass;
127 	nv_falcon(sec)->code.data = g98_sec_code;
128 	nv_falcon(sec)->code.size = sizeof(g98_sec_code);
129 	nv_falcon(sec)->data.data = g98_sec_data;
130 	nv_falcon(sec)->data.size = sizeof(g98_sec_data);
131 	return 0;
132 }
133 
134 struct nvkm_oclass
135 g98_sec_oclass = {
136 	.handle = NV_ENGINE(SEC, 0x98),
137 	.ofuncs = &(struct nvkm_ofuncs) {
138 		.ctor = g98_sec_ctor,
139 		.dtor = _nvkm_falcon_dtor,
140 		.init = _nvkm_falcon_init,
141 		.fini = _nvkm_falcon_fini,
142 		.rd32 = _nvkm_falcon_rd32,
143 		.wr32 = _nvkm_falcon_wr32,
144 	},
145 };
146