1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 #include <core/gpuobj.h>
27 #include <subdev/timer.h>
28 
29 #include <nvif/class.h>
30 
31 /*******************************************************************************
32  * PMPEG context
33  ******************************************************************************/
34 
35 static int
36 nv50_mpeg_cclass_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent,
37 		      int align, struct nvkm_gpuobj **pgpuobj)
38 {
39 	int ret = nvkm_gpuobj_new(object->engine->subdev.device, 128 * 4,
40 				  align, true, parent, pgpuobj);
41 	if (ret == 0) {
42 		nvkm_kmap(*pgpuobj);
43 		nvkm_wo32(*pgpuobj, 0x70, 0x00801ec1);
44 		nvkm_wo32(*pgpuobj, 0x7c, 0x0000037c);
45 		nvkm_done(*pgpuobj);
46 	}
47 	return ret;
48 }
49 
50 const struct nvkm_object_func
51 nv50_mpeg_cclass = {
52 	.bind = nv50_mpeg_cclass_bind,
53 };
54 
55 /*******************************************************************************
56  * PMPEG engine/subdev functions
57  ******************************************************************************/
58 
59 void
60 nv50_mpeg_intr(struct nvkm_engine *mpeg)
61 {
62 	struct nvkm_subdev *subdev = &mpeg->subdev;
63 	struct nvkm_device *device = subdev->device;
64 	u32 stat = nvkm_rd32(device, 0x00b100);
65 	u32 type = nvkm_rd32(device, 0x00b230);
66 	u32 mthd = nvkm_rd32(device, 0x00b234);
67 	u32 data = nvkm_rd32(device, 0x00b238);
68 	u32 show = stat;
69 
70 	if (stat & 0x01000000) {
71 		/* happens on initial binding of the object */
72 		if (type == 0x00000020 && mthd == 0x0000) {
73 			nvkm_wr32(device, 0x00b308, 0x00000100);
74 			show &= ~0x01000000;
75 		}
76 	}
77 
78 	if (show) {
79 		nvkm_info(subdev, "%08x %08x %08x %08x\n",
80 			  stat, type, mthd, data);
81 	}
82 
83 	nvkm_wr32(device, 0x00b100, stat);
84 	nvkm_wr32(device, 0x00b230, 0x00000001);
85 }
86 
87 int
88 nv50_mpeg_init(struct nvkm_engine *mpeg)
89 {
90 	struct nvkm_subdev *subdev = &mpeg->subdev;
91 	struct nvkm_device *device = subdev->device;
92 
93 	nvkm_wr32(device, 0x00b32c, 0x00000000);
94 	nvkm_wr32(device, 0x00b314, 0x00000100);
95 	nvkm_wr32(device, 0x00b0e0, 0x0000001a);
96 
97 	nvkm_wr32(device, 0x00b220, 0x00000044);
98 	nvkm_wr32(device, 0x00b300, 0x00801ec1);
99 	nvkm_wr32(device, 0x00b390, 0x00000000);
100 	nvkm_wr32(device, 0x00b394, 0x00000000);
101 	nvkm_wr32(device, 0x00b398, 0x00000000);
102 	nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001);
103 
104 	nvkm_wr32(device, 0x00b100, 0xffffffff);
105 	nvkm_wr32(device, 0x00b140, 0xffffffff);
106 
107 	if (nvkm_msec(device, 2000,
108 		if (!(nvkm_rd32(device, 0x00b200) & 0x00000001))
109 			break;
110 	) < 0) {
111 		nvkm_error(subdev, "timeout %08x\n",
112 			   nvkm_rd32(device, 0x00b200));
113 		return -EBUSY;
114 	}
115 
116 	return 0;
117 }
118 
119 static const struct nvkm_engine_func
120 nv50_mpeg = {
121 	.init = nv50_mpeg_init,
122 	.intr = nv50_mpeg_intr,
123 	.cclass = &nv50_mpeg_cclass,
124 	.sclass = {
125 		{ -1, -1, NV31_MPEG, &nv31_mpeg_object },
126 		{}
127 	}
128 };
129 
130 int
131 nv50_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
132 {
133 	return nvkm_engine_new_(&nv50_mpeg, device, index, 0x00400002,
134 				true, pmpeg);
135 }
136