1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 #include <core/gpuobj.h>
27 #include <subdev/timer.h>
28 
29 #include <nvif/class.h>
30 
31 /*******************************************************************************
32  * PMPEG context
33  ******************************************************************************/
34 
35 static int
36 nv50_mpeg_cclass_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent,
37 		      int align, struct nvkm_gpuobj **pgpuobj)
38 {
39 	int ret = nvkm_gpuobj_new(object->engine->subdev.device, 128 * 4,
40 				  align, true, parent, pgpuobj);
41 	if (ret == 0) {
42 		nvkm_kmap(*pgpuobj);
43 		nvkm_wo32(*pgpuobj, 0x70, 0x00801ec1);
44 		nvkm_wo32(*pgpuobj, 0x7c, 0x0000037c);
45 		nvkm_done(*pgpuobj);
46 	}
47 	return ret;
48 }
49 
50 const struct nvkm_object_func
51 nv50_mpeg_cclass = {
52 	.bind = nv50_mpeg_cclass_bind,
53 };
54 
55 /*******************************************************************************
56  * PMPEG engine/subdev functions
57  ******************************************************************************/
58 
59 void
60 nv50_mpeg_intr(struct nvkm_subdev *subdev)
61 {
62 	struct nvkm_mpeg *mpeg = (void *)subdev;
63 	struct nvkm_device *device = mpeg->engine.subdev.device;
64 	u32 stat = nvkm_rd32(device, 0x00b100);
65 	u32 type = nvkm_rd32(device, 0x00b230);
66 	u32 mthd = nvkm_rd32(device, 0x00b234);
67 	u32 data = nvkm_rd32(device, 0x00b238);
68 	u32 show = stat;
69 
70 	if (stat & 0x01000000) {
71 		/* happens on initial binding of the object */
72 		if (type == 0x00000020 && mthd == 0x0000) {
73 			nvkm_wr32(device, 0x00b308, 0x00000100);
74 			show &= ~0x01000000;
75 		}
76 	}
77 
78 	if (show) {
79 		nvkm_info(subdev, "%08x %08x %08x %08x\n",
80 			  stat, type, mthd, data);
81 	}
82 
83 	nvkm_wr32(device, 0x00b100, stat);
84 	nvkm_wr32(device, 0x00b230, 0x00000001);
85 }
86 
87 static void
88 nv50_vpe_intr(struct nvkm_subdev *subdev)
89 {
90 	struct nvkm_device *device = subdev->device;
91 
92 	if (nvkm_rd32(device, 0x00b100))
93 		nv50_mpeg_intr(subdev);
94 
95 	if (nvkm_rd32(device, 0x00b800)) {
96 		u32 stat = nvkm_rd32(device, 0x00b800);
97 		nvkm_info(subdev, "PMSRCH: %08x\n", stat);
98 		nvkm_wr32(device, 0xb800, stat);
99 	}
100 }
101 
102 static const struct nvkm_engine_func
103 nv50_mpeg = {
104 	.cclass = &nv50_mpeg_cclass,
105 	.sclass = {
106 		{ -1, -1, NV31_MPEG, &nv31_mpeg_object },
107 		{}
108 	}
109 };
110 
111 static int
112 nv50_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
113 	       struct nvkm_oclass *oclass, void *data, u32 size,
114 	       struct nvkm_object **pobject)
115 {
116 	struct nvkm_mpeg *mpeg;
117 	int ret;
118 
119 	ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
120 	*pobject = nv_object(mpeg);
121 	if (ret)
122 		return ret;
123 
124 	mpeg->engine.func = &nv50_mpeg;
125 
126 	nv_subdev(mpeg)->unit = 0x00400002;
127 	nv_subdev(mpeg)->intr = nv50_vpe_intr;
128 	return 0;
129 }
130 
131 int
132 nv50_mpeg_init(struct nvkm_object *object)
133 {
134 	struct nvkm_mpeg *mpeg = (void *)object;
135 	struct nvkm_subdev *subdev = &mpeg->engine.subdev;
136 	struct nvkm_device *device = subdev->device;
137 	int ret;
138 
139 	ret = nvkm_mpeg_init(mpeg);
140 	if (ret)
141 		return ret;
142 
143 	nvkm_wr32(device, 0x00b32c, 0x00000000);
144 	nvkm_wr32(device, 0x00b314, 0x00000100);
145 	nvkm_wr32(device, 0x00b0e0, 0x0000001a);
146 
147 	nvkm_wr32(device, 0x00b220, 0x00000044);
148 	nvkm_wr32(device, 0x00b300, 0x00801ec1);
149 	nvkm_wr32(device, 0x00b390, 0x00000000);
150 	nvkm_wr32(device, 0x00b394, 0x00000000);
151 	nvkm_wr32(device, 0x00b398, 0x00000000);
152 	nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001);
153 
154 	nvkm_wr32(device, 0x00b100, 0xffffffff);
155 	nvkm_wr32(device, 0x00b140, 0xffffffff);
156 
157 	if (nvkm_msec(device, 2000,
158 		if (!(nvkm_rd32(device, 0x00b200) & 0x00000001))
159 			break;
160 	) < 0) {
161 		nvkm_error(subdev, "timeout %08x\n",
162 			   nvkm_rd32(device, 0x00b200));
163 		return -EBUSY;
164 	}
165 
166 	return 0;
167 }
168 
169 struct nvkm_oclass
170 nv50_mpeg_oclass = {
171 	.handle = NV_ENGINE(MPEG, 0x50),
172 	.ofuncs = &(struct nvkm_ofuncs) {
173 		.ctor = nv50_mpeg_ctor,
174 		.dtor = _nvkm_mpeg_dtor,
175 		.init = nv50_mpeg_init,
176 		.fini = _nvkm_mpeg_fini,
177 	},
178 };
179