1 /* 2 * Copyright 2018 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 #include "gf100.h" 23 #include "ctxgf100.h" 24 25 #include <nvif/class.h> 26 27 static void 28 gv100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) 29 { 30 struct nvkm_subdev *subdev = &gr->base.engine.subdev; 31 struct nvkm_device *device = subdev->device; 32 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x730)); 33 u32 gerr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x734)); 34 const struct nvkm_enum *warp; 35 char glob[128]; 36 37 nvkm_snprintbf(glob, sizeof(glob), gf100_mp_global_error, gerr); 38 warp = nvkm_enum_find(gf100_mp_warp_error, werr & 0xffff); 39 40 nvkm_error(subdev, "GPC%i/TPC%i/MP trap: " 41 "global %08x [%s] warp %04x [%s]\n", 42 gpc, tpc, gerr, glob, werr, warp ? warp->name : ""); 43 44 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x730), 0x00000000); 45 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x734), gerr); 46 } 47 48 static void 49 gv100_gr_init_4188a4(struct gf100_gr *gr) 50 { 51 struct nvkm_device *device = gr->base.engine.subdev.device; 52 nvkm_mask(device, 0x4188a4, 0x03000000, 0x03000000); 53 } 54 55 static void 56 gv100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc) 57 { 58 struct nvkm_device *device = gr->base.engine.subdev.device; 59 int sm; 60 for (sm = 0; sm < 0x100; sm += 0x80) { 61 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x728 + sm), 0x0085eb64); 62 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x610), 0x00000001); 63 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x72c + sm), 0x00000004); 64 } 65 } 66 67 static void 68 gv100_gr_init_504430(struct gf100_gr *gr, int gpc, int tpc) 69 { 70 struct nvkm_device *device = gr->base.engine.subdev.device; 71 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0x403f0000); 72 } 73 74 static void 75 gv100_gr_init_419bd8(struct gf100_gr *gr) 76 { 77 struct nvkm_device *device = gr->base.engine.subdev.device; 78 nvkm_mask(device, 0x419bd8, 0x00000700, 0x00000000); 79 } 80 81 static const struct gf100_gr_func 82 gv100_gr = { 83 .oneinit_tiles = gm200_gr_oneinit_tiles, 84 .oneinit_sm_id = gm200_gr_oneinit_sm_id, 85 .init = gf100_gr_init, 86 .init_419bd8 = gv100_gr_init_419bd8, 87 .init_gpc_mmu = gm200_gr_init_gpc_mmu, 88 .init_vsc_stream_master = gk104_gr_init_vsc_stream_master, 89 .init_zcull = gf117_gr_init_zcull, 90 .init_num_active_ltcs = gm200_gr_init_num_active_ltcs, 91 .init_rop_active_fbps = gp100_gr_init_rop_active_fbps, 92 .init_swdx_pes_mask = gp102_gr_init_swdx_pes_mask, 93 .init_fecs_exceptions = gp100_gr_init_fecs_exceptions, 94 .init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2, 95 .init_sked_hww_esr = gk104_gr_init_sked_hww_esr, 96 .init_ppc_exceptions = gk104_gr_init_ppc_exceptions, 97 .init_504430 = gv100_gr_init_504430, 98 .init_shader_exceptions = gv100_gr_init_shader_exceptions, 99 .init_4188a4 = gv100_gr_init_4188a4, 100 .trap_mp = gv100_gr_trap_mp, 101 .rops = gm200_gr_rops, 102 .gpc_nr = 6, 103 .tpc_nr = 5, 104 .ppc_nr = 3, 105 .grctx = &gv100_grctx, 106 .zbc = &gp102_gr_zbc, 107 .sclass = { 108 { -1, -1, FERMI_TWOD_A }, 109 { -1, -1, KEPLER_INLINE_TO_MEMORY_B }, 110 { -1, -1, VOLTA_A, &gf100_fermi }, 111 { -1, -1, VOLTA_COMPUTE_A }, 112 {} 113 } 114 }; 115 116 int 117 gv100_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) 118 { 119 return gm200_gr_new_(&gv100_gr, device, index, pgr); 120 } 121