1 /* 2 * Copyright 2021 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 #include "chan.h" 23 #include "runl.h" 24 25 #include "nv50.h" 26 #include "channv50.h" 27 28 #include <nvif/class.h> 29 30 static int 31 g98_fifo_runl_ctor(struct nvkm_fifo *fifo) 32 { 33 struct nvkm_runl *runl; 34 35 runl = nvkm_runl_new(fifo, 0, 0, 0); 36 if (IS_ERR(runl)) 37 return PTR_ERR(runl); 38 39 nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_SW, 0); 40 nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_DMAOBJ, 0); 41 nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0); 42 nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MSPPP, 0); 43 nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_CE, 0); 44 nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_MSPDEC, 0); 45 nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_SEC, 0); 46 nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_MSVLD, 0); 47 return 0; 48 } 49 50 static const struct nvkm_fifo_func 51 g98_fifo = { 52 .dtor = nv50_fifo_dtor, 53 .oneinit = nv50_fifo_oneinit, 54 .chid_nr = nv50_fifo_chid_nr, 55 .chid_ctor = nv50_fifo_chid_ctor, 56 .runl_ctor = g98_fifo_runl_ctor, 57 .init = nv50_fifo_init, 58 .intr = nv04_fifo_intr, 59 .engine_id = g84_fifo_engine_id, 60 .id_engine = g84_fifo_id_engine, 61 .pause = nv04_fifo_pause, 62 .start = nv04_fifo_start, 63 .uevent_init = g84_fifo_uevent_init, 64 .uevent_fini = g84_fifo_uevent_fini, 65 .runl = &nv50_runl, 66 .engn = &g84_engn, 67 .engn_sw = &nv50_engn_sw, 68 .cgrp = {{ }, &nv04_cgrp }, 69 .chan = {{ 0, 0, G82_CHANNEL_GPFIFO }, &g84_chan, .oclass = &g84_fifo_gpfifo_oclass }, 70 }; 71 72 int 73 g98_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, 74 struct nvkm_fifo **pfifo) 75 { 76 return nv50_fifo_new_(&g98_fifo, device, type, inst, pfifo); 77 } 78