1 /* 2 * Copyright 2015 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs <bskeggs@redhat.com> 23 */ 24 #include "priv.h" 25 #include "chan.h" 26 #include "head.h" 27 #include "ior.h" 28 29 #include <nvif/class.h> 30 31 static const struct nvkm_ior_func 32 gp100_sor = { 33 .route = { 34 .get = gm200_sor_route_get, 35 .set = gm200_sor_route_set, 36 }, 37 .state = gf119_sor_state, 38 .power = nv50_sor_power, 39 .clock = gf119_sor_clock, 40 .hdmi = &gm200_sor_hdmi, 41 .dp = &gm200_sor_dp, 42 .hda = &gf119_sor_hda, 43 }; 44 45 int 46 gp100_sor_new(struct nvkm_disp *disp, int id) 47 { 48 struct nvkm_device *device = disp->engine.subdev.device; 49 u32 hda; 50 51 if (!((hda = nvkm_rd32(device, 0x08a15c)) & 0x40000000)) 52 hda = nvkm_rd32(device, 0x10ebb0) >> 8; 53 54 return nvkm_ior_new_(&gp100_sor, disp, SOR, id, hda & BIT(id)); 55 } 56 57 static const struct nvkm_disp_func 58 gp100_disp = { 59 .oneinit = nv50_disp_oneinit, 60 .init = gf119_disp_init, 61 .fini = gf119_disp_fini, 62 .intr = gf119_disp_intr, 63 .intr_error = gf119_disp_intr_error, 64 .super = gf119_disp_super, 65 .uevent = &gf119_disp_chan_uevent, 66 .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, 67 .sor = { .cnt = gf119_sor_cnt, .new = gp100_sor_new }, 68 .root = { 0,0,GP100_DISP }, 69 .user = { 70 {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs }, 71 {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm }, 72 {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base }, 73 {{0,0,GP100_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core }, 74 {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly }, 75 {} 76 }, 77 }; 78 79 int 80 gp100_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, 81 struct nvkm_disp **pdisp) 82 { 83 return nvkm_disp_new_(&gp100_disp, device, type, inst, pdisp); 84 } 85