1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include <engine/cipher.h> 25 #include <engine/fifo.h> 26 27 #include <core/client.h> 28 #include <core/engctx.h> 29 #include <core/enum.h> 30 31 /******************************************************************************* 32 * Crypt object classes 33 ******************************************************************************/ 34 35 static int 36 g84_cipher_object_ctor(struct nvkm_object *parent, 37 struct nvkm_object *engine, 38 struct nvkm_oclass *oclass, void *data, u32 size, 39 struct nvkm_object **pobject) 40 { 41 struct nvkm_gpuobj *obj; 42 int ret; 43 44 ret = nvkm_gpuobj_create(parent, engine, oclass, 0, parent, 45 16, 16, 0, &obj); 46 *pobject = nv_object(obj); 47 if (ret) 48 return ret; 49 50 nvkm_kmap(obj); 51 nvkm_wo32(obj, 0x00, nv_mclass(obj)); 52 nvkm_wo32(obj, 0x04, 0x00000000); 53 nvkm_wo32(obj, 0x08, 0x00000000); 54 nvkm_wo32(obj, 0x0c, 0x00000000); 55 nvkm_done(obj); 56 return 0; 57 } 58 59 static struct nvkm_ofuncs 60 g84_cipher_ofuncs = { 61 .ctor = g84_cipher_object_ctor, 62 .dtor = _nvkm_gpuobj_dtor, 63 .init = _nvkm_gpuobj_init, 64 .fini = _nvkm_gpuobj_fini, 65 .rd32 = _nvkm_gpuobj_rd32, 66 .wr32 = _nvkm_gpuobj_wr32, 67 }; 68 69 static struct nvkm_oclass 70 g84_cipher_sclass[] = { 71 { 0x74c1, &g84_cipher_ofuncs }, 72 {} 73 }; 74 75 /******************************************************************************* 76 * PCIPHER context 77 ******************************************************************************/ 78 79 static struct nvkm_oclass 80 g84_cipher_cclass = { 81 .handle = NV_ENGCTX(CIPHER, 0x84), 82 .ofuncs = &(struct nvkm_ofuncs) { 83 .ctor = _nvkm_engctx_ctor, 84 .dtor = _nvkm_engctx_dtor, 85 .init = _nvkm_engctx_init, 86 .fini = _nvkm_engctx_fini, 87 .rd32 = _nvkm_engctx_rd32, 88 .wr32 = _nvkm_engctx_wr32, 89 }, 90 }; 91 92 /******************************************************************************* 93 * PCIPHER engine/subdev functions 94 ******************************************************************************/ 95 96 static const struct nvkm_bitfield 97 g84_cipher_intr_mask[] = { 98 { 0x00000001, "INVALID_STATE" }, 99 { 0x00000002, "ILLEGAL_MTHD" }, 100 { 0x00000004, "ILLEGAL_CLASS" }, 101 { 0x00000080, "QUERY" }, 102 { 0x00000100, "FAULT" }, 103 {} 104 }; 105 106 static void 107 g84_cipher_intr(struct nvkm_subdev *subdev) 108 { 109 struct nvkm_fifo *fifo = nvkm_fifo(subdev); 110 struct nvkm_engine *engine = nv_engine(subdev); 111 struct nvkm_object *engctx; 112 struct nvkm_engine *cipher = (void *)subdev; 113 struct nvkm_device *device = cipher->subdev.device; 114 u32 stat = nvkm_rd32(device, 0x102130); 115 u32 mthd = nvkm_rd32(device, 0x102190); 116 u32 data = nvkm_rd32(device, 0x102194); 117 u32 inst = nvkm_rd32(device, 0x102188) & 0x7fffffff; 118 char msg[128]; 119 int chid; 120 121 engctx = nvkm_engctx_get(engine, inst); 122 chid = fifo->chid(fifo, engctx); 123 124 if (stat) { 125 nvkm_snprintbf(msg, sizeof(msg), g84_cipher_intr_mask, stat); 126 nvkm_error(subdev, "%08x [%s] ch %d [%010llx %s] " 127 "mthd %04x data %08x\n", 128 stat, msg, chid, (u64)inst << 12, 129 nvkm_client_name(engctx), mthd, data); 130 } 131 132 nvkm_wr32(device, 0x102130, stat); 133 nvkm_wr32(device, 0x10200c, 0x10); 134 135 nvkm_engctx_put(engctx); 136 } 137 138 static int 139 g84_cipher_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 140 struct nvkm_oclass *oclass, void *data, u32 size, 141 struct nvkm_object **pobject) 142 { 143 struct nvkm_engine *cipher; 144 int ret; 145 146 ret = nvkm_engine_create(parent, engine, oclass, true, 147 "PCIPHER", "cipher", &cipher); 148 *pobject = nv_object(cipher); 149 if (ret) 150 return ret; 151 152 nv_subdev(cipher)->unit = 0x00004000; 153 nv_subdev(cipher)->intr = g84_cipher_intr; 154 nv_engine(cipher)->cclass = &g84_cipher_cclass; 155 nv_engine(cipher)->sclass = g84_cipher_sclass; 156 return 0; 157 } 158 159 static int 160 g84_cipher_init(struct nvkm_object *object) 161 { 162 struct nvkm_engine *cipher = (void *)object; 163 struct nvkm_device *device = cipher->subdev.device; 164 int ret; 165 166 ret = nvkm_engine_init(cipher); 167 if (ret) 168 return ret; 169 170 nvkm_wr32(device, 0x102130, 0xffffffff); 171 nvkm_wr32(device, 0x102140, 0xffffffbf); 172 nvkm_wr32(device, 0x10200c, 0x00000010); 173 return 0; 174 } 175 176 struct nvkm_oclass 177 g84_cipher_oclass = { 178 .handle = NV_ENGINE(CIPHER, 0x84), 179 .ofuncs = &(struct nvkm_ofuncs) { 180 .ctor = g84_cipher_ctor, 181 .dtor = _nvkm_engine_dtor, 182 .init = g84_cipher_init, 183 .fini = _nvkm_engine_fini, 184 }, 185 }; 186